From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 391AE45489; Tue, 18 Jun 2024 09:13:24 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9B00840E4F; Tue, 18 Jun 2024 09:12:34 +0200 (CEST) Received: from smtpbg156.qq.com (smtpbg156.qq.com [15.184.82.18]) by mails.dpdk.org (Postfix) with ESMTP id ABF0D40DD5; Tue, 18 Jun 2024 09:12:13 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694727te4km8p X-QQ-Originating-IP: AaCu6zUn+hlM1m2XqaPyPaMerjnzIOItKuE858i75U4= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:07 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14862118706944177189 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 05/19] net/txgbe: reconfigure more MAC Rx registers Date: Tue, 18 Jun 2024 15:11:36 +0800 Message-Id: <20240618071150.21564-6-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When link status changes, there is a probability that no more packets can be received on the port, due to hardware defects. These MAC Rx registers should be reconfigured to fix this problem. Fixes: 950a6954df13 ("net/txgbe: reconfigure MAC Rx when link update") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_regs.h | 2 ++ drivers/net/txgbe/txgbe_ethdev.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 86896d11dc..a2984f1106 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1022,6 +1022,8 @@ enum txgbe_5tuple_protocol { #define TXGBE_MACRXFLT_CTL_PASS LS(3, 6, 0x3) #define TXGBE_MACRXFLT_RXALL MS(31, 0x1) +#define TXGBE_MAC_WDG_TIMEOUT 0x01100C + /****************************************************************************** * Statistic Registers ******************************************************************************/ diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index a59d964a5b..699ff1c920 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2879,6 +2879,7 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev, bool link_up; int err; int wait = 1; + u32 reg; memset(&link, 0, sizeof(link)); link.link_status = RTE_ETH_LINK_DOWN; @@ -2968,9 +2969,14 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev, } /* Re configure MAC RX */ - if (hw->mac.type == txgbe_mac_raptor) + if (hw->mac.type == txgbe_mac_raptor) { + reg = rd32(hw, TXGBE_MACRXCFG); + wr32(hw, TXGBE_MACRXCFG, reg); wr32m(hw, TXGBE_MACRXFLT, TXGBE_MACRXFLT_PROMISC, TXGBE_MACRXFLT_PROMISC); + reg = rd32(hw, TXGBE_MAC_WDG_TIMEOUT); + wr32(hw, TXGBE_MAC_WDG_TIMEOUT, reg); + } return rte_eth_linkstatus_set(dev, &link); } -- 2.27.0