From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2DC3B4548C; Tue, 18 Jun 2024 13:44:03 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 878E6427D8; Tue, 18 Jun 2024 13:42:34 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) by mails.dpdk.org (Postfix) with ESMTP id 91D2F427AE for ; Tue, 18 Jun 2024 13:42:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718710947; x=1750246947; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PGr0HG9TkKjKZTmgdnPuhBMWMPRcbPMHJPXZK/vNC04=; b=QuphdYlg2j7txL5JjIP5CXgdoZm3VK0SQMUEELy32/T9Ts2e76UcIaMg Mdq94H7gPlY/6JSIHTzisTB+PDVf4UgQbah24s86hsMTaT+kOBGWXm5j1 5KUKyjNDL5tLxYEhiru3XZCOtr6S/Jg5qcqpIm6HnC777Tyuk5ENQZMKh /Z/FKaai/1aFr9enxtpBQgD8ORilYFMPJsC5+79HoU13/4Ff+ZQ4by51i nJ3ZJixVI5I3aOeu4eze3HvVp/3mdU5htmNxBmdFTtLS+RDkY6lR2aTV1 XrQ7NzDCCjG9wQ8XP3i5t9feGEcvx7NULm7uWX6wU/IVDzjSsPdY0AkcV A==; X-CSE-ConnectionGUID: gCgWxhhOSHKGkTU8Gp9QKg== X-CSE-MsgGUID: zIXc8zAOSkGzjL0T7w8nNQ== X-IronPort-AV: E=McAfee;i="6700,10204,11106"; a="19443344" X-IronPort-AV: E=Sophos;i="6.08,247,1712646000"; d="scan'208";a="19443344" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2024 04:42:26 -0700 X-CSE-ConnectionGUID: 5nEAac0OQN2+9iFoCSUYYg== X-CSE-MsgGUID: jmXrF96MRMib/Yaq1QUf2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,247,1712646000"; d="scan'208";a="41621197" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa009.fm.intel.com with ESMTP; 18 Jun 2024 04:42:25 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, anatoly.burakov@intel.com Cc: dev@dpdk.org Subject: [PATCH v4 15/21] common/idpf: add wmb before tail Date: Tue, 18 Jun 2024 10:57:16 +0000 Message-ID: <20240618105722.2326987-16-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240618105722.2326987-1-soumyadeep.hore@intel.com> References: <20240612035257.2245824-11-soumyadeep.hore@intel.com> <20240618105722.2326987-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Introduced through customer's feedback in their attempt to address some bugs this introduces a memory barrier before posting ctlq tail. This makes sure memory writes have a chance to take place before HW starts messing with the descriptors. Signed-off-by: Soumyadeep Hore --- drivers/common/idpf/base/idpf_controlq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index 65e5599614..4f47759a4f 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -604,6 +604,8 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq, /* Wrap to end of end ring since current ntp is 0 */ cq->next_to_post = cq->ring_size - 1; + idpf_wmb(); + wr32(hw, cq->reg.tail, cq->next_to_post); } -- 2.43.0