From: Daniel Gregory <daniel.gregory@bytedance.com>
Cc: dev@dpdk.org, Liang Ma <liangma@liangbit.com>,
Punit Agrawal <punit.agrawal@bytedance.com>,
Pengcheng Wang <wangpengcheng.pp@bytedance.com>,
Chunsong Feng <fengchunsong@bytedance.com>,
Daniel Gregory <daniel.gregory@bytedance.com>
Subject: [PATCH 4/5] examples/l3fwd: use accelerated crc on riscv
Date: Tue, 18 Jun 2024 18:41:32 +0100 [thread overview]
Message-ID: <20240618174133.33457-5-daniel.gregory@bytedance.com> (raw)
In-Reply-To: <20240618174133.33457-1-daniel.gregory@bytedance.com>
When the RISC-V Zbc (carryless multiplication) extension is present, an
implementation of CRC hashing using hardware instructions is available.
Use it rather than jhash.
Signed-off-by: Daniel Gregory <daniel.gregory@bytedance.com>
---
examples/l3fwd/l3fwd_em.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index d98e66ea2c..4cec2dc6a9 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -29,7 +29,7 @@
#include "l3fwd_event.h"
#include "em_route_parse.c"
-#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32)
+#if defined(RTE_ARCH_X86) || defined(__ARM_FEATURE_CRC32) || defined(RTE_RISCV_ZBC)
#define EM_HASH_CRC 1
#endif
--
2.39.2
next prev parent reply other threads:[~2024-06-18 17:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 17:41 [PATCH 0/5] riscv: implement accelerated crc using zbc Daniel Gregory
2024-06-18 17:41 ` [PATCH 1/5] config/riscv: add flag for using Zbc extension Daniel Gregory
2024-06-18 20:03 ` Stephen Hemminger
2024-06-19 7:08 ` Morten Brørup
2024-06-19 14:49 ` Stephen Hemminger
2024-06-19 16:41 ` Daniel Gregory
2024-06-18 17:41 ` [PATCH 2/5] hash: implement crc using riscv carryless multiply Daniel Gregory
2024-06-18 17:41 ` [PATCH 3/5] net: " Daniel Gregory
2024-06-18 17:41 ` Daniel Gregory [this message]
2024-06-18 17:41 ` [PATCH 5/5] ipfrag: use accelerated crc on riscv Daniel Gregory
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