From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6FF58454A7; Mon, 24 Jun 2024 08:32:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D252E40DD5; Mon, 24 Jun 2024 08:31:41 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7CC364027B for ; Mon, 24 Jun 2024 08:24:30 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45NLvlf6014517 for ; Sun, 23 Jun 2024 23:24:29 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=i xeEVv3Ky6YI65jSVwf5D7AEFjowlkSuAcmvb3RtuF4=; b=ZEkWQjhjBruV48YAi 6IIEWDleMq8v46877siw/jdsa2CtZtJBXkB4LbIR8MbTBXJH8QiHoY7TRjnLGneN FIUtVSduduPFF7YHgczfdUUJAbicYPYnt17MCHxuUV7fdv3Btc7qfR+hLS/9/OEH TZd8c7wfu/v1H6/QxAcQ2iImbks+akaJ5t+V42UkJD5kOvsuQCNm2pyquN5WPa79 51k9JAUvXig9MJmXVp3DTftlX75TUbnnk+fQhFXLfsKl7f0W61mj6NcqBPq7vTUA oidbzjNR+Owciu7TPYTfSq8oWoNnabVF0XTDl1esnO4ln9yOWO6/5lUrsrFVeGKT QyJhQ== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3yxcgtjbqh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sun, 23 Jun 2024 23:24:29 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sun, 23 Jun 2024 23:24:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sun, 23 Jun 2024 23:24:28 -0700 Received: from localhost.localdomain (unknown [10.28.36.177]) by maili.marvell.com (Postfix) with ESMTP id 4ECF33F7040; Sun, 23 Jun 2024 23:24:25 -0700 (PDT) From: Aakash Sasidharan To: Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj CC: , , , , Subject: [PATCH v2 07/12] crypto/cnxk: remove init of CPT result field in packet Date: Mon, 24 Jun 2024 11:53:56 +0530 Message-ID: <20240624062401.4143606-8-asasidharan@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240624062401.4143606-1-asasidharan@marvell.com> References: <20240620145848.3461844-1-asasidharan@marvell.com> <20240624062401.4143606-1-asasidharan@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 1QnnwhNnVQWkLu3NZu3fAcofjuN0CEV4 X-Proofpoint-ORIG-GUID: 1QnnwhNnVQWkLu3NZu3fAcofjuN0CEV4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_05,2024-06-21_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph The packet would be posted to CPT only when there is a valid result. Skip setting of the same. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index 446a3c3fd8..90ca9eec27 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -1410,10 +1410,6 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, uint64_t dptr; int i; - const union cpt_res_s res = { - .cn10k.compcode = CPT_COMP_NOT_DONE, - }; - vf = cdev->data->dev_private; lmt_base = vf->rx_inj_lmtline.lmt_base; @@ -1491,9 +1487,6 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, inst_67 = vsetq_lane_u64(u64_1, inst_67, 1); vst1q_u64(&inst->w6.u64, inst_67); - rte_atomic_store_explicit((unsigned long __rte_atomic *)&hw_res->u64[0], res.u64[0], - rte_memory_order_relaxed); - inst += 2; } -- 2.25.1