From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3D68E454DF; Mon, 24 Jun 2024 13:57:49 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C515540651; Mon, 24 Jun 2024 13:57:46 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id DE81E40651 for ; Mon, 24 Jun 2024 13:57:45 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45OARDAU022063 for ; Mon, 24 Jun 2024 04:57:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to; s=pfpt0220; bh=JzQW9SUBV4FuMtdI72o1YVCpn JTnJJiYeQiZoyLZ6ig=; b=RJjkZlEmj579M4kgCqL8bQFFzmkbxIfAieTSyIj9h igMYHo6iq/wwL3iYoyjOVsaFV74aW93h9C9Yo/Q2+v4S1OURg44sw6GzIocrbmK5 hWJtKV7pI9uVU4zqlaoQbXuntukGti4YcWLHk9i6u2x5TpD3JE6hVHVi84Eyflxl Fe2fodGMwLN8nrWkEWriQGsUWfX467jf3dsgzkznFSKrNsgZBn998Uc+QfQtVpum uHHNRQm7OTB3yv9cAWyhKbyKFJ3phguKZ5mQu04BXNK/41uGfkzHuNOah4KF6zFX hWuIryvYSol2kGZ0q60Z6dtZ5Qo59/4iseGB1hrNBBIQA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3yy72f08j0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 24 Jun 2024 04:57:44 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 24 Jun 2024 04:57:44 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 24 Jun 2024 04:57:44 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 82E043F7077; Mon, 24 Jun 2024 04:57:41 -0700 (PDT) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , , Ankur Dwivedi Subject: [PATCH v2 2/5] net/cnxk: add MTU set ops Date: Mon, 24 Jun 2024 17:27:30 +0530 Message-ID: <20240624115733.191307-2-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240624115733.191307-1-hkalra@marvell.com> References: <20240624074822.88955-1-hkalra@marvell.com> <20240624115733.191307-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: 3F3Voe2lzpUoLRXkO12us8hKGyedHTwO X-Proofpoint-GUID: 3F3Voe2lzpUoLRXkO12us8hKGyedHTwO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_09,2024-06-24_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Ankur Dwivedi Adding support for changing MTU of a representor port. This is required to allow processing jumbo packets. Using this operation, MTU of representor port is only changed, no MTU change shall be propagated to the respective represented port. Signed-off-by: Ankur Dwivedi --- V2: * Better commit message * Added to release notes doc/guides/rel_notes/release_24_07.rst | 2 ++ drivers/net/cnxk/cnxk_rep.h | 1 + drivers/net/cnxk/cnxk_rep_ops.c | 34 +++++++++++++++++++++++++- 3 files changed, 36 insertions(+), 1 deletion(-) diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst index 7c88de381b..72ee6a812c 100644 --- a/doc/guides/rel_notes/release_24_07.rst +++ b/doc/guides/rel_notes/release_24_07.rst @@ -92,6 +92,8 @@ New Features * Added support disabling custom meta aura and separately use custom SA action support. + * Added MTU update for port representors. + * **Updated NVIDIA mlx5 driver.** * Added match with Tx queue. diff --git a/drivers/net/cnxk/cnxk_rep.h b/drivers/net/cnxk/cnxk_rep.h index 9bdea47bd4..ad89649702 100644 --- a/drivers/net/cnxk/cnxk_rep.h +++ b/drivers/net/cnxk/cnxk_rep.h @@ -146,5 +146,6 @@ int cnxk_rep_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids, unsigned int n); int cnxk_rep_xstats_get_names_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids, struct rte_eth_xstat_name *xstats_names, unsigned int n); +int cnxk_rep_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu); #endif /* __CNXK_REP_H__ */ diff --git a/drivers/net/cnxk/cnxk_rep_ops.c b/drivers/net/cnxk/cnxk_rep_ops.c index 8bcb689468..888842fa90 100644 --- a/drivers/net/cnxk/cnxk_rep_ops.c +++ b/drivers/net/cnxk/cnxk_rep_ops.c @@ -821,6 +821,37 @@ cnxk_rep_xstats_get_names_by_id(__rte_unused struct rte_eth_dev *eth_dev, const return n; } +int +cnxk_rep_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) +{ + struct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(eth_dev); + uint32_t frame_size = mtu + CNXK_NIX_L2_OVERHEAD; + int rc = -EINVAL; + + /* Check if MTU is within the allowed range */ + if ((frame_size - RTE_ETHER_CRC_LEN) < NIX_MIN_HW_FRS) { + plt_err("MTU is lesser than minimum"); + goto exit; + } + + if ((frame_size - RTE_ETHER_CRC_LEN) > + ((uint32_t)roc_nix_max_pkt_len(&rep_dev->parent_dev->nix))) { + plt_err("MTU is greater than maximum"); + goto exit; + } + + frame_size -= RTE_ETHER_CRC_LEN; + + /* Set frame size on Rx */ + rc = roc_nix_mac_max_rx_len_set(&rep_dev->parent_dev->nix, frame_size); + if (rc) { + plt_err("Failed to max Rx frame length, rc=%d", rc); + goto exit; + } +exit: + return rc; +} + /* CNXK platform representor dev ops */ struct eth_dev_ops cnxk_rep_dev_ops = { .dev_infos_get = cnxk_rep_dev_info_get, @@ -844,5 +875,6 @@ struct eth_dev_ops cnxk_rep_dev_ops = { .xstats_reset = cnxk_rep_xstats_reset, .xstats_get_names = cnxk_rep_xstats_get_names, .xstats_get_by_id = cnxk_rep_xstats_get_by_id, - .xstats_get_names_by_id = cnxk_rep_xstats_get_names_by_id + .xstats_get_names_by_id = cnxk_rep_xstats_get_names_by_id, + .mtu_set = cnxk_rep_mtu_set }; -- 2.18.0