From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 66BC245500; Wed, 26 Jun 2024 13:00:45 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 06F7842F09; Wed, 26 Jun 2024 13:00:25 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 5859D40B95 for ; Wed, 26 Jun 2024 12:55:53 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45Q9jhow020687 for ; Wed, 26 Jun 2024 03:55:52 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=+ MIyloyCBtq4mqKerP3eW+AqPVvequ2bZ51oWWqp5pE=; b=Wo9agdMueCKym6zRv yeJmXmoj9cDMi8QLDnMKc32ZezvHBLGCnmfLJq4QlkY/ciaQlzBhp9vFqLTetnPv oiU0BsX1ZANxfJC0/CMQsLqBeJP3GQpMT8T2zJYavg11LQAGbHnzzmU8bZAdm4Q+ 7OEIzlfQ+Cgev8GXYClhv64s2lau2+jGcKN7PtvU7f19NZ41achZDupz0iK+5q1V gXOpstTYjjAdhYF3wqDM9LGEYup9yp776NVRnBRRebmR+UAjUtwJUpYq1XR04bme 882YjiMLp6/PUgHxx0MbrjJpfaMa01QxqMHDFHJA0enbZC/fI1/YSjF9ivvoQoA8 x2y6g== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 400ftngbw9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 26 Jun 2024 03:55:52 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 26 Jun 2024 03:55:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Wed, 26 Jun 2024 03:55:51 -0700 Received: from localhost.localdomain (unknown [10.28.36.177]) by maili.marvell.com (Postfix) with ESMTP id EDBCD3F7079; Wed, 26 Jun 2024 03:55:48 -0700 (PDT) From: Aakash Sasidharan To: Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj CC: , , , , Subject: [PATCH v3 04/12] crypto/cnxk: add flow control in Rx inject path Date: Wed, 26 Jun 2024 16:25:26 +0530 Message-ID: <20240626105534.1386528-5-asasidharan@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240626105534.1386528-1-asasidharan@marvell.com> References: <20240624062401.4143606-1-asasidharan@marvell.com> <20240626105534.1386528-1-asasidharan@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: aE6KdqBg_cfEims5-F8UsuBBdmosZlt4 X-Proofpoint-GUID: aE6KdqBg_cfEims5-F8UsuBBdmosZlt4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-26_05,2024-06-25_01,2024-05-17_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph Add flow control in Rx inject path to avoid over submission to CPT. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index 07bd13b16d..673220977c 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -1405,8 +1405,10 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, struct rte_cryptodev *cdev = dev; union cpt_res_s *hw_res = NULL; struct cpt_inst_s *inst; + union cpt_fc_write_s fc; struct cnxk_cpt_vf *vf; struct rte_mbuf *m; + uint64_t *fc_addr; uint64_t dptr; int i; @@ -1418,13 +1420,24 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, lmt_base = vf->rx_inj_lmtline.lmt_base; io_addr = vf->rx_inj_lmtline.io_addr; + fc_addr = vf->rx_inj_lmtline.fc_addr; ROC_LMT_BASE_ID_GET(lmt_base, lmt_id); pf_func = vf->rx_inj_pf_func; + const uint32_t fc_thresh = vf->rx_inj_lmtline.fc_thresh; + again: + fc.u64[0] = + rte_atomic_load_explicit((RTE_ATOMIC(uint64_t) *)fc_addr, rte_memory_order_relaxed); inst = (struct cpt_inst_s *)lmt_base; - for (i = 0; i < RTE_MIN(CN10K_PKTS_PER_LOOP, nb_pkts); i++) { + + i = 0; + + if (unlikely(fc.s.qsize > fc_thresh)) + goto exit; + + for (; i < RTE_MIN(CN10K_PKTS_PER_LOOP, nb_pkts); i++) { m = pkts[i]; sec_sess = (struct cn10k_sec_session *)sess[i]; @@ -1492,6 +1505,7 @@ cn10k_cryptodev_sec_inb_rx_inject(void *dev, struct rte_mbuf **pkts, goto again; } +exit: return count + i; } -- 2.25.1