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From: Huisong Li <lihuisong@huawei.com>
To: <dev@dpdk.org>
CC: <mb@smartsharesystems.com>, <thomas@monjalon.net>, <ferruh.yigit@amd.com>,
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Subject: [PATCH v5 2/2] examples/l3fwd-power: add PM QoS configuration
Date: Tue, 2 Jul 2024 11:50:10 +0800
Message-ID: <20240702035010.4874-3-lihuisong@huawei.com>
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Add PM QoS configuration to declease the delay after sleep in case of
entering deeper idle state.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
examples/l3fwd-power/main.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index fba11da7ca..74a07afc6c 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -47,6 +47,7 @@
#include <rte_telemetry.h>
#include <rte_power_pmd_mgmt.h>
#include <rte_power_uncore.h>
+#include <rte_power_qos.h>
#include "perf_core.h"
#include "main.h"
@@ -2259,6 +2260,24 @@ init_power_library(void)
return -1;
}
}
+
+ RTE_LCORE_FOREACH(lcore_id) {
+ if (rte_lcore_is_enabled(lcore_id) == 0)
+ continue;
+ /*
+ * Set the worker lcore's to have strict latency limit to allow
+ * the CPU to enter the shallowest idle state.
+ */
+ ret = rte_power_qos_set_cpu_resume_latency(lcore_id,
+ RTE_POWER_QOS_STRICT_LATENCY_VALUE);
+ if (ret < 0) {
+ RTE_LOG(ERR, L3FWD_POWER,
+ "Failed to set strict resume latency on CPU%u.\n",
+ lcore_id);
+ return ret;
+ }
+ }
+
return ret;
}
@@ -2298,6 +2317,15 @@ deinit_power_library(void)
}
}
}
+
+ RTE_LCORE_FOREACH(lcore_id) {
+ if (rte_lcore_is_enabled(lcore_id) == 0)
+ continue;
+ /* Restore the original value in kernel. */
+ rte_power_qos_set_cpu_resume_latency(lcore_id,
+ RTE_POWER_QOS_RESUME_LATENCY_NO_CONSTRAINT);
+ }
+
return ret;
}
--
2.22.0