* (no subject)
@ 2024-08-14 8:03 howard_wang
2024-08-14 15:04 ` Stephen Hemminger
0 siblings, 1 reply; 4+ messages in thread
From: howard_wang @ 2024-08-14 8:03 UTC (permalink / raw)
To: dev
[-- Attachment #1: 0001-net-r8169-add-PMD-driver-skeleton.patch --]
[-- Type: application/octet-stream, Size: 8056 bytes --]
From 7e61211f99445dab158fc955b363b5c622a6f0ef Mon Sep 17 00:00:00 2001
From: Howard Wang <howard_wang@realsil.com.cn>
Date: Mon, 5 Aug 2024 15:52:04 +0800
Subject: [PATCH] net/r8169: add PMD driver skeleton
Meson build infrastructure, r8169_ethdev minimal skeleton,
header with Realtek NIC device and vendor IDs.
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
MAINTAINERS | 7 ++
drivers/net/meson.build | 1 +
drivers/net/r8169/meson.build | 6 ++
drivers/net/r8169/r8169_base.h | 15 +++
drivers/net/r8169/r8169_ethdev.c | 180 +++++++++++++++++++++++++++++++
drivers/net/r8169/r8169_ethdev.h | 40 +++++++
6 files changed, 249 insertions(+)
create mode 100644 drivers/net/r8169/meson.build
create mode 100644 drivers/net/r8169/r8169_base.h
create mode 100644 drivers/net/r8169/r8169_ethdev.c
create mode 100644 drivers/net/r8169/r8169_ethdev.h
diff --git a/MAINTAINERS b/MAINTAINERS
index c5a703b5c0..5f9eccc43f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1076,6 +1076,13 @@ F: drivers/net/memif/
F: doc/guides/nics/memif.rst
F: doc/guides/nics/features/memif.ini
+Realtek r8169
+M: Howard Wang <howard_wang@realsil.com.cn>
+M: ChunHao Lin <hau@realtek.com>
+M: Xing Wang <xing_wang@realsil.com.cn>
+M: Realtek NIC SW <pro_nic_dpdk@realtek.com>
+F: drivers/net/r8169
+
Crypto Drivers
--------------
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index fb6d34b782..fddcf39655 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -53,6 +53,7 @@ drivers = [
'pfe',
'qede',
'ring',
+ 'r8169',
'sfc',
'softnic',
'tap',
diff --git a/drivers/net/r8169/meson.build b/drivers/net/r8169/meson.build
new file mode 100644
index 0000000000..5fcd871787
--- /dev/null
+++ b/drivers/net/r8169/meson.build
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2024 Realtek Corporation. All rights reserved
+
+sources = files(
+ 'r8169_ethdev.c',
+)
\ No newline at end of file
diff --git a/drivers/net/r8169/r8169_base.h b/drivers/net/r8169/r8169_base.h
new file mode 100644
index 0000000000..5d219a7966
--- /dev/null
+++ b/drivers/net/r8169/r8169_base.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _R8169_BASE_H_
+#define _R8169_BASE_H_
+
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+typedef uint64_t u64;
+
+#define PCI_VENDOR_ID_REALTEK 0x10EC
+
+#endif
\ No newline at end of file
diff --git a/drivers/net/r8169/r8169_ethdev.c b/drivers/net/r8169/r8169_ethdev.c
new file mode 100644
index 0000000000..2288361d0c
--- /dev/null
+++ b/drivers/net/r8169/r8169_ethdev.c
@@ -0,0 +1,180 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include <sys/queue.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+#include <stdarg.h>
+
+#include <rte_eal.h>
+
+#include <rte_string_fns.h>
+#include <rte_common.h>
+#include <rte_interrupts.h>
+#include <rte_byteorder.h>
+#include <rte_log.h>
+#include <rte_debug.h>
+#include <rte_pci.h>
+#include <bus_pci_driver.h>
+#include <rte_ether.h>
+#include <ethdev_driver.h>
+#include <ethdev_pci.h>
+#include <rte_memory.h>
+#include <rte_malloc.h>
+#include <dev_driver.h>
+
+#include "r8169_ethdev.h"
+#include "r8169_base.h"
+
+static int rtl_dev_configure(struct rte_eth_dev *dev __rte_unused);
+static int rtl_dev_start(struct rte_eth_dev *dev);
+static int rtl_dev_stop(struct rte_eth_dev *dev);
+static int rtl_dev_reset(struct rte_eth_dev *dev);
+static int rtl_dev_close(struct rte_eth_dev *dev);
+
+/*
+ * The set of PCI devices this driver supports
+ */
+static const struct rte_pci_id pci_id_r8169_map[] = {
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8125) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8162) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5000) },
+ {.vendor_id = 0, /* sentinel */ },
+};
+
+static const struct eth_dev_ops rtl_eth_dev_ops = {
+ .dev_configure = rtl_dev_configure,
+ .dev_start = rtl_dev_start,
+ .dev_stop = rtl_dev_stop,
+ .dev_close = rtl_dev_close,
+ .dev_reset = rtl_dev_reset,
+};
+
+static int
+rtl_dev_configure(struct rte_eth_dev *dev __rte_unused)
+{
+ return 0;
+}
+
+/*
+ * Configure device link speed and setup link.
+ * It returns 0 on success.
+ */
+static int
+rtl_dev_start(struct rte_eth_dev *dev)
+{
+ struct rtl_adapter *adapter = RTL_DEV_PRIVATE(dev);
+ struct rtl_hw *hw = &adapter->hw;
+
+ hw->adapter_stopped = 0;
+
+ return 0;
+}
+
+/*
+ * Stop device: disable RX and TX functions to allow for reconfiguring.
+ */
+static int
+rtl_dev_stop(struct rte_eth_dev *dev)
+{
+ struct rtl_adapter *adapter = RTL_DEV_PRIVATE(dev);
+ struct rtl_hw *hw = &adapter->hw;
+
+ if (hw->adapter_stopped)
+ return 0;
+
+ hw->adapter_stopped = 1;
+ dev->data->dev_started = 0;
+
+ return 0;
+}
+
+/*
+ * Reset and stop device.
+ */
+static int
+rtl_dev_close(struct rte_eth_dev *dev)
+{
+ int ret_stp;
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ ret_stp = rtl_dev_stop(dev);
+
+ return ret_stp;
+}
+
+static int
+rtl_dev_init(struct rte_eth_dev *dev)
+{
+ struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+ struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
+ struct rtl_adapter *adapter = RTL_DEV_PRIVATE(dev);
+ struct rtl_hw *hw = &adapter->hw;
+
+ dev->dev_ops = &rtl_eth_dev_ops;
+ //dev->tx_pkt_burst = &rtl_xmit_pkts;
+ //dev->rx_pkt_burst = &rtl_recv_pkts;
+
+ /* For secondary processes, the primary process has done all the work */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ rte_eth_copy_pci_info(dev, pci_dev);
+
+ return 0;
+}
+
+static int
+rtl_dev_uninit(struct rte_eth_dev *dev)
+{
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return -EPERM;
+
+ rtl_dev_close(dev);
+
+ return 0;
+}
+
+static int
+rtl_dev_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ ret = rtl_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = rtl_dev_init(dev);
+
+ return ret;
+}
+
+static int
+rtl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
+ struct rte_pci_device *pci_dev)
+{
+ return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct rtl_adapter),
+ rtl_dev_init);
+}
+
+static int
+rtl_pci_remove(struct rte_pci_device *pci_dev)
+{
+ return rte_eth_dev_pci_generic_remove(pci_dev, rtl_dev_uninit);
+}
+
+static struct rte_pci_driver rte_r8169_pmd = {
+ .id_table = pci_id_r8169_map,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
+ .probe = rtl_pci_probe,
+ .remove = rtl_pci_remove,
+};
+
+RTE_PMD_REGISTER_PCI(net_r8169, rte_r8169_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(net_r8169, pci_id_r8169_map);
+RTE_PMD_REGISTER_KMOD_DEP(net_r8169, "* igb_uio | uio_pci_generic | vfio-pci");
diff --git a/drivers/net/r8169/r8169_ethdev.h b/drivers/net/r8169/r8169_ethdev.h
new file mode 100644
index 0000000000..ab0ad28e28
--- /dev/null
+++ b/drivers/net/r8169/r8169_ethdev.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _R8169_ETHDEV_H_
+#define _R8169_ETHDEV_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include <rte_ethdev.h>
+#include <rte_ethdev_core.h>
+
+#include "r8169_base.h"
+
+struct rtl_hw {
+ u8 adapter_stopped;
+};
+
+struct rtl_sw_stats {
+ u64 tx_packets;
+ u64 tx_bytes;
+ u64 tx_errors;
+ u64 rx_packets;
+ u64 rx_bytes;
+ u64 rx_errors;
+};
+
+struct rtl_adapter {
+ struct rtl_hw hw;
+ struct rtl_sw_stats sw_stats;
+};
+
+#define RTL_DEV_PRIVATE(eth_dev) \
+ ((struct rtl_adapter *)((eth_dev)->data->dev_private))
+
+uint16_t rtl_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts);
+uint16_t rtl_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+
+#endif
\ No newline at end of file
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re:
2024-08-14 8:03 howard_wang
@ 2024-08-14 15:04 ` Stephen Hemminger
0 siblings, 0 replies; 4+ messages in thread
From: Stephen Hemminger @ 2024-08-14 15:04 UTC (permalink / raw)
To: howard_wang; +Cc: dev
On Wed, 14 Aug 2024 16:03:41 +0800
<howard_wang@realsil.com.cn> wrote:
> iff --git a/drivers/net/r8169/r8169_base.h b/drivers/net/r8169/r8169_base.h
> new file mode 100644
> index 0000000000..5d219a7966
> --- /dev/null
> +++ b/drivers/net/r8169/r8169_base.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2024 Realtek Corporation. All rights reserved
> + */
> +
> +#ifndef _R8169_BASE_H_
> +#define _R8169_BASE_H_
> +
> +typedef uint8_t u8;
> +typedef uint16_t u16;
> +typedef uint32_t u32;
> +typedef uint64_t u64;
> +
> +#define PCI_VENDOR_ID_REALTEK 0x10EC
> +
> +#endif
> \ No newline at end of file
Fix you editor setup, all files should end with newline.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v3 0/7] net/gve: RSS Support for GVE Driver
@ 2024-01-24 0:14 Joshua Washington
[not found] ` <20240126173317.2779230-1-joshwash@google.com>
0 siblings, 1 reply; 4+ messages in thread
From: Joshua Washington @ 2024-01-24 0:14 UTC (permalink / raw)
Cc: dev, Ferruh Yigit, Rushil Gupta, Joshua Washington
This patch series introduces RSS support for the GVE poll-mode driver.
This series includes implementations of the following eth_dev_ops:
1) rss_hash_update
2) rss_hash_conf_get
3) reta_query
4) reta_update
In rss_hash_update, the GVE driver supports the following RSS hash
types:
* RTE_ETH_RSS_IPV4
* RTE_ETH_RSS_NONFRAG_IPV4_TCP
* RTE_ETH_RSS_NONFRAG_IPV4_UDP
* RTE_ETH_RSS_IPV6
* RTE_ETH_RSS_IPV6_EX
* RTE_ETH_RSS_NONFRAG_IPV6_TCP
* RTE_ETH_RSS_NONFRAG_IPV6_UDP
* RTE_ETH_RSS_IPV6_TCP_EX
* RTE_ETH_RSS_IPV6_UDP_EX
The hash key is 40B, and the lookup table has 128 entries. These values
are not configurable in this implementation.
In general, the DPDK driver expects the RSS hash configuration to be set
with a key before the redriection table is set up. When the RSS hash is
configured, a default redirection table is generated based on the number
of queues. When the device is re-configured, the redirection table is
reset to the default value based on the queue count.
An important note is that the gVNIC device expects 32 bit integers for
RSS redirection table entries, while the RTE API uses 16 bit integers.
However, this is unlikely to be an issue, as these values represent
receive queues, and the gVNIC device does not support anywhere near 64K
queues.
This series also updates the corresponding feature matrix ertries and
documentation as it pertains to RSS support in the GVE driver.
v2:
Add commmit messages for patches with it missing, and other checkpatches
fixes.
Note: There is a warning about complex macros being parenthesized that
does not seem to be well-founded.
v3:
Fix build warnings that come up on certain distros.
Joshua Washington (7):
net/gve: fully expose RSS offload support in dev_info
net/gve: RSS adminq command changes
net/gve: add gve_rss library for handling RSS-related behaviors
net/gve: RSS configuration update support
net/gve: RSS redirection table update support
net/gve: update gve.ini with RSS capabilities
net/gve: update GVE documentation with RSS support
doc/guides/nics/features/gve.ini | 3 +
doc/guides/nics/gve.rst | 16 ++-
drivers/net/gve/base/gve.h | 15 ++
drivers/net/gve/base/gve_adminq.c | 59 ++++++++
drivers/net/gve/base/gve_adminq.h | 21 +++
drivers/net/gve/gve_ethdev.c | 231 +++++++++++++++++++++++++++++-
drivers/net/gve/gve_ethdev.h | 17 +++
drivers/net/gve/gve_rss.c | 206 ++++++++++++++++++++++++++
drivers/net/gve/gve_rss.h | 107 ++++++++++++++
drivers/net/gve/meson.build | 1 +
10 files changed, 667 insertions(+), 9 deletions(-)
create mode 100644 drivers/net/gve/gve_rss.c
create mode 100644 drivers/net/gve/gve_rss.h
--
2.43.0.429.g432eaa2c6b-goog
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH] net/failsafe: Fix crash due to global devargs syntax parsing from secondary process
@ 2022-02-10 7:10 madhuker.mythri
2022-02-10 15:00 ` Ferruh Yigit
0 siblings, 1 reply; 4+ messages in thread
From: madhuker.mythri @ 2022-02-10 7:10 UTC (permalink / raw)
To: grive; +Cc: dev, Madhuker Mythri
From: Madhuker Mythri <madhuker.mythri@oracle.com>
Failsafe pmd started crashing with global devargs syntax as devargs is
not memset to zero. Access it to in rte_devargs_parse resulted in a
crash when called from secondary process.
Bugzilla Id: 933
Signed-off-by: Madhuker Mythri <madhuker.mythri@oracle.com>
---
drivers/net/failsafe/failsafe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/failsafe/failsafe.c b/drivers/net/failsafe/failsafe.c
index 3c754a5f66..aa93cc6000 100644
--- a/drivers/net/failsafe/failsafe.c
+++ b/drivers/net/failsafe/failsafe.c
@@ -360,6 +360,7 @@ rte_pmd_failsafe_probe(struct rte_vdev_device *vdev)
if (sdev->devargs.name[0] == '\0')
continue;
+ memset(&devargs, 0, sizeof(devargs));
/* rebuild devargs to be able to get the bus name. */
ret = rte_devargs_parse(&devargs,
sdev->devargs.name);
--
2.32.0.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* (no subject)
2022-02-10 7:10 [PATCH] net/failsafe: Fix crash due to global devargs syntax parsing from secondary process madhuker.mythri
@ 2022-02-10 15:00 ` Ferruh Yigit
2022-02-10 16:08 ` Gaëtan Rivet
0 siblings, 1 reply; 4+ messages in thread
From: Ferruh Yigit @ 2022-02-10 15:00 UTC (permalink / raw)
To: madhuker.mythri, grive; +Cc: dev
On 2/10/2022 7:10 AM, madhuker.mythri@oracle.com wrote:
> From: Madhuker Mythri <madhuker.mythri@oracle.com>
>
> Failsafe pmd started crashing with global devargs syntax as devargs is
> not memset to zero. Access it to in rte_devargs_parse resulted in a
> crash when called from secondary process.
>
> Bugzilla Id: 933
>
> Signed-off-by: Madhuker Mythri <madhuker.mythri@oracle.com>
> ---
> drivers/net/failsafe/failsafe.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/failsafe/failsafe.c b/drivers/net/failsafe/failsafe.c
> index 3c754a5f66..aa93cc6000 100644
> --- a/drivers/net/failsafe/failsafe.c
> +++ b/drivers/net/failsafe/failsafe.c
> @@ -360,6 +360,7 @@ rte_pmd_failsafe_probe(struct rte_vdev_device *vdev)
> if (sdev->devargs.name[0] == '\0')
> continue;
>
> + memset(&devargs, 0, sizeof(devargs));
> /* rebuild devargs to be able to get the bus name. */
> ret = rte_devargs_parse(&devargs,
> sdev->devargs.name);
if 'rte_devargs_parse()' requires 'devargs' parameter to be memset,
what do you think memset it in the API?
This prevents forgotten cases like this.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re:
2022-02-10 15:00 ` Ferruh Yigit
@ 2022-02-10 16:08 ` Gaëtan Rivet
0 siblings, 0 replies; 4+ messages in thread
From: Gaëtan Rivet @ 2022-02-10 16:08 UTC (permalink / raw)
To: Ferruh Yigit, madhuker.mythri; +Cc: dev
On Thu, Feb 10, 2022, at 16:00, Ferruh Yigit wrote:
> On 2/10/2022 7:10 AM, madhuker.mythri@oracle.com wrote:
>> From: Madhuker Mythri <madhuker.mythri@oracle.com>
>>
>> Failsafe pmd started crashing with global devargs syntax as devargs is
>> not memset to zero. Access it to in rte_devargs_parse resulted in a
>> crash when called from secondary process.
>>
>> Bugzilla Id: 933
>>
>> Signed-off-by: Madhuker Mythri <madhuker.mythri@oracle.com>
>> ---
>> drivers/net/failsafe/failsafe.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/net/failsafe/failsafe.c b/drivers/net/failsafe/failsafe.c
>> index 3c754a5f66..aa93cc6000 100644
>> --- a/drivers/net/failsafe/failsafe.c
>> +++ b/drivers/net/failsafe/failsafe.c
>> @@ -360,6 +360,7 @@ rte_pmd_failsafe_probe(struct rte_vdev_device *vdev)
>> if (sdev->devargs.name[0] == '\0')
>> continue;
>>
>> + memset(&devargs, 0, sizeof(devargs));
>> /* rebuild devargs to be able to get the bus name. */
>> ret = rte_devargs_parse(&devargs,
>> sdev->devargs.name);
>
> if 'rte_devargs_parse()' requires 'devargs' parameter to be memset,
> what do you think memset it in the API?
> This prevents forgotten cases like this.
Hi,
I was looking at it this morning.
Before the last release, rte_devargs_parse() was only supporting legacy syntax.
It never read from the devargs structure, only wrote to it. So it was safe to
use with a non-memset devargs.
The rte_devargs_layer_parse() however is more complex. To allow rte_dev_iterator_init() to call it without doing memory allocation, it reads parts of the devargs to make decisions.
Doing a first call to rte_devargs_layer_parse() as part of rte_devargs_parse() thus
modified the contract it had with the users, that it would never read from devargs.
It is not possible to completely avoid reading from devargs in rte_devargs_layer_parse().
It is necessary for RTE_DEV_FOREACH() to be safe to interrupt without having to do iterator cleanup.
This is my current understanding. In that context, yes I think it is preferrable to
do memset() within rte_devargs_parse(). It will restore the previous part of the API saying that calling it with non-memset devargs was safe to do.
Thanks,
--
Gaetan Rivet
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-08-14 15:04 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2024-08-14 8:03 howard_wang
2024-08-14 15:04 ` Stephen Hemminger
-- strict thread matches above, loose matches on Subject: below --
2024-01-24 0:14 [PATCH v3 0/7] net/gve: RSS Support for GVE Driver Joshua Washington
[not found] ` <20240126173317.2779230-1-joshwash@google.com>
2024-01-31 14:58 ` Ferruh Yigit
2022-02-10 7:10 [PATCH] net/failsafe: Fix crash due to global devargs syntax parsing from secondary process madhuker.mythri
2022-02-10 15:00 ` Ferruh Yigit
2022-02-10 16:08 ` Gaëtan Rivet
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