From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 99D5145845; Thu, 22 Aug 2024 12:51:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E179F42EE4; Thu, 22 Aug 2024 12:51:06 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by mails.dpdk.org (Postfix) with ESMTP id F263A42ED7 for ; Thu, 22 Aug 2024 12:51:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724323864; x=1755859864; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g7m4D9MpoZfTZ1C58rcKHWnj3SH6/vP32lFbobOB6cw=; b=AM+lWGk9Ij8zd/RFJD3CN59w7dihD7B0plhaHnjEPx10GIhHjasWHUa3 EujW9xtXuF/V/uKwxeBiIVd+dncair7b94jJFHTDCJq3d25xor7uaoiIJ bp7Vpm2sgJPF1i6E+FZEU6PpNCQiooBxZN7e/t9ChhK6/aXfPQMks4+EA mUkouxO0AlFD4Auy2aEyHiRjNA59wyUqLtCfjDAgqwBtgcYrkCzeTlB/o eZ561zUNGwkPHj3OfnqUgspzCaHF1/IBafLPyAtO7oqeDDsAN6DDUPgWM X5Ua+b5OHtHJIcN5j8B7nQwvWzcLfXymZs/90FZt/avyZj2TBR/aV63oN A==; X-CSE-ConnectionGUID: 1xAJzCW/T1O/V3shmQFMeg== X-CSE-MsgGUID: Cfutt9kCSISskgHzHXqudA== X-IronPort-AV: E=McAfee;i="6700,10204,11171"; a="22542290" X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="22542290" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Aug 2024 03:51:04 -0700 X-CSE-ConnectionGUID: lz1IFYAuTp2nBkaXM2Jg4g== X-CSE-MsgGUID: EWpC8WMtTdqb0AXx7izs3g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,166,1719903600"; d="scan'208";a="61559758" Received: from unknown (HELO npf-hyd-clx-03..) ([10.145.170.182]) by fmviesa010.fm.intel.com with ESMTP; 22 Aug 2024 03:51:01 -0700 From: Soumyadeep Hore To: bruce.richardson@intel.com, ian.stokes@intel.com, aman.deep.singh@intel.com Cc: dev@dpdk.org, shaiq.wani@intel.com Subject: [PATCH v1 09/12] net/ice: correct Tx Scheduler AQ command RD bit for E825C Date: Thu, 22 Aug 2024 09:56:09 +0000 Message-ID: <20240822095612.216214-10-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240822095612.216214-1-soumyadeep.hore@intel.com> References: <20240822095612.216214-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In E825C, regarding the Get Tx Topology AQ command, there is a change in the way that the RD bit must be set. For E825C, the RD bit must be cleared for the Get Tx Topology operation, whereas for E810 devices, the RD bit must be set. Signed-off-by: Soumyadeep Hore --- drivers/net/ice/base/ice_ddp.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_ddp.c b/drivers/net/ice/base/ice_ddp.c index 24506dfaea..d0c1cb9660 100644 --- a/drivers/net/ice/base/ice_ddp.c +++ b/drivers/net/ice/base/ice_ddp.c @@ -2270,6 +2270,22 @@ void ice_release_change_lock(struct ice_hw *hw) ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID); } +/** + * ice_is_get_tx_sched_new_format + * @hw: pointer to the HW struct + * + * Determines if the new format for the Tx scheduler get api is supported + */ +static bool +ice_is_get_tx_sched_new_format(struct ice_hw *hw) +{ + if (ice_is_e830(hw)) + return true; + if (ice_is_e825c(hw)) + return true; + return false; +} + /** * ice_get_set_tx_topo - get or set tx topology * @hw: pointer to the HW struct @@ -2303,7 +2319,7 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_tx_topo); cmd->get_flags = ICE_AQC_TX_TOPO_GET_RAM; - if (!ice_is_e830(hw)) + if (!ice_is_get_tx_sched_new_format(hw)) desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD); } -- 2.43.0