From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 06C9A45A74; Tue, 1 Oct 2024 08:02:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BE12240E0C; Tue, 1 Oct 2024 08:01:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8D14B40E09 for ; Tue, 1 Oct 2024 08:01:54 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49104bYA022640 for ; Mon, 30 Sep 2024 23:01:54 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=t oDJloAJuH8Wi/iYL+xZxAMOaSM2KjcoFgeZqSF05zE=; b=eqAd69+ftq62P6xj3 MYcwHdb9/xMGVSCvDdFr4jsk4gCYl+9bSqDw0/JabruMfWv9SXmvqeKB0eWTP+52 8Hl/Fa9EFeNLG2T7IxbiYuoGQON/7gmTg5G94ONzzs2jyJpMXYj1odctnbqCOK83 VQEjw5ubZT/hLgPXvf8hmCgGW/ZCT5kTv71V07+Ds9wneSct9ylnGEDhcLNXOCSy YJrlCFj2eESgxyE057XgxsNNGCNgU4bQvD1ShkEfepRQucEC2UG83ookaCoJBCz/ tgWxHE7AQ7tliSJqx6fKqjcNphABRQWAxc+21x8lcngGz+oOUChgYNIAYYCOBu+9 2lf9w== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 41yt6gbxrr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 30 Sep 2024 23:01:53 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 30 Sep 2024 23:01:52 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 30 Sep 2024 23:01:52 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 558F73F7066; Mon, 30 Sep 2024 23:01:49 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , Rakesh Kudurumalla Subject: [PATCH v2 16/17] net/cnxk: handle OOP for inbound packet Date: Tue, 1 Oct 2024 11:30:54 +0530 Message-ID: <20241001060055.3747591-16-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241001060055.3747591-1-ndabilpuram@marvell.com> References: <20241001060055.3747591-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 5p2QX1hvf-70WDyvlty6ZjVr274PoXdS X-Proofpoint-ORIG-GUID: 5p2QX1hvf-70WDyvlty6ZjVr274PoXdS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rakesh Kudurumalla To handle OOP for inbound packet, processing is done based on NIX_RX_REAS_F flag. but for boards that does not support reassembly Inbound Out-Of-Place processing test case fails because reassembly flag is not updated in event mode. This patch fixes the same. Signed-off-by: Rakesh Kudurumalla --- drivers/net/cnxk/cn10k_ethdev_sec.c | 10 ++++++++++ drivers/net/cnxk/cnxk_ethdev.h | 4 ++++ drivers/net/cnxk/version.map | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c index 84e570f5b9..e911c3730b 100644 --- a/drivers/net/cnxk/cn10k_ethdev_sec.c +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c @@ -28,6 +28,13 @@ PLT_STATIC_ASSERT(RTE_PMD_CNXK_AR_WIN_SIZE_MAX == ROC_AR_WIN_SIZE_MAX); PLT_STATIC_ASSERT(RTE_PMD_CNXK_LOG_MIN_AR_WIN_SIZE_M1 == ROC_LOG_MIN_AR_WIN_SIZE_M1); PLT_STATIC_ASSERT(RTE_PMD_CNXK_AR_WINBITS_SZ == ROC_AR_WINBITS_SZ); +cnxk_ethdev_rx_offload_cb_t cnxk_ethdev_rx_offload_cb; +void +cnxk_ethdev_rx_offload_cb_register(cnxk_ethdev_rx_offload_cb_t cb) +{ + cnxk_ethdev_rx_offload_cb = cb; +} + static struct rte_cryptodev_capabilities cn10k_eth_sec_crypto_caps[] = { { /* AES GCM */ .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, @@ -908,6 +915,9 @@ cn10k_eth_sec_session_create(void *device, !(dev->rx_offload_flags & NIX_RX_REAS_F)) { dev->rx_offload_flags |= NIX_RX_REAS_F; cn10k_eth_set_rx_function(eth_dev); + if (cnxk_ethdev_rx_offload_cb) + cnxk_ethdev_rx_offload_cb(eth_dev->data->port_id, + NIX_RX_REAS_F); } } else { struct roc_ot_ipsec_outb_sa *outb_sa, *outb_sa_dptr; diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index d4440b25ac..350adc1161 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -725,6 +725,10 @@ int cnxk_nix_lookup_mem_metapool_set(struct cnxk_eth_dev *dev); int cnxk_nix_lookup_mem_metapool_clear(struct cnxk_eth_dev *dev); __rte_internal int cnxk_nix_inb_mode_set(struct cnxk_eth_dev *dev, bool use_inl_dev); +typedef void (*cnxk_ethdev_rx_offload_cb_t)(uint16_t port_id, uint64_t flags); +__rte_internal +void cnxk_ethdev_rx_offload_cb_register(cnxk_ethdev_rx_offload_cb_t cb); + struct cnxk_eth_sec_sess *cnxk_eth_sec_sess_get_by_spi(struct cnxk_eth_dev *dev, uint32_t spi, bool inb); struct cnxk_eth_sec_sess * diff --git a/drivers/net/cnxk/version.map b/drivers/net/cnxk/version.map index 099c518ecf..edb0a1c059 100644 --- a/drivers/net/cnxk/version.map +++ b/drivers/net/cnxk/version.map @@ -23,4 +23,5 @@ EXPERIMENTAL { INTERNAL { global: cnxk_nix_inb_mode_set; + cnxk_ethdev_rx_offload_cb_register; }; -- 2.34.1