From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DE38D45A7A; Tue, 1 Oct 2024 14:42:26 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5F8B540A71; Tue, 1 Oct 2024 14:41:38 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id E38504069F for ; Tue, 1 Oct 2024 14:41:36 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 491BQYew006946 for ; Tue, 1 Oct 2024 05:41:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=a HCUJzYfLhw3E9+kMiO98Wf3zPsuu6aUPFIya24+fUo=; b=cXdy/f3LuFrOiN/G6 Raac7ro3jHgC3cF1yiUvD4Orr+P3qvY4AxfgObJvBe3Y2Q2i+VheZl1TFXQtb8PH nlVktOZi+LGDbRhGKyBUASbTI4wSO24VyZwldM3gS7ZtWj0qFjGDoOIkTqp3CD5c MPdz85ugEF2D6ybChsUK2qQOEjPrVdEp09mMaMnnv+vQ+0rh+7PTGYPm0T5tWGCu uMx8jOFdeQZM4vLTD9xTgquVUGmTI760f2//iV9wnWq/F97RuHvGZw0cgNhgdJjS iMvB6u3v2c45Y7rkv4BApmabq77HscXMUzagjyNo27xwUeLJ//UtuyG3dXiDWQVM 1q3Aw== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 420g6tr8yq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 01 Oct 2024 05:41:35 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 1 Oct 2024 05:41:34 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Tue, 1 Oct 2024 05:41:34 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id ED3415C68E3; Tue, 1 Oct 2024 05:41:31 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: Subject: [PATCH v3 09/18] common/cnxk: add RSS support for cn20k Date: Tue, 1 Oct 2024 18:10:44 +0530 Message-ID: <20241001124053.3774325-10-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241001124053.3774325-1-ndabilpuram@marvell.com> References: <20240910085909.1514457-1-ndabilpuram@marvell.com> <20241001124053.3774325-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: qiIOV6wH2vVymAskVIX7jfVClkuUrgTV X-Proofpoint-GUID: qiIOV6wH2vVymAskVIX7jfVClkuUrgTV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao Add RSS configuration support for cn20k. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_rss.c | 74 +++++++++++++++++++++++++++++-- 1 file changed, 70 insertions(+), 4 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_rss.c b/drivers/common/cnxk/roc_nix_rss.c index 2b88e1360d..fd1472e9b9 100644 --- a/drivers/common/cnxk/roc_nix_rss.c +++ b/drivers/common/cnxk/roc_nix_rss.c @@ -70,7 +70,7 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group, goto exit; req = mbox_alloc_msg_nix_aq_enq(mbox); if (!req) { - rc = NIX_ERR_NO_MEM; + rc = NIX_ERR_NO_MEM; goto exit; } } @@ -93,7 +93,7 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group, goto exit; req = mbox_alloc_msg_nix_aq_enq(mbox); if (!req) { - rc = NIX_ERR_NO_MEM; + rc = NIX_ERR_NO_MEM; goto exit; } } @@ -115,8 +115,8 @@ nix_cn9k_rss_reta_set(struct nix *nix, uint8_t group, } static int -nix_rss_reta_set(struct nix *nix, uint8_t group, - uint16_t reta[ROC_NIX_RSS_RETA_MAX], uint8_t lock_rx_ctx) +nix_cn10k_rss_reta_set(struct nix *nix, uint8_t group, uint16_t reta[ROC_NIX_RSS_RETA_MAX], + uint8_t lock_rx_ctx) { struct mbox *mbox = mbox_get((&nix->dev)->mbox); struct nix_cn10k_aq_enq_req *req; @@ -178,6 +178,70 @@ nix_rss_reta_set(struct nix *nix, uint8_t group, return rc; } +static int +nix_rss_reta_set(struct nix *nix, uint8_t group, uint16_t reta[ROC_NIX_RSS_RETA_MAX], + uint8_t lock_rx_ctx) +{ + struct mbox *mbox = mbox_get((&nix->dev)->mbox); + struct nix_cn20k_aq_enq_req *req; + uint16_t idx; + int rc; + + for (idx = 0; idx < nix->reta_sz; idx++) { + req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox); + if (!req) { + /* The shared memory buffer can be full. + * Flush it and retry + */ + rc = mbox_process(mbox); + if (rc < 0) + goto exit; + req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox); + if (!req) { + rc = NIX_ERR_NO_MEM; + goto exit; + } + } + req->rss.rq = reta[idx]; + /* Fill AQ info */ + req->qidx = (group * nix->reta_sz) + idx; + req->ctype = NIX_AQ_CTYPE_RSS; + req->op = NIX_AQ_INSTOP_INIT; + + if (!lock_rx_ctx) + continue; + + req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox); + if (!req) { + /* The shared memory buffer can be full. + * Flush it and retry + */ + rc = mbox_process(mbox); + if (rc < 0) + goto exit; + req = mbox_alloc_msg_nix_cn20k_aq_enq(mbox); + if (!req) { + rc = NIX_ERR_NO_MEM; + goto exit; + } + } + req->rss.rq = reta[idx]; + /* Fill AQ info */ + req->qidx = (group * nix->reta_sz) + idx; + req->ctype = NIX_AQ_CTYPE_RSS; + req->op = NIX_AQ_INSTOP_LOCK; + } + + rc = mbox_process(mbox); + if (rc < 0) + goto exit; + + rc = 0; +exit: + mbox_put(mbox); + return rc; +} + int roc_nix_rss_reta_set(struct roc_nix *roc_nix, uint8_t group, uint16_t reta[ROC_NIX_RSS_RETA_MAX]) @@ -191,6 +255,8 @@ roc_nix_rss_reta_set(struct roc_nix *roc_nix, uint8_t group, if (roc_model_is_cn9k()) rc = nix_cn9k_rss_reta_set(nix, group, reta, roc_nix->lock_rx_ctx); + else if (roc_model_is_cn10k()) + rc = nix_cn10k_rss_reta_set(nix, group, reta, roc_nix->lock_rx_ctx); else rc = nix_rss_reta_set(nix, group, reta, roc_nix->lock_rx_ctx); if (rc) -- 2.34.1