From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AB79B45A81; Tue, 1 Oct 2024 21:27:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5547D40615; Tue, 1 Oct 2024 21:27:01 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by mails.dpdk.org (Postfix) with ESMTP id 08CE9402E3 for ; Tue, 1 Oct 2024 21:26:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727810819; x=1759346819; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=5xgtuHoyCvaIKuSbfn/JLwHA3SglU9VIKeLWmN9D7Yc=; b=R5eA97HHl88hA4vF1EEJgAiWeyEu3bF9bgVQjfwgNVYgppGCPWdcSNrf ZeJxHcQ7Jpnk5Tl+mkIZHmEeL2PlrZb6LVWlxH5DLP5vHY5dQkcu24x4N rpXbamiCqf2IH6FMTcyYNV5cFqlF4E7tnkXcWmiALpe5On7tX/Ps6tX1R blO0NHQKbHiyrfsHGUv7npekJlD8hvAQpHVBq0E0mnvqTufsaW8nqgb1j zFUy6YJkZHQxuEBIh5m7sPcjzAQ13fhUjDPsVgGfeY+6HCKsRDJL8T8l8 TIfCIIUeIp+ygzAvX7+a8SAsquzeMm0SOYlo5F0X5p1EKfHuFP7BoX74J Q==; X-CSE-ConnectionGUID: bRSx+ZVQQpmB2GZRet+U1A== X-CSE-MsgGUID: kgUc5PkoR9OExAv6T6x/iA== X-IronPort-AV: E=McAfee;i="6700,10204,11212"; a="27139760" X-IronPort-AV: E=Sophos;i="6.11,169,1725346800"; d="scan'208";a="27139760" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Oct 2024 12:26:58 -0700 X-CSE-ConnectionGUID: opTaUBXhS0qTmNqQ7VpbQQ== X-CSE-MsgGUID: 7j7c7v0qTYyOtPcKXt7SQQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,169,1725346800"; d="scan'208";a="78521918" Received: from silpixa00399302.ir.intel.com ([10.237.214.22]) by orviesa005.jf.intel.com with ESMTP; 01 Oct 2024 12:26:57 -0700 From: Arkadiusz Kusztal To: dev@dpdk.org Cc: ferruh.yigit@amd.com, kai.ji@intel.com, brian.dooley@intel.com, Arkadiusz Kusztal Subject: [PATCH v2 2/3] crypto/qat: use process safe crc api Date: Tue, 1 Oct 2024 19:11:49 +0100 Message-Id: <20241001181150.43506-3-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20241001181150.43506-1-arkadiuszx.kusztal@intel.com> References: <20241001181150.43506-1-arkadiuszx.kusztal@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch replaces thread-unsafe CRC functions with the safe ones. Signed-off-by: Arkadiusz Kusztal --- doc/guides/cryptodevs/qat.rst | 6 ++++++ drivers/crypto/qat/qat_sym.h | 6 ++---- drivers/crypto/qat/qat_sym_session.c | 3 +++ drivers/crypto/qat/qat_sym_session.h | 2 ++ 4 files changed, 13 insertions(+), 4 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 68d792e4cc..d98195300b 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -148,6 +148,12 @@ Limitations DOCSIS security protocol. * Multi-segment buffers are not supported for combined Crypto-CRC DOCSIS security protocol. +* Max SIMD bitwidth (--force-max-simd-bitwidth) in multi-process may be ignored + by QAT in certain scenarios. In use cases where CRC computation is needed and + the device does not support it internally, the CRC context is created by the session; + therefore, the SIMD config used in the process that created the session will be persisant + across all processes. It is an undefined behavior when different process binaries are + compiled with different SIMD capabilities when using software CRC. Extra notes on KASUMI F9 ~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h index eedf5de755..d0fda48e01 100644 --- a/drivers/crypto/qat/qat_sym.h +++ b/drivers/crypto/qat/qat_sym.h @@ -267,8 +267,7 @@ qat_crc_verify(struct qat_sym_session *ctx, struct rte_crypto_op *op) crc_data = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *, crc_data_ofs); - crc = rte_net_crc_calc(crc_data, crc_data_len, - RTE_NET_CRC32_ETH); + crc = rte_net_crc(&ctx->crc, crc_data, crc_data_len); if (crc != *(uint32_t *)(crc_data + crc_data_len)) op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; @@ -291,8 +290,7 @@ qat_crc_generate(struct qat_sym_session *ctx, crc_data = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *, sym_op->auth.data.offset); crc = (uint32_t *)(crc_data + crc_data_len); - *crc = rte_net_crc_calc(crc_data, crc_data_len, - RTE_NET_CRC32_ETH); + *crc = rte_net_crc(&ctx->crc, crc_data, crc_data_len); } } diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c index eb267db424..4f281de9c5 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -3176,6 +3176,9 @@ qat_sec_session_set_docsis_parameters(struct rte_cryptodev *dev, ret = qat_sym_session_configure_crc(dev, xform, session); if (ret < 0) return ret; + } else { + /* Initialize crc algorithm */ + session->crc = rte_net_crc_set(RTE_NET_CRC_AVX512, RTE_NET_CRC32_ETH); } qat_sym_session_finalize(session); diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h index f2634774ec..fb84d0f494 100644 --- a/drivers/crypto/qat/qat_sym_session.h +++ b/drivers/crypto/qat/qat_sym_session.h @@ -7,6 +7,7 @@ #include #include #include +#include #include "qat_common.h" #include "icp_qat_hw.h" @@ -151,6 +152,7 @@ struct qat_sym_session { uint32_t slice_types; enum qat_sym_proto_flag qat_proto_flag; qat_sym_build_request_t build_request[2]; + struct rte_net_crc crc; #ifndef RTE_QAT_OPENSSL IMB_MGR *mb_mgr; alignas(16) uint64_t expkey[4 * 15]; -- 2.13.6