[RFC v0 1/1] dmadev: provide priority configuration support

[RFC v0 1/1] dmadev: provide priority configuration support

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority level
for the hardware command queues, allowing for the prioritization of
DMA command execution based on queue importance.

This patch introduces the necessary fields in the dmadev structures to
retrieve information about the hardware-supported priority levels and to
enable priority configuration from the application.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this RFC is intended to support a strict prioirty scheme.

 doc/guides/rel_notes/release_24_11.rst | 15 +++------------
 lib/dmadev/rte_dmadev.c                | 10 ++++++++++
 lib/dmadev/rte_dmadev.h                | 11 +++++++++++
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..dc711bbf98 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -88,18 +88,9 @@ API Changes
 ABI Changes
 -----------
 
-.. This section should contain ABI changes. Sample format:
-
-   * sample: Add a short 1-2 sentence description of the ABI change
-     which was announced in the previous releases and made in this release.
-     Start with a scope label like "ethdev:".
-     Use fixed width quotes for ``function_names`` or ``struct_names``.
-     Use the past tense.
-
-   This section is a comment. Do not overwrite or remove it.
-   Also, make sure to start the actual text at the margin.
-   =======================================================
-
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..053170f55a 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -497,6 +497,16 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if (dev_info.nb_priorities == 1) {
+		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..d59fcf1b61 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -297,6 +297,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +336,13 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The prioirty of the DMA HW channel.
+	 * This value cannot be greater than or equal to the field 'nb_priorities'
+	 * of struct rte_dma_info which get from rte_dma_info_get().
+	 * Among the values between '0' and 'nb_priorities - 1', lowest value
+	 * indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
-- 
2.34.1

Re: [RFC v0 1/1] dmadev: provide priority configuration support

[fengchengwen]

On 2024/9/13 20:10, Vamsi Krishna wrote:
> From: Vamsi Attunuru <vattunuru@marvell.com>
> 
> Some DMA controllers offer the ability to configure priority level
> for the hardware command queues, allowing for the prioritization of
> DMA command execution based on queue importance.
> 
> This patch introduces the necessary fields in the dmadev structures to
> retrieve information about the hardware-supported priority levels and to
> enable priority configuration from the application.
> 
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
> ---
> 
> Deprecation notice:
> https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/
> 
> * Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
>   this RFC is intended to support a strict prioirty scheme.
> 
>  doc/guides/rel_notes/release_24_11.rst | 15 +++------------
>  lib/dmadev/rte_dmadev.c                | 10 ++++++++++
>  lib/dmadev/rte_dmadev.h                | 11 +++++++++++
>  3 files changed, 24 insertions(+), 12 deletions(-)
> 
> diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
> index 0ff70d9057..dc711bbf98 100644
> --- a/doc/guides/rel_notes/release_24_11.rst
> +++ b/doc/guides/rel_notes/release_24_11.rst
> @@ -88,18 +88,9 @@ API Changes
>  ABI Changes
>  -----------
>  
> -.. This section should contain ABI changes. Sample format:
> -
> -   * sample: Add a short 1-2 sentence description of the ABI change
> -     which was announced in the previous releases and made in this release.
> -     Start with a scope label like "ethdev:".
> -     Use fixed width quotes for ``function_names`` or ``struct_names``.
> -     Use the past tense.
> -
> -   This section is a comment. Do not overwrite or remove it.
> -   Also, make sure to start the actual text at the margin.
> -   =======================================================
> -
> +* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
> +  ``priority`` field to ``rte_dma_conf`` structure to get device supported
> +  priority levels and configure required priority from the application.
>  
>  Known Issues
>  ------------
> diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
> index 845727210f..053170f55a 100644
> --- a/lib/dmadev/rte_dmadev.c
> +++ b/lib/dmadev/rte_dmadev.c
> @@ -497,6 +497,16 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
>  		return -EINVAL;
>  	}
>  
> +	if (dev_info.nb_priorities == 1) {
> +		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
> +		return -EINVAL;
> +	}
> +
> +	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
> +		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
> +		return -EINVAL;
> +	}

Please add trace support

> +
>  	if (*dev->dev_ops->dev_configure == NULL)
>  		return -ENOTSUP;
>  	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
> diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
> index 5474a5281d..d59fcf1b61 100644
> --- a/lib/dmadev/rte_dmadev.h
> +++ b/lib/dmadev/rte_dmadev.h
> @@ -297,6 +297,10 @@ struct rte_dma_info {
>  	int16_t numa_node;
>  	/** Number of virtual DMA channel configured. */
>  	uint16_t nb_vchans;
> +	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
> +	 * 0 otherwise.
> +	 */
> +	uint16_t nb_priorities;

Suggest add priority schedule policy capability, for example:
RTE_DMA_CAPA_PRIORITY_POLICY_SP

>  };
>  
>  /**
> @@ -332,6 +336,13 @@ struct rte_dma_conf {
>  	 * @see RTE_DMA_CAPA_SILENT
>  	 */
>  	bool enable_silent;
> +	/* The prioirty of the DMA HW channel.
> +	 * This value cannot be greater than or equal to the field 'nb_priorities'
> +	 * of struct rte_dma_info which get from rte_dma_info_get().
> +	 * Among the values between '0' and 'nb_priorities - 1', lowest value
> +	 * indicates higher priority and vice-versa.
> +	 */
> +	uint16_t priority;
>  };
>  
>  /**

RE: [EXTERNAL] Re: [RFC v0 1/1] dmadev: provide priority configuration support

[Vamsi Krishna Attunuru]

>-----Original Message-----
>From: fengchengwen <fengchengwen@huawei.com>
>Sent: Saturday, September 14, 2024 3:12 PM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; bruce.richardson@intel.com;
>mb@smartsharesystems.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com; Gowrishankar Muthukrishnan
><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Amit Prakash Shukla
><amitprakashs@marvell.com>
>Subject: [EXTERNAL] Re: [RFC v0 1/1] dmadev: provide priority configuration
>support
>
>On 2024/9/13 20: 10, Vamsi Krishna wrote: > From: Vamsi Attunuru
><vattunuru@ marvell. com> > > Some DMA controllers offer the ability to
>configure priority level > for the hardware command queues, allowing for the
>prioritization 
>On 2024/9/13 20:10, Vamsi Krishna wrote:
>> From: Vamsi Attunuru <vattunuru@marvell.com>
>>
>> Some DMA controllers offer the ability to configure priority level for
>> the hardware command queues, allowing for the prioritization of DMA
>> command execution based on queue importance.
>>
>> This patch introduces the necessary fields in the dmadev structures to
>> retrieve information about the hardware-supported priority levels and
>> to enable priority configuration from the application.
>>
>> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
>> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
>> ---
>>
>> Deprecation notice:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_
>> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>40marvell
>>
>.com_&d=DwICaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=WllrYaumVkxaWjgKto6E
>_rtDQshh
>>
>Ihik2jkvzFyRhW8&m=c5golEA5oYRC2qs5aUbwKAGfIFWAsjeOW4OaQaRl9pE11
>PNXlmhg
>> 2MEnn4OYFN8g&s=3XTQJ_S2k_9fzXvPXLOYdj4VFExnzZ04_uiB1qBaFv0&e=
>>
>> * Assuming we do not anticipate any advanced scheduling schemes for
>dmadev queues,
>>   this RFC is intended to support a strict prioirty scheme.
>>
>>  doc/guides/rel_notes/release_24_11.rst | 15 +++------------
>>  lib/dmadev/rte_dmadev.c                | 10 ++++++++++
>>  lib/dmadev/rte_dmadev.h                | 11 +++++++++++
>>  3 files changed, 24 insertions(+), 12 deletions(-)
>>
>> diff --git a/doc/guides/rel_notes/release_24_11.rst
>> b/doc/guides/rel_notes/release_24_11.rst
>> index 0ff70d9057..dc711bbf98 100644
>> --- a/doc/guides/rel_notes/release_24_11.rst
>> +++ b/doc/guides/rel_notes/release_24_11.rst
>> @@ -88,18 +88,9 @@ API Changes
>>  ABI Changes
>>  -----------
>>
>> -.. This section should contain ABI changes. Sample format:
>> -
>> -   * sample: Add a short 1-2 sentence description of the ABI change
>> -     which was announced in the previous releases and made in this release.
>> -     Start with a scope label like "ethdev:".
>> -     Use fixed width quotes for ``function_names`` or ``struct_names``.
>> -     Use the past tense.
>> -
>> -   This section is a comment. Do not overwrite or remove it.
>> -   Also, make sure to start the actual text at the margin.
>> -   =======================================================
>> -
>> +* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure
>> +and
>> +  ``priority`` field to ``rte_dma_conf`` structure to get device
>> +supported
>> +  priority levels and configure required priority from the application.
>>
>>  Known Issues
>>  ------------
>> diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c index
>> 845727210f..053170f55a 100644
>> --- a/lib/dmadev/rte_dmadev.c
>> +++ b/lib/dmadev/rte_dmadev.c
>> @@ -497,6 +497,16 @@ rte_dma_configure(int16_t dev_id, const struct
>rte_dma_conf *dev_conf)
>>  		return -EINVAL;
>>  	}
>>
>> +	if (dev_info.nb_priorities == 1) {
>> +		RTE_DMA_LOG(ERR, "Device %d must support more than 1
>priority, or else 0", dev_id);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if (dev_info.nb_priorities && (dev_conf->priority >=
>dev_info.nb_priorities)) {
>> +		RTE_DMA_LOG(ERR, "Device %d configure invalid priority",
>dev_id);
>> +		return -EINVAL;
>> +	}
>
>Please add trace support

Sure, will add it.

>
>> +
>>  	if (*dev->dev_ops->dev_configure == NULL)
>>  		return -ENOTSUP;
>>  	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf, diff --git
>> a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h index
>> 5474a5281d..d59fcf1b61 100644
>> --- a/lib/dmadev/rte_dmadev.h
>> +++ b/lib/dmadev/rte_dmadev.h
>> @@ -297,6 +297,10 @@ struct rte_dma_info {
>>  	int16_t numa_node;
>>  	/** Number of virtual DMA channel configured. */
>>  	uint16_t nb_vchans;
>> +	/** Number of priority levels (must be > 1), if supported by DMA HW
>channel.
>> +	 * 0 otherwise.
>> +	 */
>> +	uint16_t nb_priorities;
>
>Suggest add priority schedule policy capability, for example:
>RTE_DMA_CAPA_PRIORITY_POLICY_SP

Sure, since strict priority is only supported and not explicitly defined as a capability. Will add it as capability.
>
>>  };
>>
>>  /**
>> @@ -332,6 +336,13 @@ struct rte_dma_conf {
>>  	 * @see RTE_DMA_CAPA_SILENT
>>  	 */
>>  	bool enable_silent;
>> +	/* The prioirty of the DMA HW channel.
>> +	 * This value cannot be greater than or equal to the field 'nb_priorities'
>> +	 * of struct rte_dma_info which get from rte_dma_info_get().
>> +	 * Among the values between '0' and 'nb_priorities - 1', lowest value
>> +	 * indicates higher priority and vice-versa.
>> +	 */
>> +	uint16_t priority;
>>  };
>>
>>  /**

[RFC v1 1/1] dmadev: support priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority level
for the hardware command queues, allowing for the prioritization of
DMA command execution based on queue importance.

This patch introduces the necessary fields in the dmadev structures to
retrieve information about the hardware-supported priority levels and to
enable priority configuration from the application.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
v1 changes:
* added trace support
* added capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this RFC is intended to support a strict prioirty scheme.

 doc/guides/rel_notes/release_24_11.rst | 49 ++++----------------------
 lib/dmadev/rte_dmadev.c                | 15 ++++++++
 lib/dmadev/rte_dmadev.h                | 21 +++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 45 insertions(+), 42 deletions(-)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..2dc34919a9 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -24,37 +24,11 @@ DPDK Release 24.11
 New Features
 ------------
 
-.. This section should contain new features added in this release.
-   Sample format:
-
-   * **Add a title in the past tense with a full stop.**
-
-     Add a short 1-2 sentence description in the past tense.
-     The description should be enough to allow someone scanning
-     the release notes to understand the new feature.
-
-     If the feature adds a lot of sub-features you can use a bullet list
-     like this:
-
-     * Added feature foo to do something.
-     * Enhanced feature bar to do something else.
-
-     Refer to the previous release notes for examples.
-
-     Suggested order in release notes items:
-     * Core libs (EAL, mempool, ring, mbuf, buses)
-     * Device abstraction libs and PMDs (ordered alphabetically by vendor name)
-       - ethdev (lib, PMDs)
-       - cryptodev (lib, PMDs)
-       - eventdev (lib, PMDs)
-       - etc
-     * Other libs
-     * Apps, Examples, Tools (if significant)
-
-     This section is a comment. Do not overwrite or remove it.
-     Also, make sure to start the actual text at the margin.
-     =======================================================
+* **Added strict priority capability flag in dmadev.**
 
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority to its channels, allowing
+  for better control over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -88,18 +62,9 @@ API Changes
 ABI Changes
 -----------
 
-.. This section should contain ABI changes. Sample format:
-
-   * sample: Add a short 1-2 sentence description of the ABI change
-     which was announced in the previous releases and made in this release.
-     Start with a scope label like "ethdev:".
-     Use fixed width quotes for ``function_names`` or ``struct_names``.
-     Use the past tense.
-
-   This section is a comment. Do not overwrite or remove it.
-   Also, make sure to start the actual text at the margin.
-   =======================================================
-
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..3d9063dee3 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if (dev_conf->priority && !(dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP)) {
+		RTE_DMA_LOG(ERR, "Device %d don't support prioritization", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities == 1) {
+		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..fbe414a76f 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
 #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
 /** Support fill operation. */
 #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
+/** Support strict prioritization at DMA HW channel level
+ *
+ * If device supports HW channel prioritization then application could
+ * assign fixed priority to the DMA HW channel using 'priority' field in
+ * struct rte_dma_conf. Number of supported prioirty levels will be known
+ * from 'nb_priorities' field in struct rte_dma_info.
+ *
+ * DMA devices which support prioritization can advertise this capability.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)
 /**@}*/
 
 /**
@@ -297,6 +307,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +346,13 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA HW channel.
+	 * This value cannot be greater than or equal to the field 'nb_priorities'
+	 * of struct rte_dma_info which get from rte_dma_info_get().
+	 * Among the values between '0' and 'nb_priorities - 1', lowest value
+	 * indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

[RFC v2 1/1] dmadev: support priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority level
for the hardware command queues, allowing for the prioritization of
DMA command execution based on queue importance.

This patch introduces the necessary fields in the dmadev structures to
retrieve information about the hardware-supported priority levels and to
enable priority configuration from the application.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
V2 changes:
* Reverted removed text from release_24_11.rst

V1 changes:
* Added trace support
* Added new capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this RFC is intended to support a strict priority scheme.

 doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
 lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
 lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 46 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..fc3610deff 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -55,6 +55,11 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Added strict priority capability flag in dmadev.**
+
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority to its channels, allowing
+  for better control over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -100,6 +105,9 @@ ABI Changes
    Also, make sure to start the actual text at the margin.
    =======================================================
 
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..3d9063dee3 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if (dev_conf->priority && !(dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP)) {
+		RTE_DMA_LOG(ERR, "Device %d don't support prioritization", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities == 1) {
+		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..e5f730c327 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
 #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
 /** Support fill operation. */
 #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
+/** Support strict prioritization at DMA HW channel level
+ *
+ * If device supports HW channel prioritization then application could
+ * assign fixed priority to the DMA HW channel using 'priority' field in
+ * struct rte_dma_conf. Number of supported priority levels will be known
+ * from 'nb_priorities' field in struct rte_dma_info.
+ *
+ * DMA devices which support prioritization can advertise this capability.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)
 /**@}*/
 
 /**
@@ -297,6 +307,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +346,13 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA HW channel.
+	 * This value cannot be greater than or equal to the field 'nb_priorities'
+	 * of struct rte_dma_info which get from rte_dma_info_get().
+	 * Among the values between '0' and 'nb_priorities - 1', lowest value
+	 * indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

[PATCH v3 1/1] dmadev: support priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority level
for the hardware command queues, allowing for the prioritization of
DMA command execution based on queue importance.

This patch introduces the necessary fields in the dmadev structures to
retrieve information about the hardware-supported priority levels and to
enable priority configuration from the application.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
V3 changes:
* Corrected patch title

V2 changes:
* Reverted removed text from release_24_11.rst

V1 changes:
* Added trace support
* Added new capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this patch is intended to support a strict priority scheme.

 doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
 lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
 lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 46 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..fc3610deff 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -55,6 +55,11 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Added strict priority capability flag in dmadev.**
+
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority to its channels, allowing
+  for better control over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -100,6 +105,9 @@ ABI Changes
    Also, make sure to start the actual text at the margin.
    =======================================================
 
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..3d9063dee3 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if (dev_conf->priority && !(dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP)) {
+		RTE_DMA_LOG(ERR, "Device %d don't support prioritization", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities == 1) {
+		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..e5f730c327 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
 #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
 /** Support fill operation. */
 #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
+/** Support strict prioritization at DMA HW channel level
+ *
+ * If device supports HW channel prioritization then application could
+ * assign fixed priority to the DMA HW channel using 'priority' field in
+ * struct rte_dma_conf. Number of supported priority levels will be known
+ * from 'nb_priorities' field in struct rte_dma_info.
+ *
+ * DMA devices which support prioritization can advertise this capability.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)
 /**@}*/
 
 /**
@@ -297,6 +307,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +346,13 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA HW channel.
+	 * This value cannot be greater than or equal to the field 'nb_priorities'
+	 * of struct rte_dma_info which get from rte_dma_info_get().
+	 * Among the values between '0' and 'nb_priorities - 1', lowest value
+	 * indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

[PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority level
for the hardware command queues, allowing for the prioritization of
DMA command execution based on queue importance.

This patch introduces the necessary fields in the dmadev structures to
retrieve information about the hardware-supported priority levels and to
enable priority configuration from the application.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
V4 changes:
* Rebased onto the latest

V3 changes:
* Corrected patch title

V2 changes:
* Reverted removed text from release_24_11.rst

V1 changes:
* Added trace support
* Added new capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this patch is intended to support a strict priority scheme.

 doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
 lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
 lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 46 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index e0a9aa55a1..9672d8c679 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -67,6 +67,11 @@ New Features
 
   The new statistics are useful for debugging and profiling.
 
+* **Added strict priority capability flag in dmadev.**
+
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority to its channels, allowing
+  for better control over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -112,6 +117,9 @@ ABI Changes
    Also, make sure to start the actual text at the margin.
    =======================================================
 
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..3d9063dee3 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if (dev_conf->priority && !(dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP)) {
+		RTE_DMA_LOG(ERR, "Device %d don't support prioritization", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities == 1) {
+		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
+		return -EINVAL;
+	}
+
+	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..e5f730c327 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
 #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
 /** Support fill operation. */
 #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
+/** Support strict prioritization at DMA HW channel level
+ *
+ * If device supports HW channel prioritization then application could
+ * assign fixed priority to the DMA HW channel using 'priority' field in
+ * struct rte_dma_conf. Number of supported priority levels will be known
+ * from 'nb_priorities' field in struct rte_dma_info.
+ *
+ * DMA devices which support prioritization can advertise this capability.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)
 /**@}*/
 
 /**
@@ -297,6 +307,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +346,13 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA HW channel.
+	 * This value cannot be greater than or equal to the field 'nb_priorities'
+	 * of struct rte_dma_info which get from rte_dma_info_get().
+	 * Among the values between '0' and 'nb_priorities - 1', lowest value
+	 * indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Anoob Joseph]

Hi Vamsi,

Looks good overall. Minor nit inline.

With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>

Thanks,
Anoob

> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>
> Some DMA controllers offer the ability to configure priority level
> for the hardware command queues, allowing for the prioritization of
> DMA command execution based on queue importance.
>
> This patch introduces the necessary fields in the dmadev structures to
> retrieve information about the hardware-supported priority levels and to
> enable priority configuration from the application.
>
> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>
> ---
> V4 changes:
> * Rebased onto the latest
>
> V3 changes:
> * Corrected patch title
>
> V2 changes:
> * Reverted removed text from release_24_11.rst
>
> V1 changes:
> * Added trace support
> * Added new capability flag
>
> Deprecation notice:
> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-40marvell.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n6B-WYLn1v9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-mXf6ioWKtTZogLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqorE&e=
>
> * Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
>  this patch is intended to support a strict priority scheme.
>
> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
> lib/dmadev/rte_dmadev_trace.h          |  2 ++
> 4 files changed, 46 insertions(+)
>

<snip>

> --- a/lib/dmadev/rte_dmadev.h
> +++ b/lib/dmadev/rte_dmadev.h
> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
> #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
> /** Support fill operation. */
> #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
> +/** Support strict prioritization at DMA HW channel level
> + *
> + * If device supports HW channel prioritization then application could
> + * assign fixed priority to the DMA HW channel using 'priority' field in

[Anoob] Do we need to mention HW? Should we just use "DMA channel"? Here and in other places.

> + * struct rte_dma_conf. Number of supported priority levels will be known
> + * from 'nb_priorities' field in struct rte_dma_info.
> + *
> + * DMA devices which support prioritization can advertise this capability.
> + */

RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna Attunuru]

>-----Original Message-----
>From: Anoob Joseph <anoobj@marvell.com>
>Sent: Thursday, October 3, 2024 6:37 PM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; fengchengwen@huawei.com;
>bruce.richardson@intel.com; mb@smartsharesystems.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com; Gowrishankar Muthukrishnan
><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Vamsi Krishna Attunuru
><vattunuru@marvell.com>; Amit Prakash Shukla
><amitprakashs@marvell.com>
>Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>configuration
>
>Hi Vamsi,
>
>Looks good overall. Minor nit inline.
>
>With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>
>
>Thanks,
>Anoob
>
>> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>>
>> Some DMA controllers offer the ability to configure priority level for
>> the hardware command queues, allowing for the prioritization of DMA
>> command execution based on queue importance.
>>
>> This patch introduces the necessary fields in the dmadev structures to
>> retrieve information about the hardware-supported priority levels and
>> to enable priority configuration from the application.
>>
>> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>
>> ---
>> V4 changes:
>> * Rebased onto the latest
>>
>> V3 changes:
>> * Corrected patch title
>>
>> V2 changes:
>> * Reverted removed text from release_24_11.rst
>>
>> V1 changes:
>> * Added trace support
>> * Added new capability flag
>>
>> Deprecation notice:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_
>> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>40marvell
>>
>.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n6
>B-WYLn1v
>> 9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-
>mXf6ioWKtTZo
>> gLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqorE&e=
>>
>> * Assuming we do not anticipate any advanced scheduling schemes for
>> dmadev queues,  this patch is intended to support a strict priority scheme.
>>
>> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
>> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
>> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
>> lib/dmadev/rte_dmadev_trace.h          |  2 ++
>> 4 files changed, 46 insertions(+)
>>
>
><snip>
>
>> --- a/lib/dmadev/rte_dmadev.h
>> +++ b/lib/dmadev/rte_dmadev.h
>> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
>> #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
>> /** Support fill operation. */
>> #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
>> +/** Support strict prioritization at DMA HW channel level
>> + *
>> + * If device supports HW channel prioritization then application
>> +could
>> + * assign fixed priority to the DMA HW channel using 'priority' field
>> +in
>
>[Anoob] Do we need to mention HW? Should we just use "DMA channel"?
>Here and in other places.

[vamsi] It's mainly to differentiate between vchan(kind of sw channel) and hw channel.

>
>> + * struct rte_dma_conf. Number of supported priority levels will be
>> + known
>> + * from 'nb_priorities' field in struct rte_dma_info.
>> + *
>> + * DMA devices which support prioritization can advertise this capability.
>> + */

RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna Attunuru]

[-- Attachment #1: Type: text/plain, Size: 5511 bytes --]

Hi Feng,

Could you review V4 and let me know if it’s ready to be acked or if any changes are needed.

Regards
Vamsi

From: Vamsi Krishna Attunuru <vattunuru@marvell.com>
Sent: Thursday, October 3, 2024 6:46 PM
To: Anoob Joseph <anoobj@marvell.com>; thomas@monjalon.net; fengchengwen@huawei.com; bruce.richardson@intel.com; mb@smartsharesystems.com
Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>; conor.walsh@intel.com; Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>; Vidya Sagar Velumuri <vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com; hemant.agrawal@nxp.com; Amit Prakash Shukla <amitprakashs@marvell.com>
Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

>-----Original Message----- >From: Anoob Joseph <anoobj@ marvell. com> >Sent: Thursday, October 3, 2024 6: 37 PM >To: Vamsi Krishna Attunuru <vattunuru@ marvell. com>; >thomas@ monjalon. net; fengchengwen@ huawei. com; >bruce. richardson@ intel. com;






>-----Original Message-----

>From: Anoob Joseph <anoobj@marvell.com<mailto:anoobj@marvell.com>>

>Sent: Thursday, October 3, 2024 6:37 PM

>To: Vamsi Krishna Attunuru <vattunuru@marvell.com<mailto:vattunuru@marvell.com>>;

>thomas@monjalon.net<mailto:thomas@monjalon.net>; fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>;

>bruce.richardson@intel.com<mailto:bruce.richardson@intel.com>; mb@smartsharesystems.com<mailto:mb@smartsharesystems.com>

>Cc: dev@dpdk.org<mailto:dev@dpdk.org>; kevin.laatz@intel.com<mailto:kevin.laatz@intel.com>; Jerin Jacob <jerinj@marvell.com<mailto:jerinj@marvell.com>>;

>conor.walsh@intel.com<mailto:conor.walsh@intel.com>; Gowrishankar Muthukrishnan

><gmuthukrishn@marvell.com<mailto:gmuthukrishn@marvell.com>>; Vidya Sagar Velumuri

><vvelumuri@marvell.com<mailto:vvelumuri@marvell.com>>; g.singh@nxp.com<mailto:g.singh@nxp.com>; sachin.saxena@oss.nxp.com<mailto:sachin.saxena@oss.nxp.com>;

>hemant.agrawal@nxp.com<mailto:hemant.agrawal@nxp.com>; Vamsi Krishna Attunuru

><vattunuru@marvell.com<mailto:vattunuru@marvell.com>>; Amit Prakash Shukla

><amitprakashs@marvell.com<mailto:amitprakashs@marvell.com>>

>Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority

>configuration

>

>Hi Vamsi,

>

>Looks good overall. Minor nit inline.

>

>With the change, Acked-by: Anoob Joseph <anoobj@marvell.com<mailto:anoobj@marvell.com>>

>

>Thanks,

>Anoob

>

>> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>

>>

>> Some DMA controllers offer the ability to configure priority level for

>> the hardware command queues, allowing for the prioritization of DMA

>> command execution based on queue importance.

>>

>> This patch introduces the necessary fields in the dmadev structures to

>> retrieve information about the hardware-supported priority levels and

>> to enable priority configuration from the application.

>>

>> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>

>> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>

>> ---

>> V4 changes:

>> * Rebased onto the latest

>>

>> V3 changes:

>> * Corrected patch title

>>

>> V2 changes:

>> * Reverted removed text from release_24_11.rst

>>

>> V1 changes:

>> * Added trace support

>> * Added new capability flag

>>

>> Deprecation notice:

>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_<https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_%3e%3e>

>><https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_%3e%3e>project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-

>40marvell

>>

>.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n6

>B-WYLn1v

>> 9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-

>mXf6ioWKtTZo

>> gLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqorE&e=

>>

>> * Assuming we do not anticipate any advanced scheduling schemes for

>> dmadev queues,  this patch is intended to support a strict priority scheme.

>>

>> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++

>> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++

>> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++

>> lib/dmadev/rte_dmadev_trace.h          |  2 ++

>> 4 files changed, 46 insertions(+)

>>

>

><snip>

>

>> --- a/lib/dmadev/rte_dmadev.h

>> +++ b/lib/dmadev/rte_dmadev.h

>> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);

>> #define RTE_DMA_CAPA_OPS_COPY_SG            RTE_BIT64(33)

>> /** Support fill operation. */

>> #define RTE_DMA_CAPA_OPS_FILL                      RTE_BIT64(34)

>> +/** Support strict prioritization at DMA HW channel level

>> + *

>> + * If device supports HW channel prioritization then application

>> +could

>> + * assign fixed priority to the DMA HW channel using 'priority' field

>> +in

>

>[Anoob] Do we need to mention HW? Should we just use "DMA channel"?

>Here and in other places.



[vamsi] It's mainly to differentiate between vchan(kind of sw channel) and hw channel.



>

>> + * struct rte_dma_conf. Number of supported priority levels will be

>> + known

>> + * from 'nb_priorities' field in struct rte_dma_info.

>> + *

>> + * DMA devices which support prioritization can advertise this capability.

>> + */

[-- Attachment #2: Type: text/html, Size: 20305 bytes --]

RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Anoob Joseph]

Hi Vamsi,

Please see below.

Thanks,
Anoob

> -----Original Message-----
> From: Vamsi Krishna Attunuru <vattunuru@marvell.com>
> Sent: Thursday, October 3, 2024 6:46 PM
> To: Anoob Joseph <anoobj@marvell.com>; thomas@monjalon.net;
> fengchengwen@huawei.com; bruce.richardson@intel.com;
> mb@smartsharesystems.com
> Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
> conor.walsh@intel.com; Gowrishankar Muthukrishnan
> <gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
> <vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
> hemant.agrawal@nxp.com; Amit Prakash Shukla
> <amitprakashs@marvell.com>
> Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
> configuration
> 
> 
> 
> >-----Original Message-----
> >From: Anoob Joseph <anoobj@marvell.com>
> >Sent: Thursday, October 3, 2024 6:37 PM
> >To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
> >thomas@monjalon.net; fengchengwen@huawei.com;
> >bruce.richardson@intel.com; mb@smartsharesystems.com
> >Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob
> ><jerinj@marvell.com>; conor.walsh@intel.com; Gowrishankar
> Muthukrishnan
> ><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
> ><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
> >hemant.agrawal@nxp.com; Vamsi Krishna Attunuru
> <vattunuru@marvell.com>;
> >Amit Prakash Shukla <amitprakashs@marvell.com>
> >Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
> >configuration
> >
> >Hi Vamsi,
> >
> >Looks good overall. Minor nit inline.
> >
> >With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>
> >
> >Thanks,
> >Anoob
> >
> >> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
> >>
> >> Some DMA controllers offer the ability to configure priority level
> >> for the hardware command queues, allowing for the prioritization of
> >> DMA command execution based on queue importance.
> >>
> >> This patch introduces the necessary fields in the dmadev structures
> >> to retrieve information about the hardware-supported priority levels
> >> and to enable priority configuration from the application.
> >>
> >> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
> >> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>
> >> ---
> >> V4 changes:
> >> * Rebased onto the latest
> >>
> >> V3 changes:
> >> * Corrected patch title
> >>
> >> V2 changes:
> >> * Reverted removed text from release_24_11.rst
> >>
> >> V1 changes:
> >> * Added trace support
> >> * Added new capability flag
> >>
> >> Deprecation notice:
> >> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org
> >> _
> >> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
> >40marvell
> >>
> >.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n
> 6
> >B-WYLn1v
> >> 9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-
> >mXf6ioWKtTZo
> >> gLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-
> qNKx0oKgCqorE&e=
> >>
> >> * Assuming we do not anticipate any advanced scheduling schemes for
> >> dmadev queues,  this patch is intended to support a strict priority scheme.
> >>
> >> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
> >> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
> >> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
> >> lib/dmadev/rte_dmadev_trace.h          |  2 ++
> >> 4 files changed, 46 insertions(+)
> >>
> >
> ><snip>
> >
> >> --- a/lib/dmadev/rte_dmadev.h
> >> +++ b/lib/dmadev/rte_dmadev.h
> >> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
> >> #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
> >> /** Support fill operation. */
> >> #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
> >> +/** Support strict prioritization at DMA HW channel level
> >> + *
> >> + * If device supports HW channel prioritization then application
> >> +could
> >> + * assign fixed priority to the DMA HW channel using 'priority'
> >> +field in
> >
> >[Anoob] Do we need to mention HW? Should we just use "DMA channel"?
> >Here and in other places.
> 
> [vamsi] It's mainly to differentiate between vchan(kind of sw channel) and hw
> channel.

[Anoob] Okay. So the feature is specific to HW channels, right? Looks good in that case.

Acked-by: Anoob Joseph <anoobj@marvell.com>

RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna Attunuru]

>-----Original Message-----
>From: Anoob Joseph <anoobj@marvell.com>
>Sent: Thursday, October 3, 2024 7:59 PM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; fengchengwen@huawei.com;
>bruce.richardson@intel.com; mb@smartsharesystems.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com; Gowrishankar Muthukrishnan
><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Amit Prakash Shukla
><amitprakashs@marvell.com>
>Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>configuration
>
>Hi Vamsi,
>
>Please see below.
>
>Thanks,
>Anoob
>
>> -----Original Message-----
>> From: Vamsi Krishna Attunuru <vattunuru@marvell.com>
>> Sent: Thursday, October 3, 2024 6:46 PM
>> To: Anoob Joseph <anoobj@marvell.com>; thomas@monjalon.net;
>> fengchengwen@huawei.com; bruce.richardson@intel.com;
>> mb@smartsharesystems.com
>> Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob
>> <jerinj@marvell.com>; conor.walsh@intel.com; Gowrishankar
>> Muthukrishnan <gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
>> <vvelumuri@marvell.com>; g.singh@nxp.com;
>sachin.saxena@oss.nxp.com;
>> hemant.agrawal@nxp.com; Amit Prakash Shukla
><amitprakashs@marvell.com>
>> Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>> configuration
>>
>>
>>
>> >-----Original Message-----
>> >From: Anoob Joseph <anoobj@marvell.com>
>> >Sent: Thursday, October 3, 2024 6:37 PM
>> >To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>> >thomas@monjalon.net; fengchengwen@huawei.com;
>> >bruce.richardson@intel.com; mb@smartsharesystems.com
>> >Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob
>> ><jerinj@marvell.com>; conor.walsh@intel.com; Gowrishankar
>> Muthukrishnan
>> ><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
>> ><vvelumuri@marvell.com>; g.singh@nxp.com;
>sachin.saxena@oss.nxp.com;
>> >hemant.agrawal@nxp.com; Vamsi Krishna Attunuru
>> <vattunuru@marvell.com>;
>> >Amit Prakash Shukla <amitprakashs@marvell.com>
>> >Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>> >configuration
>> >
>> >Hi Vamsi,
>> >
>> >Looks good overall. Minor nit inline.
>> >
>> >With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>
>> >
>> >Thanks,
>> >Anoob
>> >
>> >> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> >>
>> >> Some DMA controllers offer the ability to configure priority level
>> >> for the hardware command queues, allowing for the prioritization of
>> >> DMA command execution based on queue importance.
>> >>
>> >> This patch introduces the necessary fields in the dmadev structures
>> >> to retrieve information about the hardware-supported priority
>> >> levels and to enable priority configuration from the application.
>> >>
>> >> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> >> Signed-off-by: Amit Prakash Shukla
>> >> <mailto:amitprakashs@marvell.com>
>> >> ---
>> >> V4 changes:
>> >> * Rebased onto the latest
>> >>
>> >> V3 changes:
>> >> * Corrected patch title
>> >>
>> >> V2 changes:
>> >> * Reverted removed text from release_24_11.rst
>> >>
>> >> V1 changes:
>> >> * Added trace support
>> >> * Added new capability flag
>> >>
>> >> Deprecation notice:
>> >> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.o
>> >> rg
>> >> _
>> >> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>> >40marvell
>> >>
>>
>>.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n
>> 6
>> >B-WYLn1v
>> >> 9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-
>> >mXf6ioWKtTZo
>> >> gLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-
>> qNKx0oKgCqorE&e=
>> >>
>> >> * Assuming we do not anticipate any advanced scheduling schemes for
>> >> dmadev queues,  this patch is intended to support a strict priority
>scheme.
>> >>
>> >> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
>> >> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
>> >> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
>> >> lib/dmadev/rte_dmadev_trace.h          |  2 ++
>> >> 4 files changed, 46 insertions(+)
>> >>
>> >
>> ><snip>
>> >
>> >> --- a/lib/dmadev/rte_dmadev.h
>> >> +++ b/lib/dmadev/rte_dmadev.h
>> >> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t
>start_dev_id);
>> >> #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
>> >> /** Support fill operation. */
>> >> #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
>> >> +/** Support strict prioritization at DMA HW channel level
>> >> + *
>> >> + * If device supports HW channel prioritization then application
>> >> +could
>> >> + * assign fixed priority to the DMA HW channel using 'priority'
>> >> +field in
>> >
>> >[Anoob] Do we need to mention HW? Should we just use "DMA channel"?
>> >Here and in other places.
>>
>> [vamsi] It's mainly to differentiate between vchan(kind of sw channel)
>> and hw channel.
>
>[Anoob] Okay. So the feature is specific to HW channels, right? Looks good in
>that case.
>
Yes Anoob.

Thanks
Vamsi

>Acked-by: Anoob Joseph <anoobj@marvell.com>

Re: [PATCH v4 1/1] dmadev: support priority configuration

[fengchengwen]

Hi,

Sorry to reply now, because I just got back from our National Day vacation.

From the commit it seem confused about the dmadev and HW channel, Current one dmadev is corresponding a HW channel if its a hardware device.
So I suggest try not to mention HW channel, but the dmadev or DMA device.

Suggest the tile of the commit: dmadev: support strict priority configuration

On 2024/10/3 19:53, Vamsi Krishna wrote:
> From: Vamsi Attunuru <vattunuru@marvell.com>
> 
> Some DMA controllers offer the ability to configure priority level
> for the hardware command queues, allowing for the prioritization of

Let align the queues to channels
for the hardware DMA channels,

> DMA command execution based on queue importance.

based on channel importance.

> 
> This patch introduces the necessary fields in the dmadev structures to
> retrieve information about the hardware-supported priority levels and to
> enable priority configuration from the application.

This patch supports such strict priority configuration. If the dmadev supports, it should
declared the capability flag RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict priority configuration.

> 
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
> ---
> V4 changes:
> * Rebased onto the latest
> 
> V3 changes:
> * Corrected patch title
> 
> V2 changes:
> * Reverted removed text from release_24_11.rst
> 
> V1 changes:
> * Added trace support
> * Added new capability flag
> 
> Deprecation notice:
> https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/
> 
> * Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
>   this patch is intended to support a strict priority scheme.
> 
>  doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
>  lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
>  lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
>  lib/dmadev/rte_dmadev_trace.h          |  2 ++
>  4 files changed, 46 insertions(+)
> 
> diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
> index e0a9aa55a1..9672d8c679 100644
> --- a/doc/guides/rel_notes/release_24_11.rst
> +++ b/doc/guides/rel_notes/release_24_11.rst
> @@ -67,6 +67,11 @@ New Features
>  
>    The new statistics are useful for debugging and profiling.
>  
> +* **Added strict priority capability flag in dmadev.**
> +
> +  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
> +  DMA device supports assigning fixed priority to its channels, allowing
> +  for better control over resource allocation and scheduling.

Please refine:

Add strict priority capability for dmadev.

Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the DMA device supports assigned fixed priority, allowing
for better control over resource allocation and scheduling.

>  
>  Removed Items
>  -------------
> @@ -112,6 +117,9 @@ ABI Changes
>     Also, make sure to start the actual text at the margin.
>     =======================================================
>  
> +* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
> +  ``priority`` field to ``rte_dma_conf`` structure to get device supported
> +  priority levels and configure required priority from the application.
>  
>  Known Issues
>  ------------
> diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
> index 845727210f..3d9063dee3 100644
> --- a/lib/dmadev/rte_dmadev.c
> +++ b/lib/dmadev/rte_dmadev.c
> @@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
>  		return -EINVAL;
>  	}
>  
> +	if (dev_conf->priority && !(dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP)) {
> +		RTE_DMA_LOG(ERR, "Device %d don't support prioritization", dev_id);
> +		return -EINVAL;
> +	}
> +
> +	if (dev_info.nb_priorities == 1) {
> +		RTE_DMA_LOG(ERR, "Device %d must support more than 1 priority, or else 0", dev_id);
> +		return -EINVAL;
> +	}

Please consider other driver which don't set nb_priorities, then it will failed in the above branch.

Suggest add this verify in rte_dma_info_get(), make sure that this field should be > 1 if it supported PRI_POLICY_SP.

> +
> +	if (dev_info.nb_priorities && (dev_conf->priority >= dev_info.nb_priorities)) {
> +		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
> +		return -EINVAL;
> +	}
> +
>  	if (*dev->dev_ops->dev_configure == NULL)
>  		return -ENOTSUP;
>  	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
> diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
> index 5474a5281d..e5f730c327 100644
> --- a/lib/dmadev/rte_dmadev.h
> +++ b/lib/dmadev/rte_dmadev.h
> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
>  #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
>  /** Support fill operation. */
>  #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
> +/** Support strict prioritization at DMA HW channel level
> + *
> + * If device supports HW channel prioritization then application could
> + * assign fixed priority to the DMA HW channel using 'priority' field in
> + * struct rte_dma_conf. Number of supported priority levels will be known
> + * from 'nb_priorities' field in struct rte_dma_info.
> + *
> + * DMA devices which support prioritization can advertise this capability.

How about:
Support strict priority scheduling.

Application could assign fixed priority to the DMA device using 'priority' field in
struct rte_dma_conf. Number of supported priority levels will be known from 'nb_priorities'
field in struct rte_dma_info.

> + */
> +#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)

This capa is a control plane flag, so please add after RTE_DMA_CAPA_M2D_AUTO_FREE.

>  /**@}*/
>  
>  /**
> @@ -297,6 +307,10 @@ struct rte_dma_info {
>  	int16_t numa_node;
>  	/** Number of virtual DMA channel configured. */
>  	uint16_t nb_vchans;
> +	/** Number of priority levels (must be > 1), if supported by DMA HW channel.
> +	 * 0 otherwise.

How about "Number of priority levels (must be > 1) if supported priority scheduling."

A DMA HW channel was just one dmadev, suggest don't introduce it.

> +	 */
> +	uint16_t nb_priorities;
>  };
>  
>  /**
> @@ -332,6 +346,13 @@ struct rte_dma_conf {
>  	 * @see RTE_DMA_CAPA_SILENT
>  	 */
>  	bool enable_silent;
> +	/* The priority of the DMA HW channel.
> +	 * This value cannot be greater than or equal to the field 'nb_priorities'
> +	 * of struct rte_dma_info which get from rte_dma_info_get().
> +	 * Among the values between '0' and 'nb_priorities - 1', lowest value
> +	 * indicates higher priority and vice-versa.

How about (you could retouch it. I'm not a native English speaker.):
The priority of the DMA device.
If the the DMA device don't support priority scheduling, this value should be zero.
Otherwise, the value should lower than the field 'nb_priorities' of struct rte_dma_info
which get from rte_dma_info_get(). And also lowest value indicates higher priority and vice-versa.

> +	 */
> +	uint16_t priority;
>  };
>  
>  /**
> diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
> index e55c4c6091..be089c065c 100644
> --- a/lib/dmadev/rte_dmadev_trace.h
> +++ b/lib/dmadev/rte_dmadev_trace.h
> @@ -35,6 +35,7 @@ RTE_TRACE_POINT(
>  	rte_trace_point_emit_u16(dev_info->max_sges);
>  	rte_trace_point_emit_i16(dev_info->numa_node);
>  	rte_trace_point_emit_u16(dev_info->nb_vchans);
> +	rte_trace_point_emit_u16(dev_info->nb_priorities);
>  )
>  
>  RTE_TRACE_POINT(
> @@ -48,6 +49,7 @@ RTE_TRACE_POINT(
>  	int enable_silent = (int)dev_conf->enable_silent;
>  	rte_trace_point_emit_i16(dev_id);
>  	rte_trace_point_emit_u16(dev_conf->nb_vchans);
> +	rte_trace_point_emit_u16(dev_conf->priority);
>  	rte_trace_point_emit_int(enable_silent);
>  	rte_trace_point_emit_int(ret);
>  )

Please also modify dma_capability_name and dmadev_handle_dev_info,

RE: [EXTERNAL] Re: [PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna Attunuru]

Thank you, Feng, for reviewing the patch. I agree with the comments that are suggested, will rework, and send next version.

Regards
Vamsi

>-----Original Message-----
>From: fengchengwen <fengchengwen@huawei.com>
>Sent: Tuesday, October 8, 2024 8:07 AM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; bruce.richardson@intel.com;
>mb@smartsharesystems.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com; Gowrishankar Muthukrishnan
><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Amit Prakash Shukla
><amitprakashs@marvell.com>
>Subject: [EXTERNAL] Re: [PATCH v4 1/1] dmadev: support priority
>configuration
>
>Hi, Sorry to reply now, because I just got back from our National Day vacation.
>From the commit it seem confused about the dmadev and HW channel,
>Current one dmadev is corresponding a HW channel if its a hardware device.
>So I suggest try not 
>Hi,
>
>Sorry to reply now, because I just got back from our National Day vacation.
>
>From the commit it seem confused about the dmadev and HW channel,
>Current one dmadev is corresponding a HW channel if its a hardware device.
>So I suggest try not to mention HW channel, but the dmadev or DMA device.
>
>Suggest the tile of the commit: dmadev: support strict priority configuration
>
>On 2024/10/3 19:53, Vamsi Krishna wrote:
>> From: Vamsi Attunuru <vattunuru@marvell.com>
>>
>> Some DMA controllers offer the ability to configure priority level for
>> the hardware command queues, allowing for the prioritization of
>
>Let align the queues to channels
>for the hardware DMA channels,
>
>> DMA command execution based on queue importance.
>
>based on channel importance.
>
>>
>> This patch introduces the necessary fields in the dmadev structures to
>> retrieve information about the hardware-supported priority levels and
>> to enable priority configuration from the application.
>
>This patch supports such strict priority configuration. If the dmadev supports,
>it should declared the capability flag RTE_DMA_CAPA_PRI_POLICY_SP, then
>application could enable strict priority configuration.
>
>>
>> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
>> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
>> ---
>> V4 changes:
>> * Rebased onto the latest
>>
>> V3 changes:
>> * Corrected patch title
>>
>> V2 changes:
>> * Reverted removed text from release_24_11.rst
>>
>> V1 changes:
>> * Added trace support
>> * Added new capability flag
>>
>> Deprecation notice:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_
>> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>40marvell
>>
>.com_&d=DwICaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=WllrYaumVkxaWjgKto6E
>_rtDQshh
>> Ihik2jkvzFyRhW8&m=Bs48xsaE5RgtPTZ5CoHM0E7Jn1c5no1ae-
>iuOVu8sJXD2414W2oU
>>
>rkmSASXpK1bA&s=RCRKJ2naUgpLqMM_qB_pD6hc6bFN7Tbl4XCEByoG9Cw&
>e=
>>
>> * Assuming we do not anticipate any advanced scheduling schemes for
>dmadev queues,
>>   this patch is intended to support a strict priority scheme.
>>
>>  doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
>>  lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
>>  lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
>>  lib/dmadev/rte_dmadev_trace.h          |  2 ++
>>  4 files changed, 46 insertions(+)
>>
>> diff --git a/doc/guides/rel_notes/release_24_11.rst
>> b/doc/guides/rel_notes/release_24_11.rst
>> index e0a9aa55a1..9672d8c679 100644
>> --- a/doc/guides/rel_notes/release_24_11.rst
>> +++ b/doc/guides/rel_notes/release_24_11.rst
>> @@ -67,6 +67,11 @@ New Features
>>
>>    The new statistics are useful for debugging and profiling.
>>
>> +* **Added strict priority capability flag in dmadev.**
>> +
>> +  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check
>> + if the  DMA device supports assigning fixed priority to its
>> + channels, allowing  for better control over resource allocation and
>scheduling.
>
>Please refine:
>
>Add strict priority capability for dmadev.
>
>Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
>DMA device supports assigned fixed priority, allowing for better control over
>resource allocation and scheduling.
>
>>
>>  Removed Items
>>  -------------
>> @@ -112,6 +117,9 @@ ABI Changes
>>     Also, make sure to start the actual text at the margin.
>>     =======================================================
>>
>> +* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure
>> +and
>> +  ``priority`` field to ``rte_dma_conf`` structure to get device
>> +supported
>> +  priority levels and configure required priority from the application.
>>
>>  Known Issues
>>  ------------
>> diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c index
>> 845727210f..3d9063dee3 100644
>> --- a/lib/dmadev/rte_dmadev.c
>> +++ b/lib/dmadev/rte_dmadev.c
>> @@ -497,6 +497,21 @@ rte_dma_configure(int16_t dev_id, const struct
>rte_dma_conf *dev_conf)
>>  		return -EINVAL;
>>  	}
>>
>> +	if (dev_conf->priority && !(dev_info.dev_capa &
>RTE_DMA_CAPA_PRI_POLICY_SP)) {
>> +		RTE_DMA_LOG(ERR, "Device %d don't support prioritization",
>dev_id);
>> +		return -EINVAL;
>> +	}
>> +
>> +	if (dev_info.nb_priorities == 1) {
>> +		RTE_DMA_LOG(ERR, "Device %d must support more than 1
>priority, or else 0", dev_id);
>> +		return -EINVAL;
>> +	}
>
>Please consider other driver which don't set nb_priorities, then it will failed in
>the above branch.
>
>Suggest add this verify in rte_dma_info_get(), make sure that this field should
>be > 1 if it supported PRI_POLICY_SP.
>
>> +
>> +	if (dev_info.nb_priorities && (dev_conf->priority >=
>dev_info.nb_priorities)) {
>> +		RTE_DMA_LOG(ERR, "Device %d configure invalid priority",
>dev_id);
>> +		return -EINVAL;
>> +	}
>> +
>>  	if (*dev->dev_ops->dev_configure == NULL)
>>  		return -ENOTSUP;
>>  	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf, diff --git
>> a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h index
>> 5474a5281d..e5f730c327 100644
>> --- a/lib/dmadev/rte_dmadev.h
>> +++ b/lib/dmadev/rte_dmadev.h
>> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
>>  #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
>>  /** Support fill operation. */
>>  #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
>> +/** Support strict prioritization at DMA HW channel level
>> + *
>> + * If device supports HW channel prioritization then application
>> +could
>> + * assign fixed priority to the DMA HW channel using 'priority' field
>> +in
>> + * struct rte_dma_conf. Number of supported priority levels will be
>> +known
>> + * from 'nb_priorities' field in struct rte_dma_info.
>> + *
>> + * DMA devices which support prioritization can advertise this capability.
>
>How about:
>Support strict priority scheduling.
>
>Application could assign fixed priority to the DMA device using 'priority' field in
>struct rte_dma_conf. Number of supported priority levels will be known from
>'nb_priorities'
>field in struct rte_dma_info.
>
>> + */
>> +#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(35)
>
>This capa is a control plane flag, so please add after
>RTE_DMA_CAPA_M2D_AUTO_FREE.
>
>>  /**@}*/
>>
>>  /**
>> @@ -297,6 +307,10 @@ struct rte_dma_info {
>>  	int16_t numa_node;
>>  	/** Number of virtual DMA channel configured. */
>>  	uint16_t nb_vchans;
>> +	/** Number of priority levels (must be > 1), if supported by DMA HW
>channel.
>> +	 * 0 otherwise.
>
>How about "Number of priority levels (must be > 1) if supported priority
>scheduling."
>
>A DMA HW channel was just one dmadev, suggest don't introduce it.
>
>> +	 */
>> +	uint16_t nb_priorities;
>>  };
>>
>>  /**
>> @@ -332,6 +346,13 @@ struct rte_dma_conf {
>>  	 * @see RTE_DMA_CAPA_SILENT
>>  	 */
>>  	bool enable_silent;
>> +	/* The priority of the DMA HW channel.
>> +	 * This value cannot be greater than or equal to the field 'nb_priorities'
>> +	 * of struct rte_dma_info which get from rte_dma_info_get().
>> +	 * Among the values between '0' and 'nb_priorities - 1', lowest value
>> +	 * indicates higher priority and vice-versa.
>
>How about (you could retouch it. I'm not a native English speaker.):
>The priority of the DMA device.
>If the the DMA device don't support priority scheduling, this value should be
>zero.
>Otherwise, the value should lower than the field 'nb_priorities' of struct
>rte_dma_info which get from rte_dma_info_get(). And also lowest value
>indicates higher priority and vice-versa.
>
>> +	 */
>> +	uint16_t priority;
>>  };
>>
>>  /**
>> diff --git a/lib/dmadev/rte_dmadev_trace.h
>> b/lib/dmadev/rte_dmadev_trace.h index e55c4c6091..be089c065c 100644
>> --- a/lib/dmadev/rte_dmadev_trace.h
>> +++ b/lib/dmadev/rte_dmadev_trace.h
>> @@ -35,6 +35,7 @@ RTE_TRACE_POINT(
>>  	rte_trace_point_emit_u16(dev_info->max_sges);
>>  	rte_trace_point_emit_i16(dev_info->numa_node);
>>  	rte_trace_point_emit_u16(dev_info->nb_vchans);
>> +	rte_trace_point_emit_u16(dev_info->nb_priorities);
>>  )
>>
>>  RTE_TRACE_POINT(
>> @@ -48,6 +49,7 @@ RTE_TRACE_POINT(
>>  	int enable_silent = (int)dev_conf->enable_silent;
>>  	rte_trace_point_emit_i16(dev_id);
>>  	rte_trace_point_emit_u16(dev_conf->nb_vchans);
>> +	rte_trace_point_emit_u16(dev_conf->priority);
>>  	rte_trace_point_emit_int(enable_silent);
>>  	rte_trace_point_emit_int(ret);
>>  )
>
>Please also modify dma_capability_name and dmadev_handle_dev_info,

[PATCH v5 1/1] dmadev: support strict priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority
level for the DMA channels, allowing for the prioritization
of DMA command execution based on channel importance.

This patch supports such strict priority configuration. If the
dmadev supports, it should advertise the capability flag
RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict
priority configuration.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
V5 changes:
* Updated comments and commit message
* Addressed V4 review comments

V4 changes:
* Rebased onto the latest

V3 changes:
* Corrected patch title

V2 changes:
* Reverted removed text from release_24_11.rst

V1 changes:
* Added trace support
* Added new capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this patch is intended to support a strict priority scheme.

 doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
 lib/dmadev/rte_dmadev.c                | 14 ++++++++++++++
 lib/dmadev/rte_dmadev.h                | 19 +++++++++++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 43 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index e0a9aa55a1..8953e02836 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -67,6 +67,11 @@ New Features
 
   The new statistics are useful for debugging and profiling.
 
+* **Added strict priority capability for dmadev.**
+
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority, allowing for better control
+  over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -112,6 +117,9 @@ ABI Changes
    Also, make sure to start the actual text at the margin.
    =======================================================
 
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..0d92d15d65 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -450,6 +450,11 @@ rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)
 	if (ret != 0)
 		return ret;
 
+	if ((dev_info->dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) && (dev_info->nb_priorities <= 1)) {
+		RTE_DMA_LOG(ERR, "Num of priorities must be > 1 for Device %d", dev_id);
+		return -EINVAL;
+	}
+
 	dev_info->dev_name = dev->data->dev_name;
 	dev_info->numa_node = dev->device->numa_node;
 	dev_info->nb_vchans = dev->data->dev_conf.nb_vchans;
@@ -497,6 +502,12 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if ((dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) &&
+	    (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
@@ -769,6 +780,7 @@ dma_capability_name(uint64_t capability)
 		{ RTE_DMA_CAPA_SILENT,      "silent"  },
 		{ RTE_DMA_CAPA_HANDLES_ERRORS, "handles_errors" },
 		{ RTE_DMA_CAPA_M2D_AUTO_FREE,  "m2d_auto_free"  },
+		{ RTE_DMA_CAPA_PRI_POLICY_SP,  "pri_policy_sp" },
 		{ RTE_DMA_CAPA_OPS_COPY,    "copy"    },
 		{ RTE_DMA_CAPA_OPS_COPY_SG, "copy_sg" },
 		{ RTE_DMA_CAPA_OPS_FILL,    "fill"    },
@@ -955,6 +967,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused,
 	rte_tel_data_start_dict(d);
 	rte_tel_data_add_dict_string(d, "name", dma_info.dev_name);
 	rte_tel_data_add_dict_int(d, "nb_vchans", dma_info.nb_vchans);
+	rte_tel_data_add_dict_int(d, "nb_priorities", dma_info.nb_priorities);
 	rte_tel_data_add_dict_int(d, "numa_node", dma_info.numa_node);
 	rte_tel_data_add_dict_int(d, "max_vchans", dma_info.max_vchans);
 	rte_tel_data_add_dict_int(d, "max_desc", dma_info.max_desc);
@@ -974,6 +987,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused,
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_SILENT);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_HANDLES_ERRORS);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_M2D_AUTO_FREE);
+	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_PRI_POLICY_SP);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY_SG);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_FILL);
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index 5474a5281d..fd0e9bedb4 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -258,6 +258,13 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
  * rte_dma_vchan_setup() will fail.
  */
 #define RTE_DMA_CAPA_M2D_AUTO_FREE      RTE_BIT64(7)
+/** Support strict priority scheduling.
+ *
+ * Application could assign fixed priority to the DMA device using 'priority'
+ * field in struct rte_dma_conf. Number of supported priority levels will be
+ * known from 'nb_priorities' field in struct rte_dma_info.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(8)
 
 /** Support copy operation.
  * This capability start with index of 32, so that it could leave gap between
@@ -297,6 +304,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1) if priority scheduling is supported,
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +343,14 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA device.
+	 * This value should be lower than the field 'nb_priorities' of struct
+	 * rte_dma_info which get from rte_dma_info_get(). If the DMA device
+	 * does not support priority scheduling, this value should be zero.
+	 *
+	 * Lowest value indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

Re: [PATCH v5 1/1] dmadev: support strict priority configuration

[fengchengwen]

Acked-by: Chengwen Feng <fengchengwen@huawei.com>

On 2024/10/11 17:13, Vamsi Krishna wrote:
> From: Vamsi Attunuru <vattunuru@marvell.com>
> 
> Some DMA controllers offer the ability to configure priority
> level for the DMA channels, allowing for the prioritization
> of DMA command execution based on channel importance.
> 
> This patch supports such strict priority configuration. If the
> dmadev supports, it should advertise the capability flag
> RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict
> priority configuration.
> 
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
> ---

[PATCH v6 1/1] dmadev: support strict priority configuration

[Vamsi Krishna]

From: Vamsi Attunuru <vattunuru@marvell.com>

Some DMA controllers offer the ability to configure priority
level for the DMA channels, allowing for the prioritization
of DMA command execution based on channel importance.

This patch supports such strict priority configuration. If the
dmadev supports, it should advertise the capability flag
RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict
priority configuration.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
---
V6 changes:
* Rebased onto the latest

V5 changes:
* Updated comments and commit message
* Addressed V4 review comments

V4 changes:
* Rebased onto the latest

V3 changes:
* Corrected patch title

V2 changes:
* Reverted removed text from release_24_11.rst

V1 changes:
* Added trace support
* Added new capability flag

Deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/

* Assuming we do not anticipate any advanced scheduling schemes for dmadev queues,
  this patch is intended to support a strict priority scheme.

 doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
 lib/dmadev/rte_dmadev.c                | 14 ++++++++++++++
 lib/dmadev/rte_dmadev.h                | 19 +++++++++++++++++++
 lib/dmadev/rte_dmadev_trace.h          |  2 ++
 4 files changed, 43 insertions(+)

diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 53d8661365..5ee318b797 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -150,6 +150,11 @@ New Features
 
   * Added independent enqueue feature.
 
+* **Added strict priority capability for dmadev.**
+
+  Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the
+  DMA device supports assigning fixed priority, allowing for better control
+  over resource allocation and scheduling.
 
 Removed Items
 -------------
@@ -221,6 +226,9 @@ ABI Changes
 
 * eventdev: Added ``preschedule_type`` field to ``rte_event_dev_config`` structure.
 
+* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and
+  ``priority`` field to ``rte_dma_conf`` structure to get device supported
+  priority levels and configure required priority from the application.
 
 Known Issues
 ------------
diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c
index 845727210f..0d92d15d65 100644
--- a/lib/dmadev/rte_dmadev.c
+++ b/lib/dmadev/rte_dmadev.c
@@ -450,6 +450,11 @@ rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)
 	if (ret != 0)
 		return ret;
 
+	if ((dev_info->dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) && (dev_info->nb_priorities <= 1)) {
+		RTE_DMA_LOG(ERR, "Num of priorities must be > 1 for Device %d", dev_id);
+		return -EINVAL;
+	}
+
 	dev_info->dev_name = dev->data->dev_name;
 	dev_info->numa_node = dev->device->numa_node;
 	dev_info->nb_vchans = dev->data->dev_conf.nb_vchans;
@@ -497,6 +502,12 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf)
 		return -EINVAL;
 	}
 
+	if ((dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) &&
+	    (dev_conf->priority >= dev_info.nb_priorities)) {
+		RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id);
+		return -EINVAL;
+	}
+
 	if (*dev->dev_ops->dev_configure == NULL)
 		return -ENOTSUP;
 	ret = (*dev->dev_ops->dev_configure)(dev, dev_conf,
@@ -769,6 +780,7 @@ dma_capability_name(uint64_t capability)
 		{ RTE_DMA_CAPA_SILENT,      "silent"  },
 		{ RTE_DMA_CAPA_HANDLES_ERRORS, "handles_errors" },
 		{ RTE_DMA_CAPA_M2D_AUTO_FREE,  "m2d_auto_free"  },
+		{ RTE_DMA_CAPA_PRI_POLICY_SP,  "pri_policy_sp" },
 		{ RTE_DMA_CAPA_OPS_COPY,    "copy"    },
 		{ RTE_DMA_CAPA_OPS_COPY_SG, "copy_sg" },
 		{ RTE_DMA_CAPA_OPS_FILL,    "fill"    },
@@ -955,6 +967,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused,
 	rte_tel_data_start_dict(d);
 	rte_tel_data_add_dict_string(d, "name", dma_info.dev_name);
 	rte_tel_data_add_dict_int(d, "nb_vchans", dma_info.nb_vchans);
+	rte_tel_data_add_dict_int(d, "nb_priorities", dma_info.nb_priorities);
 	rte_tel_data_add_dict_int(d, "numa_node", dma_info.numa_node);
 	rte_tel_data_add_dict_int(d, "max_vchans", dma_info.max_vchans);
 	rte_tel_data_add_dict_int(d, "max_desc", dma_info.max_desc);
@@ -974,6 +987,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused,
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_SILENT);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_HANDLES_ERRORS);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_M2D_AUTO_FREE);
+	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_PRI_POLICY_SP);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY_SG);
 	ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_FILL);
diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index d174d325a1..2f9304a9db 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -258,6 +258,13 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
  * rte_dma_vchan_setup() will fail.
  */
 #define RTE_DMA_CAPA_M2D_AUTO_FREE      RTE_BIT64(7)
+/** Support strict priority scheduling.
+ *
+ * Application could assign fixed priority to the DMA device using 'priority'
+ * field in struct rte_dma_conf. Number of supported priority levels will be
+ * known from 'nb_priorities' field in struct rte_dma_info.
+ */
+#define RTE_DMA_CAPA_PRI_POLICY_SP	RTE_BIT64(8)
 
 /** Support copy operation.
  * This capability start with index of 32, so that it could leave gap between
@@ -297,6 +304,10 @@ struct rte_dma_info {
 	int16_t numa_node;
 	/** Number of virtual DMA channel configured. */
 	uint16_t nb_vchans;
+	/** Number of priority levels (must be > 1) if priority scheduling is supported,
+	 * 0 otherwise.
+	 */
+	uint16_t nb_priorities;
 };
 
 /**
@@ -332,6 +343,14 @@ struct rte_dma_conf {
 	 * @see RTE_DMA_CAPA_SILENT
 	 */
 	bool enable_silent;
+	/* The priority of the DMA device.
+	 * This value should be lower than the field 'nb_priorities' of struct
+	 * rte_dma_info which get from rte_dma_info_get(). If the DMA device
+	 * does not support priority scheduling, this value should be zero.
+	 *
+	 * Lowest value indicates higher priority and vice-versa.
+	 */
+	uint16_t priority;
 };
 
 /**
diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h
index e55c4c6091..be089c065c 100644
--- a/lib/dmadev/rte_dmadev_trace.h
+++ b/lib/dmadev/rte_dmadev_trace.h
@@ -35,6 +35,7 @@ RTE_TRACE_POINT(
 	rte_trace_point_emit_u16(dev_info->max_sges);
 	rte_trace_point_emit_i16(dev_info->numa_node);
 	rte_trace_point_emit_u16(dev_info->nb_vchans);
+	rte_trace_point_emit_u16(dev_info->nb_priorities);
 )
 
 RTE_TRACE_POINT(
@@ -48,6 +49,7 @@ RTE_TRACE_POINT(
 	int enable_silent = (int)dev_conf->enable_silent;
 	rte_trace_point_emit_i16(dev_id);
 	rte_trace_point_emit_u16(dev_conf->nb_vchans);
+	rte_trace_point_emit_u16(dev_conf->priority);
 	rte_trace_point_emit_int(enable_silent);
 	rte_trace_point_emit_int(ret);
 )
-- 
2.34.1

Re: [PATCH v6 1/1] dmadev: support strict priority configuration

[Thomas Monjalon]

11/10/2024 12:12, Vamsi Krishna:
> From: Vamsi Attunuru <vattunuru@marvell.com>
> 
> Some DMA controllers offer the ability to configure priority
> level for the DMA channels, allowing for the prioritization
> of DMA command execution based on channel importance.
> 
> This patch supports such strict priority configuration. If the
> dmadev supports, it should advertise the capability flag
> RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict
> priority configuration.
> 
> Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
> Acked-by: Chengwen Feng <fengchengwen@huawei.com>
> Acked-by: Anoob Joseph <anoobj@marvell.com>

Applied, thanks.