From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DCB5745AA0; Thu, 3 Oct 2024 15:22:59 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D96D34064F; Thu, 3 Oct 2024 15:22:53 +0200 (CEST) Received: from mx0a-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7DDAB4014F for ; Thu, 3 Oct 2024 15:22:51 +0200 (CEST) Received: from pps.filterd (m0431384.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 492Lgb8G026003 for ; Thu, 3 Oct 2024 06:22:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=r Nl7nOCra7WS4xwd98PmhyXxyvul+5M9AxoGPQo3tM4=; b=DMFjTld/+fF8Ew+SV pvOj+vHhpxiEcjbb+lR53h8iNNzECNnXjACgzqENQiROy2vuEOl8qB25FCqcMeK3 z4oGYetIpkiHoZK44IQbotggR+UM1rRi/6ZHLIMBSUXRDboUsJdGYB0nDspUJCXZ I0aa4wt+REO3ICDMIzw7bPcJ8pMdeev0RfiMUbBDSyX1HvLlFrmLIt3d+E29vKf4 prScWwMWyj17bWCH18nj2WMVDE12tGVxyv2LR+SaCG7rQnAzmbwnU+ImndgNpYB/ hk3n0QBNeb/uk6qAk9twUmzI1EtpbCaXIUcqISLJ1X3Zj1LjUsS7KjFfw2DZyw6L S6RLQ== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 421b3g1qm6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 Oct 2024 06:22:50 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 3 Oct 2024 06:22:49 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 3 Oct 2024 06:22:49 -0700 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id DE89E5C704D; Thu, 3 Oct 2024 06:22:47 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH 03/20] event/cnxk: add CN20K device config Date: Thu, 3 Oct 2024 18:52:20 +0530 Message-ID: <20241003132237.20193-3-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241003132237.20193-1-pbhagavatula@marvell.com> References: <20241003132237.20193-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: zlJxaqyuwpdlIHRKwOZnvxyW1-IogtLC X-Proofpoint-GUID: zlJxaqyuwpdlIHRKwOZnvxyW1-IogtLC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Add CN20K event device configuration that attaches the requested number of SSO HWS(event ports) and HWGRP(event queues) LFs to the RVU PF/VF. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn20k_eventdev.c | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/event/cnxk/cn20k_eventdev.c b/drivers/event/cnxk/cn20k_eventdev.c index c4b80f64f3..753a976cd3 100644 --- a/drivers/event/cnxk/cn20k_eventdev.c +++ b/drivers/event/cnxk/cn20k_eventdev.c @@ -17,6 +17,17 @@ cn20k_sso_set_rsrc(void *arg) dev->sso.max_hwgrp; } +static int +cn20k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp) +{ + struct cnxk_tim_evdev *tim_dev = cnxk_tim_priv_get(); + struct cnxk_sso_evdev *dev = arg; + uint16_t nb_tim_lfs; + + nb_tim_lfs = tim_dev ? tim_dev->nb_rings : 0; + return roc_sso_rsrc_init(&dev->sso, hws, hwgrp, nb_tim_lfs); +} + static void cn20k_sso_info_get(struct rte_eventdev *event_dev, struct rte_event_dev_info *dev_info) { @@ -27,8 +38,33 @@ cn20k_sso_info_get(struct rte_eventdev *event_dev, struct rte_event_dev_info *de dev_info->max_event_port_enqueue_depth = UINT32_MAX; } +static int +cn20k_sso_dev_configure(const struct rte_eventdev *event_dev) +{ + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); + int rc; + + rc = cnxk_sso_dev_validate(event_dev, 1, UINT32_MAX); + if (rc < 0) { + plt_err("Invalid event device configuration"); + return -EINVAL; + } + + rc = cn20k_sso_rsrc_init(dev, dev->nb_event_ports, dev->nb_event_queues); + if (rc < 0) { + plt_err("Failed to initialize SSO resources"); + return -ENODEV; + } + + return rc; +} + static struct eventdev_ops cn20k_sso_dev_ops = { .dev_infos_get = cn20k_sso_info_get, + .dev_configure = cn20k_sso_dev_configure, + + .queue_def_conf = cnxk_sso_queue_def_conf, + .port_def_conf = cnxk_sso_port_def_conf, }; static int -- 2.25.1