From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 705B845AA4; Thu, 3 Oct 2024 22:54:31 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BB80B40697; Thu, 3 Oct 2024 22:54:08 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by mails.dpdk.org (Postfix) with ESMTP id 551B1402B1 for ; Thu, 3 Oct 2024 22:54:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727988840; x=1759524840; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gspW4qw4dsqQ3S7J2Oa2/OToArK2F6n6dQssgZzAo/U=; b=GXAzzdUPT4K3PDhCCiTwdngH6IbNvm0iO5NdxDixXhUDrxbud7De4HdG Uydapm2QqT+SvZiiYMzjGAXI+mQ6+ibqe7sps+MHZ1+Vu/331uoqZ0aEQ PuWl6LS6vo/468wm3kZHk7J2rMqY55wzO4pAQEl8tjpCrwJtRPSWP8ePI GlwkHqlJsfwpvqOMT1Ugr5vezataap6tYDza7vud4wutYvVTPQne915DG WIfNM7BRcbdyIwWFREbkII3OunbzwUd8pSGfJpfYdm1JeQ0TSCjCOdQFR clE5JihRBgGYZfvpALVR69KtsXq1rFat0dg3pn+zgw5DrJoifA9tLQH06 g==; X-CSE-ConnectionGUID: YsNHoBzMS3aPu3FUSlZNnQ== X-CSE-MsgGUID: /8ZinOwVQVupZEBGOdmr7A== X-IronPort-AV: E=McAfee;i="6700,10204,11214"; a="26672686" X-IronPort-AV: E=Sophos;i="6.11,175,1725346800"; d="scan'208";a="26672686" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2024 13:53:59 -0700 X-CSE-ConnectionGUID: sFjEEo0+RjCVHU+t6wwM2A== X-CSE-MsgGUID: WH+JcFxcT8q9vuCU0QI+mw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,175,1725346800"; d="scan'208";a="74473455" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa009.fm.intel.com with ESMTP; 03 Oct 2024 13:53:59 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 05/10] baseband/acc: enhance SW ring alignment Date: Thu, 3 Oct 2024 13:49:07 -0700 Message-Id: <20241003204912.131319-6-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241003204912.131319-1-hernan.vargas@intel.com> References: <20241003204912.131319-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Calculate the aligned total size required for queue rings, ensuring that the size is a power of two for proper memory allocation. Signed-off-by: Hernan Vargas --- drivers/baseband/acc/acc_common.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h index 0d1c26166ff2..8ac1ca001c1d 100644 --- a/drivers/baseband/acc/acc_common.h +++ b/drivers/baseband/acc/acc_common.h @@ -767,19 +767,20 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d, int i = 0; uint32_t q_sw_ring_size = ACC_MAX_QUEUE_DEPTH * get_desc_len(); uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues; - /* Free first in case this is a reconfiguration */ + uint32_t alignment = q_sw_ring_size * rte_align32pow2(num_queues); + /* Free first in case this is dev_sw_ring_size, q_sw_ring_size, socket); reconfiguration */ rte_free(d->sw_rings_base); /* Find an aligned block of memory to store sw rings */ while (i < ACC_SW_RING_MEM_ALLOC_ATTEMPTS) { /* * sw_ring allocated memory is guaranteed to be aligned to - * q_sw_ring_size at the condition that the requested size is + * alignment at the condition that the requested size is * less than the page size */ sw_rings_base = rte_zmalloc_socket( dev->device->driver->name, - dev_sw_ring_size, q_sw_ring_size, socket); + dev_sw_ring_size, alignment, socket); if (sw_rings_base == NULL) { rte_acc_log(ERR, -- 2.37.1