From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B3AB645AA4; Thu, 3 Oct 2024 22:54:36 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0E24140668; Thu, 3 Oct 2024 22:54:10 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by mails.dpdk.org (Postfix) with ESMTP id C263440658 for ; Thu, 3 Oct 2024 22:54:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727988841; x=1759524841; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=x7Z0drvmxORXyy7aX1jIlOnJxa8Q1j1cPr6hy0xFg1Y=; b=X74F4l2GB1FzGixRMcEr0HVUktIZaaSUFmUNoNuJeVgdU+2vxJKyWYsn c0KNVO6ko0SuG3457y3tMjYNYkxunMjIViFjp9CT//9GbeDsXPTphqVwG 5HxmBKNHp7/t72QGQzr5r2fP690M9K+2fdpAlDuuiUinGrUmLOIuvY1k2 u+n8JRzmSEkJVgAnjPBopI/eif1y9IHvu6NNkJ8p41sonO9yAAgK+RYTB bLWCSIDd3hOT1JuTq4mGPu5YMm0Ip5I8FMSkzOOqS3cMhYHXch8+r7NrD 9V5YtGhCm9JP91fWQJLkBJTM78FM6GcYt2tySX1W+0/f7Ddp34e8CrgHU A==; X-CSE-ConnectionGUID: rJYD+ra0RL2WVwJDKF/9Ig== X-CSE-MsgGUID: +x1upeoYTBGSWKQMnGpksg== X-IronPort-AV: E=McAfee;i="6700,10204,11214"; a="26672692" X-IronPort-AV: E=Sophos;i="6.11,175,1725346800"; d="scan'208";a="26672692" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2024 13:54:00 -0700 X-CSE-ConnectionGUID: 3TjSjUO4QSKMEj4XmSrVgA== X-CSE-MsgGUID: 1SA1ntarTOKFaR86+ReStg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,175,1725346800"; d="scan'208";a="74473462" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa009.fm.intel.com with ESMTP; 03 Oct 2024 13:54:00 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 07/10] baseband/acc: algorithm tuning for LDPC decoder Date: Thu, 3 Oct 2024 13:49:09 -0700 Message-Id: <20241003204912.131319-8-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241003204912.131319-1-hernan.vargas@intel.com> References: <20241003204912.131319-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Reverting to MS1 version of the algorithm to improve MU1 fading conditions. Signed-off-by: Hernan Vargas --- drivers/baseband/acc/rte_vrb_pmd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 88201d11de88..865a050e1b19 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -1362,7 +1362,7 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS | RTE_BBDEV_LDPC_DEC_INTERRUPTS, .llr_size = 8, - .llr_decimals = 2, + .llr_decimals = 1, .num_buffers_src = RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, .num_buffers_hard_out = @@ -1736,8 +1736,8 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, fcw->so_bypass_intlv = check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS); fcw->so_bypass_rm = 0; - fcw->minsum_offset = 1; - fcw->dec_llrclip = 2; + fcw->minsum_offset = 0; + fcw->dec_llrclip = 0; } /* -- 2.37.1