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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e20aebb83esm46948a91.21.2024.10.04.08.46.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2024 08:46:14 -0700 (PDT) Date: Fri, 4 Oct 2024 08:46:12 -0700 From: Stephen Hemminger To: Ruifeng Wang Cc: "cburdick@nvidia.com" , "dev@dpdk.org" , Juraj =?UTF-8?B?TGlua2XFoQ==?= , nd Subject: Re: [PATCH] config: added support for NVIDIA ARM implementer ID Message-ID: <20241004084612.24621422@hermes.local> In-Reply-To: References: <20230221173351.8439-1-cburdick@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, 22 Feb 2023 09:59:11 +0000 Ruifeng Wang wrote: > > -----Original Message----- > > From: cburdick@nvidia.com > > Sent: Wednesday, February 22, 2023 1:34 AM > > To: Ruifeng Wang > > Cc: dev@dpdk.org; Cliff Burdick > > Subject: [PATCH] config: added support for NVIDIA ARM implementer ID > > > > From: Cliff Burdick > > > > NVIDIA's Jetson Xavier is an ARM chip with NVIDIA as the implementer ID and a new part > > number. This patch adds support for this implementer ID and the part number. > > > > Signed-off-by: Cliff Burdick > > --- > > .mailmap | 1 + > > config/arm/meson.build | 21 +++++++++++++++++++++ > > 2 files changed, 22 insertions(+) > > > > diff --git a/.mailmap b/.mailmap > > index 6a91c11be4..2cb0d9e41b 100644 > > --- a/.mailmap > > +++ b/.mailmap > > @@ -230,6 +230,7 @@ Cian Ferriter Ciara Loftus > > Ciara Power Claire Murphy > > > > +Cliff Burdick > > Cody Doucette > > Congwen Zhang Conor Fogarty diff -- > > git a/config/arm/meson.build b/config/arm/meson.build index 6442ec9596..6c3de22f16 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -159,6 +159,26 @@ implementer_cavium = { > > } > > } > > > > +implementer_nvidia = { > > + 'description': 'NVIDIA', > > + 'flags': [ > > + ['RTE_CACHE_LINE_SIZE', 64] > > + ], > > + 'part_number_config': { > > + '0x4': { > > + 'march': 'armv8-a', > > + 'march_features': ['crc', 'crypto', 'lse'], > > + 'compiler_options': ['-march=armv8-a+crc+lse+simd'], > > + 'flags': [ > > + ['RTE_USE_C11_MEM_MODEL', true], > > + ['RTE_MAX_LCORE', 8], > > + ['RTE_MAX_NUMA_NODES', 1], > > + ['RTE_MACHINE', '"armv8a"'] > > + ] > > + } > > + } > > +} > > + > > implementer_ampere = { > > 'description': 'Ampere Computing', > > 'flags': [ > > @@ -261,6 +281,7 @@ implementers = { > > '0x41': implementer_arm, > > '0x43': implementer_cavium, > > '0x48': implementer_hisilicon, > > + '0x4e': implementer_nvidia, > > '0x50': implementer_ampere, > > '0x51': implementer_qualcomm, > > '0x70': implementer_phytium, > > -- > > 2.17.1 > Only native build is supported with this change. To support cross build, soc section needs to be updated. > The below patch can be referenced: > http://patches.dpdk.org/project/dpdk/patch/20230220084827.3317796-3-rasland@nvidia.com/ > Please resend with suggested change to handle cross build And use the DPDK convention of reply-to and patch version number.