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From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com,
Oleksandr Kolomeiets <okl-plv@napatech.com>
Subject: [PATCH v1 05/31] net/ntnic: add INFO flow module
Date: Fri, 4 Oct 2024 17:06:58 +0200
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From: Oleksandr Kolomeiets <okl-plv@napatech.com>
The info module keeps track of the hardcoded parameters of the FPGA
and provides an abstraction that can support if parameter is unsupported
for a given FPGA.
Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
---
drivers/net/ntnic/include/hw_mod_backend.h | 57 +++
drivers/net/ntnic/meson.build | 3 +
.../nthw/flow_api/flow_backend/flow_backend.c | 384 ++++++++++++++++++
.../ntnic/nthw/flow_filter/flow_nthw_info.c | 341 ++++++++++++++++
.../ntnic/nthw/flow_filter/flow_nthw_info.h | 110 +++++
drivers/net/ntnic/nthw/nthw_drv.h | 2 +
drivers/net/ntnic/nthw/nthw_helper.h | 11 +
drivers/net/ntnic/ntnic_mod_reg.c | 8 +
drivers/net/ntnic/ntnic_mod_reg.h | 2 +
drivers/net/ntnic/ntutil/nt_util.h | 5 +
10 files changed, 923 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.c
create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.h
create mode 100644 drivers/net/ntnic/nthw/nthw_helper.h
diff --git a/drivers/net/ntnic/include/hw_mod_backend.h b/drivers/net/ntnic/include/hw_mod_backend.h
index 46054a6a85..11a0d62c41 100644
--- a/drivers/net/ntnic/include/hw_mod_backend.h
+++ b/drivers/net/ntnic/include/hw_mod_backend.h
@@ -6,6 +6,63 @@
#ifndef _HW_MOD_BACKEND_H_
#define _HW_MOD_BACKEND_H_
+#define MAX_PHYS_ADAPTERS 8
+
+enum debug_mode_e {
+ FLOW_BACKEND_DEBUG_MODE_NONE = 0x0000,
+ FLOW_BACKEND_DEBUG_MODE_WRITE = 0x0001
+};
+
+struct flow_api_backend_ops {
+ int version;
+ int (*set_debug_mode)(void *dev, enum debug_mode_e mode);
+ int (*get_nb_phy_port)(void *dev);
+ int (*get_nb_rx_port)(void *dev);
+ int (*get_ltx_avail)(void *dev);
+ int (*get_nb_cat_funcs)(void *dev);
+ int (*get_nb_categories)(void *dev);
+ int (*get_nb_cat_km_if_cnt)(void *dev);
+ int (*get_nb_cat_km_if_m0)(void *dev);
+ int (*get_nb_cat_km_if_m1)(void *dev);
+
+ int (*get_nb_queues)(void *dev);
+ int (*get_nb_km_flow_types)(void *dev);
+ int (*get_nb_pm_ext)(void *dev);
+ int (*get_nb_len)(void *dev);
+ int (*get_kcc_size)(void *dev);
+ int (*get_kcc_banks)(void *dev);
+ int (*get_nb_km_categories)(void *dev);
+ int (*get_nb_km_cam_banks)(void *dev);
+ int (*get_nb_km_cam_record_words)(void *dev);
+ int (*get_nb_km_cam_records)(void *dev);
+ int (*get_nb_km_tcam_banks)(void *dev);
+ int (*get_nb_km_tcam_bank_width)(void *dev);
+ int (*get_nb_flm_categories)(void *dev);
+ int (*get_nb_flm_size_mb)(void *dev);
+ int (*get_nb_flm_entry_size)(void *dev);
+ int (*get_nb_flm_variant)(void *dev);
+ int (*get_nb_flm_prios)(void *dev);
+ int (*get_nb_flm_pst_profiles)(void *dev);
+ int (*get_nb_flm_scrub_profiles)(void *dev);
+ int (*get_nb_flm_load_aps_max)(void *dev);
+ int (*get_nb_qsl_categories)(void *dev);
+ int (*get_nb_qsl_qst_entries)(void *dev);
+ int (*get_nb_pdb_categories)(void *dev);
+ int (*get_nb_roa_categories)(void *dev);
+ int (*get_nb_tpe_categories)(void *dev);
+ int (*get_nb_tx_cpy_writers)(void *dev);
+ int (*get_nb_tx_cpy_mask_mem)(void *dev);
+ int (*get_nb_tx_rpl_depth)(void *dev);
+ int (*get_nb_tx_rpl_ext_categories)(void *dev);
+ int (*get_nb_tpe_ifr_categories)(void *dev);
+ int (*get_nb_rpp_per_ps)(void *dev);
+ int (*get_nb_hsh_categories)(void *dev);
+ int (*get_nb_hsh_toeplitz)(void *dev);
+
+ int (*alloc_rx_queue)(void *dev, int queue_id);
+ int (*free_rx_queue)(void *dev, int hw_queue);
+};
+
struct flow_api_backend_s {
void *be_dev;
};
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 00b1ae4c70..b771a600e4 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -17,6 +17,7 @@ includes = [
include_directories('nthw'),
include_directories('nthw/supported'),
include_directories('nthw/model'),
+ include_directories('nthw/flow_filter'),
include_directories('nim/'),
]
@@ -43,7 +44,9 @@ sources = files(
'nthw/core/nthw_sdc.c',
'nthw/core/nthw_si5340.c',
'nthw/flow_api/flow_api.c',
+ 'nthw/flow_api/flow_backend/flow_backend.c',
'nthw/flow_api/flow_filter.c',
+ 'nthw/flow_filter/flow_nthw_info.c',
'nthw/model/nthw_fpga_model.c',
'nthw/nthw_platform.c',
'nthw/nthw_rac.c',
diff --git a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
new file mode 100644
index 0000000000..f3ad3686d4
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
@@ -0,0 +1,384 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdint.h>
+
+#include "flow_nthw_info.h"
+#include "ntnic_mod_reg.h"
+#include "nthw_fpga_model.h"
+#include "hw_mod_backend.h"
+
+/*
+ * Binary Flow API backend implementation into ntservice driver
+ *
+ * General note on this backend implementation:
+ * Maybe use shadow class to combine multiple writes. However, this backend is only for dev/testing
+ */
+
+static struct backend_dev_s {
+ uint8_t adapter_no;
+ enum debug_mode_e dmode;
+ struct info_nthw *p_info_nthw;
+} be_devs[MAX_PHYS_ADAPTERS];
+
+const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, void **be_dev);
+static void bin_flow_backend_done(void *be_dev);
+
+static int set_debug_mode(void *be_dev, enum debug_mode_e mode)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ be->dmode = mode;
+ return 0;
+}
+
+/*
+ * INFO
+ */
+
+static int get_nb_phy_ports(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_phy_ports(be->p_info_nthw);
+}
+
+static int get_nb_rx_ports(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_rx_ports(be->p_info_nthw);
+}
+
+static int get_ltx_avail(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_ltx_avail(be->p_info_nthw);
+}
+
+static int get_nb_cat_funcs(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_cat_funcs(be->p_info_nthw);
+}
+
+static int get_nb_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_categories(be->p_info_nthw);
+}
+
+static int get_nb_cat_km_if_cnt(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_cat_km_if_cnt(be->p_info_nthw);
+}
+
+static int get_nb_cat_km_if_m0(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_cat_km_if_m0(be->p_info_nthw);
+}
+
+static int get_nb_cat_km_if_m1(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_cat_km_if_m1(be->p_info_nthw);
+}
+
+static int get_nb_queues(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_queues(be->p_info_nthw);
+}
+
+static int get_nb_km_flow_types(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_flow_types(be->p_info_nthw);
+}
+
+static int get_nb_pm_ext(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_pm_ext(be->p_info_nthw);
+}
+
+static int get_nb_len(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_len(be->p_info_nthw);
+}
+
+static int get_kcc_size(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_kcc_size(be->p_info_nthw);
+}
+
+static int get_kcc_banks(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_kcc_banks(be->p_info_nthw);
+}
+
+static int get_nb_km_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_categories(be->p_info_nthw);
+}
+
+static int get_nb_km_cam_banks(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_cam_banks(be->p_info_nthw);
+}
+
+static int get_nb_km_cam_record_words(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_cam_record_words(be->p_info_nthw);
+}
+
+static int get_nb_km_cam_records(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_cam_records(be->p_info_nthw);
+}
+
+static int get_nb_km_tcam_banks(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_tcam_banks(be->p_info_nthw);
+}
+
+static int get_nb_km_tcam_bank_width(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_km_tcam_bank_width(be->p_info_nthw);
+}
+
+static int get_nb_flm_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_categories(be->p_info_nthw);
+}
+
+static int get_nb_flm_size_mb(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_size_mb(be->p_info_nthw);
+}
+
+static int get_nb_flm_entry_size(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_entry_size(be->p_info_nthw);
+}
+
+static int get_nb_flm_variant(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_variant(be->p_info_nthw);
+}
+
+static int get_nb_flm_prios(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_prios(be->p_info_nthw);
+}
+
+static int get_nb_flm_pst_profiles(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_pst_profiles(be->p_info_nthw);
+}
+
+static int get_nb_flm_scrub_profiles(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_scrub_profiles(be->p_info_nthw);
+}
+
+static int get_nb_flm_load_aps_max(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_flm_load_aps_max(be->p_info_nthw);
+}
+
+static int get_nb_qsl_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_qsl_categories(be->p_info_nthw);
+}
+
+static int get_nb_qsl_qst_entries(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_qsl_qst_entries(be->p_info_nthw);
+}
+
+static int get_nb_pdb_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_pdb_categories(be->p_info_nthw);
+}
+
+static int get_nb_roa_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_roa_categories(be->p_info_nthw);
+}
+
+static int get_nb_tpe_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tpe_categories(be->p_info_nthw);
+}
+
+static int get_nb_tx_cpy_writers(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tx_cpy_writers(be->p_info_nthw);
+}
+
+static int get_nb_tx_cpy_mask_mem(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tx_cpy_mask_mem(be->p_info_nthw);
+}
+
+static int get_nb_tx_rpl_depth(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tx_rpl_depth(be->p_info_nthw);
+}
+
+static int get_nb_tx_rpl_ext_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tx_rpl_ext_categories(be->p_info_nthw);
+}
+
+static int get_nb_tpe_ifr_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_tpe_ifr_categories(be->p_info_nthw);
+}
+
+static int get_nb_rpp_per_ps(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_rpp_per_ps(be->p_info_nthw);
+}
+
+static int get_nb_hsh_categories(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_hsh_categories(be->p_info_nthw);
+}
+
+static int get_nb_hsh_toeplitz(void *be_dev)
+{
+ struct backend_dev_s *be = (struct backend_dev_s *)be_dev;
+ return info_nthw_get_nb_hsh_toeplitz(be->p_info_nthw);
+}
+
+/*
+ * DBS
+ */
+
+static int alloc_rx_queue(void *be_dev, int queue_id)
+{
+ (void)be_dev;
+ (void)queue_id;
+ NT_LOG(ERR, FILTER, "ERROR alloc Rx queue\n");
+ return -1;
+}
+
+static int free_rx_queue(void *be_dev, int hw_queue)
+{
+ (void)be_dev;
+ (void)hw_queue;
+ NT_LOG(ERR, FILTER, "ERROR free Rx queue\n");
+ return 0;
+}
+
+const struct flow_api_backend_ops flow_be_iface = {
+ 1,
+
+ set_debug_mode,
+ get_nb_phy_ports,
+ get_nb_rx_ports,
+ get_ltx_avail,
+ get_nb_cat_funcs,
+ get_nb_categories,
+ get_nb_cat_km_if_cnt,
+ get_nb_cat_km_if_m0,
+ get_nb_cat_km_if_m1,
+ get_nb_queues,
+ get_nb_km_flow_types,
+ get_nb_pm_ext,
+ get_nb_len,
+ get_kcc_size,
+ get_kcc_banks,
+ get_nb_km_categories,
+ get_nb_km_cam_banks,
+ get_nb_km_cam_record_words,
+ get_nb_km_cam_records,
+ get_nb_km_tcam_banks,
+ get_nb_km_tcam_bank_width,
+ get_nb_flm_categories,
+ get_nb_flm_size_mb,
+ get_nb_flm_entry_size,
+ get_nb_flm_variant,
+ get_nb_flm_prios,
+ get_nb_flm_pst_profiles,
+ get_nb_flm_scrub_profiles,
+ get_nb_flm_load_aps_max,
+ get_nb_qsl_categories,
+ get_nb_qsl_qst_entries,
+ get_nb_pdb_categories,
+ get_nb_roa_categories,
+ get_nb_tpe_categories,
+ get_nb_tx_cpy_writers,
+ get_nb_tx_cpy_mask_mem,
+ get_nb_tx_rpl_depth,
+ get_nb_tx_rpl_ext_categories,
+ get_nb_tpe_ifr_categories,
+ get_nb_rpp_per_ps,
+ get_nb_hsh_categories,
+ get_nb_hsh_toeplitz,
+
+ alloc_rx_queue,
+ free_rx_queue,
+};
+
+const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, void **dev)
+{
+ uint8_t physical_adapter_no = (uint8_t)p_fpga->p_fpga_info->adapter_no;
+
+ struct info_nthw *pinfonthw = info_nthw_new();
+ info_nthw_init(pinfonthw, p_fpga, physical_adapter_no);
+ be_devs[physical_adapter_no].p_info_nthw = pinfonthw;
+
+ be_devs[physical_adapter_no].adapter_no = physical_adapter_no;
+ *dev = (void *)&be_devs[physical_adapter_no];
+
+ return &flow_be_iface;
+}
+
+static void bin_flow_backend_done(void *dev)
+{
+ struct backend_dev_s *be_dev = (struct backend_dev_s *)dev;
+ info_nthw_delete(be_dev->p_info_nthw);
+}
+
+static const struct flow_backend_ops ops = {
+ .bin_flow_backend_init = bin_flow_backend_init,
+ .bin_flow_backend_done = bin_flow_backend_done,
+};
+
+void flow_backend_init(void)
+{
+ register_flow_backend_ops(&ops);
+}
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.c b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.c
new file mode 100644
index 0000000000..8e0b24dd9a
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.c
@@ -0,0 +1,341 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "nt_util.h"
+
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "flow_nthw_info.h"
+
+static inline unsigned int clamp_one(unsigned int val)
+{
+ return val > 1 ? 1 : val;
+}
+
+struct info_nthw *info_nthw_new(void)
+{
+ struct info_nthw *p = malloc(sizeof(struct info_nthw));
+
+ if (p)
+ (void)memset(p, 0, sizeof(*p));
+
+ return p;
+}
+
+void info_nthw_delete(struct info_nthw *p)
+{
+ if (p) {
+ (void)memset(p, 0, sizeof(*p));
+ free(p);
+ }
+}
+
+int info_nthw_init(struct info_nthw *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ assert(n_instance >= 0 && n_instance < 256);
+
+ p->mp_fpga = p_fpga;
+ p->m_physical_adapter_no = (uint8_t)n_instance;
+
+ unsigned int km_present = clamp_one(nthw_fpga_get_product_param(p_fpga, NT_KM_PRESENT, 0));
+ unsigned int kcc_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_CAT_KCC_PRESENT, 0));
+ unsigned int roa_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_ROA_PRESENT, 0));
+ unsigned int dbs_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_DBS_PRESENT, 0));
+ unsigned int flm_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_FLM_PRESENT, 0));
+ unsigned int hst_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_HST_PRESENT, 0));
+
+ /* Modules for Tx Packet Edit function */
+ unsigned int hfu_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_HFU_PRESENT, 0));
+ unsigned int tx_cpy_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_TX_CPY_PRESENT, 0));
+ unsigned int tx_ins_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_TX_INS_PRESENT, 0));
+ unsigned int tx_rpl_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_TX_RPL_PRESENT, 0));
+ unsigned int csu_present =
+ clamp_one(nthw_fpga_get_product_param(p_fpga, NT_CSU_PRESENT, 0));
+ unsigned int tpe_present =
+ (hfu_present && tx_cpy_present && tx_ins_present && tx_rpl_present && csu_present)
+ ? 1
+ : 0;
+
+ p->n_phy_ports = nthw_fpga_get_product_param(p_fpga, NT_PHY_PORTS, 0);
+ p->n_rx_ports = nthw_fpga_get_product_param(p_fpga, NT_RX_PORTS, 0);
+ p->n_ltx_avail = nthw_fpga_get_product_param(p_fpga, NT_LR_PRESENT, 0);
+ p->nb_cat_func = nthw_fpga_get_product_param(p_fpga, NT_CAT_FUNCS, 0);
+ p->nb_categories = nthw_fpga_get_product_param(p_fpga, NT_CATEGORIES, 0);
+ p->nb_queues = nthw_fpga_get_product_param(p_fpga, NT_QUEUES, 0);
+ p->nb_flow_types = nthw_fpga_get_product_param(p_fpga, NT_KM_FLOW_TYPES, 0) *
+ clamp_one(km_present + flm_present);
+ p->nb_pm_ext = nthw_fpga_get_product_param(p_fpga, NT_CAT_N_EXT, 0);
+ p->nb_len = nthw_fpga_get_product_param(p_fpga, NT_CAT_N_LEN, 0);
+ p->nb_kcc_size = nthw_fpga_get_product_param(p_fpga, NT_CAT_KCC_SIZE, 0) * kcc_present;
+ p->nb_kcc_banks = nthw_fpga_get_product_param(p_fpga, NT_CAT_KCC_BANKS, 0) * kcc_present;
+ p->nb_km_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_KM_CATEGORIES, 0) * km_present;
+ p->nb_km_cam_banks = nthw_fpga_get_product_param(p_fpga, NT_KM_CAM_BANKS, 0) * km_present;
+ p->nb_km_cam_record_words =
+ nthw_fpga_get_product_param(p_fpga, NT_KM_CAM_REC_WORDS, 0) * km_present;
+ p->nb_km_cam_records =
+ nthw_fpga_get_product_param(p_fpga, NT_KM_CAM_RECORDS, 0) * km_present;
+ p->nb_km_tcam_banks =
+ nthw_fpga_get_product_param(p_fpga, NT_KM_TCAM_BANKS, 0) * km_present;
+ p->nb_km_tcam_bank_width =
+ nthw_fpga_get_product_param(p_fpga, NT_KM_TCAM_BANK_WIDTH, 0) * km_present;
+ p->nb_flm_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_FLM_CATEGORIES, 0) * flm_present;
+ p->nb_flm_size_mb = nthw_fpga_get_product_param(p_fpga, NT_FLM_SIZE_MB, 0);
+ p->nb_flm_entry_size = nthw_fpga_get_product_param(p_fpga, NT_FLM_ENTRY_SIZE, 0);
+ p->nb_flm_variant = nthw_fpga_get_product_param(p_fpga, NT_FLM_VARIANT, 0);
+ p->nb_flm_prios = nthw_fpga_get_product_param(p_fpga, NT_FLM_PRIOS, 0) * flm_present;
+ p->nb_flm_pst_profiles =
+ nthw_fpga_get_product_param(p_fpga, NT_FLM_PST_PROFILES, 0) * flm_present;
+ p->nb_flm_scrub_profiles =
+ nthw_fpga_get_product_param(p_fpga, NT_FLM_SCRUB_PROFILES, 0) * flm_present;
+ p->nb_flm_load_aps_max = nthw_fpga_get_product_param(p_fpga, NT_FLM_LOAD_APS_MAX, 0);
+ p->nb_hst_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_HST_CATEGORIES, 0) * hst_present;
+ p->nb_qsl_categories = nthw_fpga_get_product_param(p_fpga, NT_QSL_CATEGORIES, 0);
+ p->nb_qsl_qst_entries = nthw_fpga_get_product_param(p_fpga, NT_QSL_QST_SIZE, 0);
+ p->nb_pdb_categories = nthw_fpga_get_product_param(p_fpga, NT_PDB_CATEGORIES, 0);
+ p->nb_roa_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_ROA_CATEGORIES, 0) * roa_present;
+ p->nb_dbs_categories = min(nthw_fpga_get_product_param(p_fpga, NT_DBS_RX_QUEUES, 0),
+ nthw_fpga_get_product_param(p_fpga, NT_DBS_TX_QUEUES, 0)) *
+ dbs_present;
+ p->nb_cat_km_if_cnt =
+ nthw_fpga_get_product_param(p_fpga, NT_CAT_KM_IF_CNT, km_present + flm_present);
+ p->m_cat_km_if_m0 = nthw_fpga_get_product_param(p_fpga, NT_CAT_KM_IF_M0, -1);
+ p->m_cat_km_if_m1 = nthw_fpga_get_product_param(p_fpga, NT_CAT_KM_IF_M1, -1);
+ p->nb_tpe_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_TPE_CATEGORIES, 0) * tpe_present;
+ p->nb_tx_cpy_writers =
+ nthw_fpga_get_product_param(p_fpga, NT_TX_CPY_WRITERS, 0) * tpe_present;
+ p->nb_tx_cpy_mask_mem =
+ nthw_fpga_get_product_param(p_fpga, NT_CPY_MASK_MEM, 0) * tpe_present;
+ p->nb_tx_rpl_depth = nthw_fpga_get_product_param(p_fpga, NT_TX_RPL_DEPTH, 0) * tpe_present;
+ p->nb_tx_rpl_ext_categories =
+ nthw_fpga_get_product_param(p_fpga, NT_TX_RPL_EXT_CATEGORIES, 0) * tpe_present;
+ p->nb_tpe_ifr_categories = nthw_fpga_get_product_param(p_fpga, NT_TX_MTU_PROFILE_IFR, 0);
+ p->nb_rpp_per_ps = nthw_fpga_get_product_param(p_fpga, NT_RPP_PER_PS, 0);
+ p->nb_hsh_categories = nthw_fpga_get_product_param(p_fpga, NT_HSH_CATEGORIES, 0);
+ p->nb_hsh_toeplitz = nthw_fpga_get_product_param(p_fpga, NT_HSH_TOEPLITZ, 0);
+ return 0;
+}
+
+unsigned int info_nthw_get_nb_phy_ports(const struct info_nthw *p)
+{
+ return p->n_phy_ports;
+}
+
+unsigned int info_nthw_get_nb_rx_ports(const struct info_nthw *p)
+{
+ return p->n_rx_ports;
+}
+
+unsigned int info_nthw_get_ltx_avail(const struct info_nthw *p)
+{
+ return p->n_ltx_avail;
+}
+
+unsigned int info_nthw_get_nb_categories(const struct info_nthw *p)
+{
+ return p->nb_categories;
+}
+
+unsigned int info_nthw_get_kcc_size(const struct info_nthw *p)
+{
+ return p->nb_kcc_size;
+}
+
+unsigned int info_nthw_get_kcc_banks(const struct info_nthw *p)
+{
+ return p->nb_kcc_banks;
+}
+
+unsigned int info_nthw_get_nb_queues(const struct info_nthw *p)
+{
+ return p->nb_queues;
+}
+
+unsigned int info_nthw_get_nb_cat_funcs(const struct info_nthw *p)
+{
+ return p->nb_cat_func;
+}
+
+unsigned int info_nthw_get_nb_km_flow_types(const struct info_nthw *p)
+{
+ return p->nb_flow_types;
+}
+
+unsigned int info_nthw_get_nb_pm_ext(const struct info_nthw *p)
+{
+ return p->nb_pm_ext;
+}
+
+unsigned int info_nthw_get_nb_len(const struct info_nthw *p)
+{
+ return p->nb_len;
+}
+
+unsigned int info_nthw_get_nb_km_categories(const struct info_nthw *p)
+{
+ return p->nb_km_categories;
+}
+
+unsigned int info_nthw_get_nb_km_cam_banks(const struct info_nthw *p)
+{
+ return p->nb_km_cam_banks;
+}
+
+unsigned int info_nthw_get_nb_km_cam_record_words(const struct info_nthw *p)
+{
+ return p->nb_km_cam_record_words;
+}
+
+unsigned int info_nthw_get_nb_km_cam_records(const struct info_nthw *p)
+{
+ return p->nb_km_cam_records;
+}
+
+unsigned int info_nthw_get_nb_km_tcam_banks(const struct info_nthw *p)
+{
+ return p->nb_km_tcam_banks;
+}
+
+unsigned int info_nthw_get_nb_km_tcam_bank_width(const struct info_nthw *p)
+{
+ return p->nb_km_tcam_bank_width;
+}
+
+unsigned int info_nthw_get_nb_flm_categories(const struct info_nthw *p)
+{
+ return p->nb_flm_categories;
+}
+
+unsigned int info_nthw_get_nb_flm_size_mb(const struct info_nthw *p)
+{
+ return p->nb_flm_size_mb;
+}
+
+unsigned int info_nthw_get_nb_flm_entry_size(const struct info_nthw *p)
+{
+ return p->nb_flm_entry_size;
+}
+
+unsigned int info_nthw_get_nb_flm_variant(const struct info_nthw *p)
+{
+ return p->nb_flm_variant;
+}
+
+unsigned int info_nthw_get_nb_flm_prios(const struct info_nthw *p)
+{
+ return p->nb_flm_prios;
+}
+
+unsigned int info_nthw_get_nb_flm_pst_profiles(const struct info_nthw *p)
+{
+ return p->nb_flm_pst_profiles;
+}
+
+unsigned int info_nthw_get_nb_flm_scrub_profiles(const struct info_nthw *p)
+{
+ return p->nb_flm_scrub_profiles;
+}
+
+unsigned int info_nthw_get_nb_flm_load_aps_max(const struct info_nthw *p)
+{
+ return p->nb_flm_load_aps_max;
+}
+
+unsigned int info_nthw_get_nb_qsl_categories(const struct info_nthw *p)
+{
+ return p->nb_qsl_categories;
+}
+
+unsigned int info_nthw_get_nb_qsl_qst_entries(const struct info_nthw *p)
+{
+ return p->nb_qsl_qst_entries;
+}
+
+unsigned int info_nthw_get_nb_pdb_categories(const struct info_nthw *p)
+{
+ return p->nb_pdb_categories;
+}
+
+unsigned int info_nthw_get_nb_roa_categories(const struct info_nthw *p)
+{
+ return p->nb_roa_categories;
+}
+
+unsigned int info_nthw_get_nb_cat_km_if_cnt(const struct info_nthw *p)
+{
+ return p->nb_cat_km_if_cnt;
+}
+
+unsigned int info_nthw_get_nb_cat_km_if_m0(const struct info_nthw *p)
+{
+ return p->m_cat_km_if_m0;
+}
+
+unsigned int info_nthw_get_nb_cat_km_if_m1(const struct info_nthw *p)
+{
+ return p->m_cat_km_if_m1;
+}
+
+unsigned int info_nthw_get_nb_tpe_categories(const struct info_nthw *p)
+{
+ return p->nb_tpe_categories;
+}
+
+unsigned int info_nthw_get_nb_tx_cpy_writers(const struct info_nthw *p)
+{
+ return p->nb_tx_cpy_writers;
+}
+
+unsigned int info_nthw_get_nb_tx_cpy_mask_mem(const struct info_nthw *p)
+{
+ return p->nb_tx_cpy_mask_mem;
+}
+
+unsigned int info_nthw_get_nb_tx_rpl_depth(const struct info_nthw *p)
+{
+ return p->nb_tx_rpl_depth;
+}
+
+unsigned int info_nthw_get_nb_tx_rpl_ext_categories(const struct info_nthw *p)
+{
+ return p->nb_tx_rpl_ext_categories;
+}
+
+unsigned int info_nthw_get_nb_tpe_ifr_categories(const struct info_nthw *p)
+{
+ return p->nb_tpe_ifr_categories;
+}
+
+unsigned int info_nthw_get_nb_rpp_per_ps(const struct info_nthw *p)
+{
+ return p->nb_rpp_per_ps;
+}
+
+unsigned int info_nthw_get_nb_hsh_categories(const struct info_nthw *p)
+{
+ return p->nb_hsh_categories;
+}
+
+unsigned int info_nthw_get_nb_hsh_toeplitz(const struct info_nthw *p)
+{
+ return p->nb_hsh_toeplitz;
+}
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.h b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.h
new file mode 100644
index 0000000000..d726e89e57
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_info.h
@@ -0,0 +1,110 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __FLOW_NTHW_INFO_H__
+#define __FLOW_NTHW_INFO_H__
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct info_nthw;
+
+struct info_nthw *info_nthw_new(void);
+void info_nthw_delete(struct info_nthw *p);
+int info_nthw_init(struct info_nthw *p, nthw_fpga_t *p_fpga, int n_instance);
+
+unsigned int info_nthw_get_nb_phy_ports(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_rx_ports(const struct info_nthw *p);
+unsigned int info_nthw_get_ltx_avail(const struct info_nthw *p);
+
+unsigned int info_nthw_get_nb_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_queues(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_cat_funcs(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_flow_types(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_pm_ext(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_len(const struct info_nthw *p);
+unsigned int info_nthw_get_kcc_size(const struct info_nthw *p);
+unsigned int info_nthw_get_kcc_banks(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_cam_banks(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_cam_record_words(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_cam_records(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_tcam_banks(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_km_tcam_bank_width(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_size_mb(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_entry_size(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_variant(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_prios(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_pst_profiles(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_scrub_profiles(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_flm_load_aps_max(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_qsl_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_qsl_qst_entries(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_pdb_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_roa_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_cat_km_if_cnt(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_cat_km_if_m0(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_cat_km_if_m1(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tpe_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tx_cpy_writers(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tx_cpy_mask_mem(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tx_rpl_depth(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tx_rpl_ext_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_tpe_ifr_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_rpp_per_ps(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_hsh_categories(const struct info_nthw *p);
+unsigned int info_nthw_get_nb_hsh_toeplitz(const struct info_nthw *p);
+
+struct info_nthw {
+ uint8_t m_physical_adapter_no;
+ nthw_fpga_t *mp_fpga;
+ unsigned int n_phy_ports;
+ unsigned int n_rx_ports;
+ unsigned int n_ltx_avail;
+ unsigned int nb_cat_func;
+ unsigned int nb_categories;
+ unsigned int nb_queues;
+ unsigned int nb_flow_types;
+ unsigned int nb_pm_ext;
+ unsigned int nb_len;
+ unsigned int nb_kcc_size;
+ unsigned int nb_kcc_banks;
+ unsigned int nb_km_categories;
+ unsigned int nb_km_cam_banks;
+ unsigned int nb_km_cam_record_words;
+ unsigned int nb_km_cam_records;
+ unsigned int nb_km_tcam_banks;
+ unsigned int nb_km_tcam_bank_width;
+ unsigned int nb_flm_categories;
+ unsigned int nb_flm_size_mb;
+ unsigned int nb_flm_entry_size;
+ unsigned int nb_flm_variant;
+ unsigned int nb_flm_prios;
+ unsigned int nb_flm_pst_profiles;
+ unsigned int nb_flm_scrub_profiles;
+ unsigned int nb_flm_load_aps_max;
+ unsigned int nb_hst_categories;
+ unsigned int nb_qsl_categories;
+ unsigned int nb_qsl_qst_entries;
+ unsigned int nb_pdb_categories;
+ unsigned int nb_roa_categories;
+ unsigned int nb_dbs_categories;
+ unsigned int nb_cat_km_if_cnt;
+ unsigned int m_cat_km_if_m0;
+ unsigned int m_cat_km_if_m1;
+ unsigned int nb_tpe_categories;
+ unsigned int nb_tx_cpy_writers;
+ unsigned int nb_tx_cpy_mask_mem;
+ unsigned int nb_tx_rpl_depth;
+ unsigned int nb_tx_rpl_ext_categories;
+ unsigned int nb_tpe_ifr_categories;
+ unsigned int nb_rpp_per_ps;
+ unsigned int nb_hsh_categories;
+ unsigned int nb_hsh_toeplitz;
+};
+
+#endif /* __FLOW_NTHW_INFO_H__ */
diff --git a/drivers/net/ntnic/nthw/nthw_drv.h b/drivers/net/ntnic/nthw/nthw_drv.h
index de60ae171e..41500f49dd 100644
--- a/drivers/net/ntnic/nthw/nthw_drv.h
+++ b/drivers/net/ntnic/nthw/nthw_drv.h
@@ -14,6 +14,8 @@ typedef enum nt_meta_port_type_e {
PORT_TYPE_OVERRIDE,
} nt_meta_port_type_t;
+#include "nthw_helper.h"
+
enum fpga_info_profile {
FPGA_INFO_PROFILE_UNKNOWN = 0,
FPGA_INFO_PROFILE_VSWITCH = 1,
diff --git a/drivers/net/ntnic/nthw/nthw_helper.h b/drivers/net/ntnic/nthw/nthw_helper.h
new file mode 100644
index 0000000000..25a8d2a947
--- /dev/null
+++ b/drivers/net/ntnic/nthw/nthw_helper.h
@@ -0,0 +1,11 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_HELPER_H__
+#define __NTHW_HELPER_H__
+
+#include <assert.h>
+
+#endif /* __NTHW_HELPER_H__ */
diff --git a/drivers/net/ntnic/ntnic_mod_reg.c b/drivers/net/ntnic/ntnic_mod_reg.c
index 2094e1fbb9..ff9afbeb7c 100644
--- a/drivers/net/ntnic/ntnic_mod_reg.c
+++ b/drivers/net/ntnic/ntnic_mod_reg.c
@@ -91,8 +91,16 @@ struct rst9563_ops *get_rst9563_ops(void)
static const struct flow_backend_ops *flow_backend_ops;
+void register_flow_backend_ops(const struct flow_backend_ops *ops)
+{
+ flow_backend_ops = ops;
+}
+
const struct flow_backend_ops *get_flow_backend_ops(void)
{
+ if (flow_backend_ops == NULL)
+ flow_backend_init();
+
return flow_backend_ops;
}
diff --git a/drivers/net/ntnic/ntnic_mod_reg.h b/drivers/net/ntnic/ntnic_mod_reg.h
index 90d9c73f9f..602f5de77d 100644
--- a/drivers/net/ntnic/ntnic_mod_reg.h
+++ b/drivers/net/ntnic/ntnic_mod_reg.h
@@ -124,7 +124,9 @@ struct flow_backend_ops {
void (*bin_flow_backend_done)(void *be_dev);
};
+void register_flow_backend_ops(const struct flow_backend_ops *ops);
const struct flow_backend_ops *get_flow_backend_ops(void);
+void flow_backend_init(void);
struct flow_filter_ops {
int (*flow_filter_init)(nthw_fpga_t *p_fpga, struct flow_nic_dev **p_flow_device,
diff --git a/drivers/net/ntnic/ntutil/nt_util.h b/drivers/net/ntnic/ntutil/nt_util.h
index ea91181a06..540cd615f2 100644
--- a/drivers/net/ntnic/ntutil/nt_util.h
+++ b/drivers/net/ntnic/ntutil/nt_util.h
@@ -23,6 +23,11 @@
uint64_t nt_os_get_time_monotonic_counter(void);
void nt_os_wait_usec(int val);
+static inline int min(int a, int b)
+{
+ return (a < b) ? a : b;
+}
+
uint64_t nt_util_align_size(uint64_t size);
struct nt_dma_s {
--
2.45.0