[PATCH v1 15/31] net/ntnic: add RPP local retransmit (RPP LR) flow module

[Serhii Iliushyk <sil-plv@napatech.com>]

From: Oleksandr Kolomeiets <okl-plv@napatech.com>

The RX Packet Process for Local Retransmit module can add bytes
in the FPGA TX pipeline, which is needed when the packet increases in size.
Note, this makes room for packet expansion,
but the actual expansion is done by the modules.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
---
 drivers/net/ntnic/meson.build                 |  1 +
 .../nthw/flow_api/flow_backend/flow_backend.c | 13 ++++
 .../ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c | 76 +++++++++++++++++++
 .../ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h | 44 +++++++++++
 .../ntnic/nthw/supported/nthw_fpga_mod_defs.h |  1 +
 .../ntnic/nthw/supported/nthw_fpga_reg_defs.h |  1 +
 .../supported/nthw_fpga_reg_defs_rpp_lr.h     | 37 +++++++++
 7 files changed, 173 insertions(+)
 create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c
 create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h
 create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h

diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 552cbc30bf..2dfb0d0627 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -55,6 +55,7 @@ sources = files(
         'nthw/flow_filter/flow_nthw_km.c',
         'nthw/flow_filter/flow_nthw_pdb.c',
         'nthw/flow_filter/flow_nthw_qsl.c',
+        'nthw/flow_filter/flow_nthw_rpp_lr.c',
         'nthw/flow_filter/flow_nthw_slc_lr.c',
         'nthw/model/nthw_fpga_model.c',
         'nthw/nthw_platform.c',
diff --git a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
index feb3355de3..e2abbf0368 100644
--- a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
+++ b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c
@@ -15,6 +15,7 @@
 #include "flow_nthw_qsl.h"
 #include "flow_nthw_slc_lr.h"
 #include "flow_nthw_pdb.h"
+#include "flow_nthw_rpp_lr.h"
 #include "ntnic_mod_reg.h"
 #include "nthw_fpga_model.h"
 #include "hw_mod_backend.h"
@@ -38,6 +39,7 @@ static struct backend_dev_s {
 	struct slc_lr_nthw *p_slc_lr_nthw;
 	struct pdb_nthw *p_pdb_nthw;
 	struct hfu_nthw *p_hfu_nthw;    /* TPE module */
+	struct rpp_lr_nthw *p_rpp_lr_nthw;      /* TPE module */
 	struct ifr_nthw *p_ifr_nthw;    /* TPE module */
 } be_devs[MAX_PHYS_ADAPTERS];
 
@@ -1795,6 +1797,16 @@ const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, vo
 		be_devs[physical_adapter_no].p_hfu_nthw = NULL;
 	}
 
+	/* Init nthw RPP_LR */
+	if (rpp_lr_nthw_init(NULL, p_fpga, physical_adapter_no) == 0) {
+		struct rpp_lr_nthw *ptr = rpp_lr_nthw_new();
+		rpp_lr_nthw_init(ptr, p_fpga, physical_adapter_no);
+		be_devs[physical_adapter_no].p_rpp_lr_nthw = ptr;
+
+	} else {
+		be_devs[physical_adapter_no].p_rpp_lr_nthw = NULL;
+	}
+
 	be_devs[physical_adapter_no].adapter_no = physical_adapter_no;
 	*dev = (void *)&be_devs[physical_adapter_no];
 
@@ -1813,6 +1825,7 @@ static void bin_flow_backend_done(void *dev)
 	slc_lr_nthw_delete(be_dev->p_slc_lr_nthw);
 	pdb_nthw_delete(be_dev->p_pdb_nthw);
 	hfu_nthw_delete(be_dev->p_hfu_nthw);
+	rpp_lr_nthw_delete(be_dev->p_rpp_lr_nthw);
 }
 
 static const struct flow_backend_ops ops = {
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c
new file mode 100644
index 0000000000..84bbcbdc4f
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c
@@ -0,0 +1,76 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdlib.h>
+#include <string.h>
+
+#include "ntlog.h"
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "flow_nthw_rpp_lr.h"
+
+struct rpp_lr_nthw *rpp_lr_nthw_new(void)
+{
+	struct rpp_lr_nthw *p = malloc(sizeof(struct rpp_lr_nthw));
+
+	if (p)
+		(void)memset(p, 0, sizeof(*p));
+
+	return p;
+}
+
+void rpp_lr_nthw_delete(struct rpp_lr_nthw *p)
+{
+	if (p) {
+		(void)memset(p, 0, sizeof(*p));
+		free(p);
+	}
+}
+
+int rpp_lr_nthw_init(struct rpp_lr_nthw *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+	const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str;
+	nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_RPP_LR, n_instance);
+
+	assert(n_instance >= 0 && n_instance < 256);
+
+	if (p == NULL)
+		return p_mod == NULL ? -1 : 0;
+
+	if (p_mod == NULL) {
+		NT_LOG(ERR, NTHW, "%s: RppLr %d: no such instance\n", p_adapter_id_str,
+			n_instance);
+		return -1;
+	}
+
+	p->mp_fpga = p_fpga;
+	p->m_physical_adapter_no = (uint8_t)n_instance;
+	p->m_rpp_lr = nthw_fpga_query_module(p_fpga, MOD_RPP_LR, n_instance);
+
+	p->mp_rcp_ctrl = nthw_module_get_register(p->m_rpp_lr, RPP_LR_RCP_CTRL);
+	p->mp_rcp_addr = nthw_register_get_field(p->mp_rcp_ctrl, RPP_LR_RCP_CTRL_ADR);
+	p->mp_rcp_cnt = nthw_register_get_field(p->mp_rcp_ctrl, RPP_LR_RCP_CTRL_CNT);
+	p->mp_rcp_data = nthw_module_get_register(p->m_rpp_lr, RPP_LR_RCP_DATA);
+	p->mp_rcp_data_exp = nthw_register_get_field(p->mp_rcp_data, RPP_LR_RCP_DATA_EXP);
+
+	p->mp_ifr_rcp_ctrl = nthw_module_query_register(p->m_rpp_lr, RPP_LR_IFR_RCP_CTRL);
+	p->mp_ifr_rcp_addr =
+		nthw_register_query_field(p->mp_ifr_rcp_ctrl, RPP_LR_IFR_RCP_CTRL_ADR);
+	p->mp_ifr_rcp_cnt = nthw_register_query_field(p->mp_ifr_rcp_ctrl, RPP_LR_IFR_RCP_CTRL_CNT);
+	p->mp_ifr_rcp_data = nthw_module_query_register(p->m_rpp_lr, RPP_LR_IFR_RCP_DATA);
+	p->mp_ifr_rcp_data_ipv4_en =
+		nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV4_EN);
+	p->mp_ifr_rcp_data_ipv6_en =
+		nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV6_EN);
+	p->mp_ifr_rcp_data_mtu =
+		nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_MTU);
+	p->mp_ifr_rcp_data_ipv4_df_drop =
+		nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV4_DF_DROP);
+	p->mp_ifr_rcp_data_ipv6_drop =
+		nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV6_DROP);
+
+	return 0;
+}
diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h
new file mode 100644
index 0000000000..509e46fc48
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h
@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __FLOW_NTHW_RPP_LR_H__
+#define __FLOW_NTHW_RPP_LR_H__
+
+#include <stdint.h>
+
+#include "nthw_fpga_model.h"
+
+struct rpp_lr_nthw {
+	uint8_t m_physical_adapter_no;
+	nthw_fpga_t *mp_fpga;
+
+	nthw_module_t *m_rpp_lr;
+
+	nthw_register_t *mp_rcp_ctrl;
+	nthw_field_t *mp_rcp_addr;
+	nthw_field_t *mp_rcp_cnt;
+
+	nthw_register_t *mp_rcp_data;
+	nthw_field_t *mp_rcp_data_exp;
+
+	nthw_register_t *mp_ifr_rcp_ctrl;
+	nthw_field_t *mp_ifr_rcp_addr;
+	nthw_field_t *mp_ifr_rcp_cnt;
+
+	nthw_register_t *mp_ifr_rcp_data;
+	nthw_field_t *mp_ifr_rcp_data_ipv4_en;
+	nthw_field_t *mp_ifr_rcp_data_ipv6_en;
+	nthw_field_t *mp_ifr_rcp_data_mtu;
+	nthw_field_t *mp_ifr_rcp_data_ipv4_df_drop;
+	nthw_field_t *mp_ifr_rcp_data_ipv6_drop;
+};
+
+struct rpp_lr_nthw *rpp_lr_nthw_new(void);
+void rpp_lr_nthw_delete(struct rpp_lr_nthw *p);
+int rpp_lr_nthw_init(struct rpp_lr_nthw *p, nthw_fpga_t *p_fpga, int n_instance);
+
+int rpp_lr_nthw_setup(struct rpp_lr_nthw *p, int n_idx, int n_idx_cnt);
+
+#endif	/* __FLOW_NTHW_RPP_LR_H__ */
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
index 2d53dfdf98..f1d055a36e 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h
@@ -33,6 +33,7 @@
 #define MOD_PDB (0xa7771bffUL)
 #define MOD_QSL (0x448ed859UL)
 #define MOD_RAC (0xae830b42UL)
+#define MOD_RPP_LR (0xba7f945cUL)
 #define MOD_RST9563 (0x385d6d1dUL)
 #define MOD_SDC (0xd2369530UL)
 #define MOD_SLC_LR (0x969fc50bUL)
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
index c49913036e..c39901ce39 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h
@@ -32,6 +32,7 @@
 #include "nthw_fpga_reg_defs_pdb.h"
 #include "nthw_fpga_reg_defs_qsl.h"
 #include "nthw_fpga_reg_defs_rac.h"
+#include "nthw_fpga_reg_defs_rpp_lr.h"
 #include "nthw_fpga_reg_defs_rst9563.h"
 #include "nthw_fpga_reg_defs_sdc.h"
 #include "nthw_fpga_reg_defs_slc.h"
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h
new file mode 100644
index 0000000000..f84cdf5939
--- /dev/null
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+/*
+ * nthw_fpga_reg_defs_rpp_lr.h
+ *
+ * Auto-generated file - do *NOT* edit
+ *
+ */
+
+#ifndef _NTHW_FPGA_REG_DEFS_RPP_LR_
+#define _NTHW_FPGA_REG_DEFS_RPP_LR_
+
+/* RPP_LR */
+#define NTHW_MOD_RPP_LR (0xba7f945cUL)
+#define RPP_LR_IFR_RCP_CTRL (0xce88594UL)
+#define RPP_LR_IFR_RCP_CTRL_ADR (0x4b4cc068UL)
+#define RPP_LR_IFR_RCP_CTRL_CNT (0x5b4459b9UL)
+#define RPP_LR_IFR_RCP_DATA (0xa339078dUL)
+#define RPP_LR_IFR_RCP_DATA_IPV4_DF_DROP (0xee1d681fUL)
+#define RPP_LR_IFR_RCP_DATA_IPV4_EN (0xfe386131UL)
+#define RPP_LR_IFR_RCP_DATA_IPV6_DROP (0x41f324ffUL)
+#define RPP_LR_IFR_RCP_DATA_IPV6_EN (0x5431a9baUL)
+#define RPP_LR_IFR_RCP_DATA_MTU (0x871a2322UL)
+#define RPP_LR_RCP_CTRL (0xf3395d47UL)
+#define RPP_LR_RCP_CTRL_ADR (0x4916a944UL)
+#define RPP_LR_RCP_CTRL_CNT (0x591e3095UL)
+#define RPP_LR_RCP_DATA (0x5ce8df5eUL)
+#define RPP_LR_RCP_DATA_EXP (0x578ca035UL)
+
+#endif	/* _NTHW_FPGA_REG_DEFS_RPP_LR_ */
+
+/*
+ * Auto-generated file - do *NOT* edit
+ */
-- 
2.45.0