From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B91245AAF; Fri, 4 Oct 2024 18:51:46 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 54B1242E77; Fri, 4 Oct 2024 18:51:46 +0200 (CEST) Received: from egress-ip11b.ess.de.barracuda.com (egress-ip11b.ess.de.barracuda.com [18.185.115.215]) by mails.dpdk.org (Postfix) with ESMTP id 6BA60427CE for ; Fri, 4 Oct 2024 18:51:44 +0200 (CEST) Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05lp2110.outbound.protection.outlook.com [104.47.18.110]) by mx-outbound22-159.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 04 Oct 2024 16:51:43 +0000 Received: from AS1P190MB1824.EURP190.PROD.OUTLOOK.COM (2603:10a6:20b:4a2::21) by AM0P190MB0579.EURP190.PROD.OUTLOOK.COM (2603:10a6:208:19e::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.18; Fri, 4 Oct 2024 16:51:42 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=PrGTVAOcwZZgsNoM2l7QJMNTdJTEvZkJqV73xnLLd+Op8gW59q7YuENUjUq0ITChKKj7pEb7olcH2jRyJhnvwK/L7gUB3YKaM+KyQWtvzvU8fLsaZ5HG3M6Zv6K7Q5zQZ4gWL0suLg2Xihppfset7Z79UXr7osK+sGNJK/YaYendPMYNnLJK9inDATodPIb05GcQwmcVRwbvK3CtHgU7hcKU3pcWmGQ9/z2bvorPktIYYkYDWJhArs2jjvFawL17fRRWYOv47dHNJuH1H7Dkj8LhNQTsOq5pbJIiV8mqNyPyvN3IGN3dX+Rmsnrj9TfEBCkFSxlMaFofgmbMhrcKPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9BfyTFh5vxHFO7lBWXD/Jh0Xl1ubneUH5YV7A7jcPpU=; b=O9Jzo76ECyb1fg9LVavnngsnOwf4pZa2X21aL9rak8zg6YLDvz0kmCJovwlWKO5gsSKgmyKbBEs9gb+lcFnBjf0SrS0zA2NgcBl0TTrfXDWYQKbWCroVUfw/lRS7eh/mSr+lGe6Uf63lYQwrAQgeURMKEGVV//jzB2VAV4vc7lF8iEG8SPiIjdN5bOApodUFHdeKpGlswQ4oPj2ncyLfnWdH6KNYQj20qH6cSn8m04Y+/xZdPCjKg0wRCFKClwYwSEnZwbIlopPLTqb+Qtg1UMMDi6QkUao7BKosDVW7QJuK4AlIfOkZqwfVmI80XNzX8X/3MbT1xEVsEkS5wMg/uQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9BfyTFh5vxHFO7lBWXD/Jh0Xl1ubneUH5YV7A7jcPpU=; b=RrEosd4VSw18bXQv0CLEzXvVj8I4rMq2qJ5r/uVrvvuJ3mSxmU27yMKJhE+c0PRLiI9JEuvMxidTzV5p+Kd5KWSJPhEQDH189lefKboXs+cggst6y/eCMaJbiSzY7ykEMK07KBj/LKZqap4RmlwdEkr28fiLLYmGcWz9v5PoDpM= Received: from AM0PR10CA0128.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::45) by AS1P190MB1824.EURP190.PROD.OUTLOOK.COM (2603:10a6:20b:4a2::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Fri, 4 Oct 2024 15:36:29 +0000 Received: from AM2PEPF0001C715.eurprd05.prod.outlook.com (2603:10a6:208:e6:cafe::83) by AM0PR10CA0128.outlook.office365.com (2603:10a6:208:e6::45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.18 via Frontend Transport; Fri, 4 Oct 2024 15:36:29 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by AM2PEPF0001C715.mail.protection.outlook.com (10.167.16.185) with Microsoft SMTP Server id 15.20.7918.13 via Frontend Transport; Fri, 4 Oct 2024 15:36:29 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, Oleksandr Kolomeiets Subject: [PATCH v1 30/31] net/ntnic: add Tx Packet Editor (TPE) FPGA module Date: Fri, 4 Oct 2024 17:34:53 +0200 Message-ID: <20241004153551.267935-36-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241004153551.267935-1-sil-plv@napatech.com> References: <20241004153551.267935-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM2PEPF0001C715:EE_|AS1P190MB1824:EE_|AM0P190MB0579:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 79068dd7-2f47-4e62-aaa9-08dce48a50e5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?mcv6nJp4b1zbDhEfsZSRCKHgv7susOQd9wrXvUbExN72tnYsC8juDHWNk7hH?= =?us-ascii?Q?wmTAe16z3jij9lkAncC7ek5SxiqhwhBSVbRL2M9rAAPcmC5UPnYX4VPFfp3J?= =?us-ascii?Q?exZ+/d0S7Sh/xZvqN3SJqeR71Bq492+LahU7J+Curue2DF8R+9bAPj+tul/k?= =?us-ascii?Q?s5Dh+/XuVUT7IYZWEg1gza5uNMQvsziXmnrWsvLhVcyn+DWIK9EmT2/m4AKG?= =?us-ascii?Q?dIQVDxQ3ji7KBPIjew8oxF9E/kmqfLL/i//MItM2nFNQ5AsVqCIegmRVP3q9?= =?us-ascii?Q?zqZ+Igq45HBMoXOFvHGz/TfinMZRTOaFhBX1OCL505RhWOICUrpuSparaOiA?= =?us-ascii?Q?LsXJCTt2120nh2SnzmbWinp9BXglExiTiqgYXPC2EkfAd9lx1hpcUtJfjMNb?= =?us-ascii?Q?UDgiBoSV1TOwqOZkps2Dn7TCkgp5HDd3yopvLMOwMfSLLe+kohuWB+bwWdrb?= =?us-ascii?Q?lwtM8YjIsOQZ1XN+B7wq69CRJ53zEJmI5GpFGFD3kkQWtb2yMYpcJfP8JYHa?= =?us-ascii?Q?t3OR6cDqkCt+IBOAIk1TVsAO/FWqMORlOkm2mfMzK4rWXUaY3SX3iAxA39X1?= =?us-ascii?Q?aGq2FJRGSZ2Edx159P0JE0U/9gr965QmFjxuRwYBYivN2sbyxixXAkDe8Gyy?= =?us-ascii?Q?J2Iy8Sl53BFfA11QZzIp/Gbb0QISF8n3FkhslmuyEUBWMFXpxM4grO62uYv8?= =?us-ascii?Q?9tXNsLY3kCrsPxVIpFfstFjVVAByypSeF6KLTsdLzhPtRHAuNb9EctyYQa5q?= =?us-ascii?Q?+HZOw9V9Mcjd0SVlxs7//+n25T2WX2/Mon9ycig76Cwk5HNL+MJIGDpJcFkS?= =?us-ascii?Q?FX/7TRDtRVGq7COzDmVblBOjVDv2LXAUKSi109xeyWRW6m7jr6SjUzEUae35?= =?us-ascii?Q?yu7GsKFRBMS0GwTedor2J8ADH4/2a09QARr2z5tJjlyhgdlv/0NoFY3ythDg?= =?us-ascii?Q?kEwp6m42rKrFig+TGasgUCnjWrnadzHH3/Ci8rRhh2tVqhrpP4Slg6dWk+if?= =?us-ascii?Q?Td/8EPD8PJOmaiiKmfkeIcZ+0n9NAxSADBsgXm32tT8cDPLLnLFOiQM4vCaD?= =?us-ascii?Q?CAEIY7OrXq7d3JuuALOcsMzjUAQVhhwegH6XaEutpasTt2p1Et2gR9x0Rtn9?= =?us-ascii?Q?1QINoRk555FTQItuyqirl8BkEFWUngS5hVuAvrRlK7QFJX8LkuKPGcpy9AZq?= =?us-ascii?Q?MXgxzWWlFyiNMqUMXZU4pylgqFcjPU3QXpu2ILgKlt6GqP+sZkSxfJ7o2XSY?= =?us-ascii?Q?VWqX8YlbdYWwbSTz+AoWuSd7mmv0Ol61dPvOxB5bqcQ5cN+AmcFxGMpRiH0l?= =?us-ascii?Q?UW73ytpA5qwPVmPcAGV3HyKEmmeRQYYoYzSZ+rCKNiYvKoyfjCyEP04rRRTC?= =?us-ascii?Q?XrEIyaWe11B1Tx34Qs8krdG0FZ/g?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: KNWdTTah3mLZaFg7cq76Ojf6wV+Z71aiZxGCKxLD97IqhghitpFR3xScad3iUbYm3o8ZaGezyygVpWpORzhU55VcPkhDf2ZPCoEq7npLLNPc+kwp1Q30EiCoYJFiERJMjnz+p3BxV0ccL95wDPJsIBPRm3Fwe7UlrvBG5aNH+3j/4XfBK2OlMQmd5o26DaeE9n1y69a+LtAHTL9N91OVUxiFgIU6fVq0fUeJTkvkSS54mqvTJapFLaVYtb9tDLu8n9LGQmpTxS08Ty7o1eBRp5wlrmLCIyjLQmwHVkI1lyNSU5UgaDBWrxParicU7e0X31pdj9PKT6LlcjWeUxtmGcLoD+ZrnDxLIu7rsVZrYGf1lEiiegvCCguIXgqILjKbg+GV+pFy6xZiW3R2gBOHDoC6rhB67M1lY+fjozzyktsENYQP8X05XBCy/nwEkn3cTqeh06Klxpj887z7lBZoSmK5IIJ7OhlRkHf5MQj+5eT64L6G+ChLMTL1YZmmo3JmV7rtTAPn4lVDT1DIZfHHRhq3Uo/OCCAr9YP+x9H7JFUowiViJSpxWSbzxqzom4bUUHLo3CC5ViXb7ps7bqEOIpn20ZBB9KixDuFiJWs6soNOrl4cgXYsKYtjgpVIg6d8Zukzopppwt68PSyhdugbPQ== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Oct 2024 15:36:29.1897 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 79068dd7-2f47-4e62-aaa9-08dce48a50e5 X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF0001C715.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1P190MB1824 X-OriginatorOrg: napatech.com X-BESS-ID: 1728060703-305791-12647-39124-1 X-BESS-VER: 2019.1_20240924.1654 X-BESS-Apparent-Source-IP: 104.47.18.110 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVobGhpamQGYGUNTEyNQ41dDczM QwMTnFxNDEPC3FxCzZIDXJIsksydjMUqk2FgBHgfz0QgAAAA== X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259495 [from cloudscan9-172.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Oleksandr Kolomeiets The TX Packet Editor is a software abstraction module, that keeps track of the handful of FPGA modules that are used to edit packets in the TX pipeline. Signed-off-by: Oleksandr Kolomeiets --- drivers/net/ntnic/include/hw_mod_backend.h | 80 +++++ drivers/net/ntnic/meson.build | 1 + drivers/net/ntnic/nthw/flow_api/flow_api.c | 9 + .../nthw/flow_api/hw_mod/hw_mod_backend.c | 1 + .../ntnic/nthw/flow_api/hw_mod/hw_mod_tpe.c | 277 ++++++++++++++++++ 5 files changed, 368 insertions(+) create mode 100644 drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_tpe.c diff --git a/drivers/net/ntnic/include/hw_mod_backend.h b/drivers/net/ntnic/include/hw_mod_backend.h index 9644639131..cfd5150e59 100644 --- a/drivers/net/ntnic/include/hw_mod_backend.h +++ b/drivers/net/ntnic/include/hw_mod_backend.h @@ -654,6 +654,85 @@ struct tpe_func_s { struct hw_mod_tpe_v3_s v3; }; }; +enum hw_tpe_e { + /* functions */ + HW_TPE_PRESET_ALL = 0, + HW_TPE_FIND, + HW_TPE_COMPARE, + /* Control fields */ + HW_TPE_RPP_RCP_EXP = FIELD_START_INDEX, + HW_TPE_IFR_RCP_IPV4_EN, + HW_TPE_IFR_RCP_IPV4_DF_DROP, + HW_TPE_IFR_RCP_IPV6_EN, + HW_TPE_IFR_RCP_IPV6_DROP, + HW_TPE_IFR_RCP_MTU, + HW_TPE_INS_RCP_DYN, + HW_TPE_INS_RCP_OFS, + HW_TPE_INS_RCP_LEN, + HW_TPE_RPL_RCP_DYN, + HW_TPE_RPL_RCP_OFS, + HW_TPE_RPL_RCP_LEN, + HW_TPE_RPL_RCP_RPL_PTR, + HW_TPE_RPL_RCP_EXT_PRIO, + HW_TPE_RPL_RCP_ETH_TYPE_WR, + HW_TPE_RPL_EXT_RPL_PTR, + HW_TPE_RPL_EXT_META_RPL_LEN, /* SW only */ + HW_TPE_RPL_RPL_VALUE, + HW_TPE_CPY_RCP_READER_SELECT, + HW_TPE_CPY_RCP_DYN, + HW_TPE_CPY_RCP_OFS, + HW_TPE_CPY_RCP_LEN, + HW_TPE_HFU_RCP_LEN_A_WR, + HW_TPE_HFU_RCP_LEN_A_OUTER_L4_LEN, + HW_TPE_HFU_RCP_LEN_A_POS_DYN, + HW_TPE_HFU_RCP_LEN_A_POS_OFS, + HW_TPE_HFU_RCP_LEN_A_ADD_DYN, + HW_TPE_HFU_RCP_LEN_A_ADD_OFS, + HW_TPE_HFU_RCP_LEN_A_SUB_DYN, + HW_TPE_HFU_RCP_LEN_B_WR, + HW_TPE_HFU_RCP_LEN_B_POS_DYN, + HW_TPE_HFU_RCP_LEN_B_POS_OFS, + HW_TPE_HFU_RCP_LEN_B_ADD_DYN, + HW_TPE_HFU_RCP_LEN_B_ADD_OFS, + HW_TPE_HFU_RCP_LEN_B_SUB_DYN, + HW_TPE_HFU_RCP_LEN_C_WR, + HW_TPE_HFU_RCP_LEN_C_POS_DYN, + HW_TPE_HFU_RCP_LEN_C_POS_OFS, + HW_TPE_HFU_RCP_LEN_C_ADD_DYN, + HW_TPE_HFU_RCP_LEN_C_ADD_OFS, + HW_TPE_HFU_RCP_LEN_C_SUB_DYN, + HW_TPE_HFU_RCP_TTL_WR, + HW_TPE_HFU_RCP_TTL_POS_DYN, + HW_TPE_HFU_RCP_TTL_POS_OFS, + HW_TPE_CSU_RCP_OUTER_L3_CMD, + HW_TPE_CSU_RCP_OUTER_L4_CMD, + HW_TPE_CSU_RCP_INNER_L3_CMD, + HW_TPE_CSU_RCP_INNER_L4_CMD, +}; +bool hw_mod_tpe_present(struct flow_api_backend_s *be); +int hw_mod_tpe_alloc(struct flow_api_backend_s *be); +void hw_mod_tpe_free(struct flow_api_backend_s *be); +int hw_mod_tpe_reset(struct flow_api_backend_s *be); + +int hw_mod_tpe_rpp_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_rpp_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_ins_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_rpl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_rpl_ext_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_rpl_rpl_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_cpy_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_hfu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); + +int hw_mod_tpe_csu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); enum debug_mode_e { FLOW_BACKEND_DEBUG_MODE_NONE = 0x0000, @@ -813,6 +892,7 @@ struct flow_api_backend_s { struct qsl_func_s qsl; struct slc_lr_func_s slc_lr; struct pdb_func_s pdb; + struct tpe_func_s tpe; /* NIC attributes */ unsigned int num_phy_ports; diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build index 0415e5a5b2..e2eff3cf1e 100644 --- a/drivers/net/ntnic/meson.build +++ b/drivers/net/ntnic/meson.build @@ -56,6 +56,7 @@ sources = files( 'nthw/flow_api/hw_mod/hw_mod_pdb.c', 'nthw/flow_api/hw_mod/hw_mod_qsl.c', 'nthw/flow_api/hw_mod/hw_mod_slc_lr.c', + 'nthw/flow_api/hw_mod/hw_mod_tpe.c', 'nthw/flow_filter/flow_nthw_cat.c', 'nthw/flow_filter/flow_nthw_csu.c', 'nthw/flow_filter/flow_nthw_flm.c', diff --git a/drivers/net/ntnic/nthw/flow_api/flow_api.c b/drivers/net/ntnic/nthw/flow_api/flow_api.c index 03946fb52f..9d47aed061 100644 --- a/drivers/net/ntnic/nthw/flow_api/flow_api.c +++ b/drivers/net/ntnic/nthw/flow_api/flow_api.c @@ -319,6 +319,15 @@ struct flow_nic_dev *flow_api_create(uint8_t adapter_no, const struct flow_api_b if (init_resource_elements(ndev, RES_FLM_RCP, ndev->be.flm.nb_categories)) goto err_exit; + if (init_resource_elements(ndev, RES_TPE_RCP, ndev->be.tpe.nb_rcp_categories)) + goto err_exit; + + if (init_resource_elements(ndev, RES_TPE_EXT, ndev->be.tpe.nb_rpl_ext_categories)) + goto err_exit; + + if (init_resource_elements(ndev, RES_TPE_RPL, ndev->be.tpe.nb_rpl_depth)) + goto err_exit; + if (init_resource_elements(ndev, RES_SCRUB_RCP, ndev->be.flm.nb_scrub_profiles)) goto err_exit; diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c index 118e49f539..13e98ea9ba 100644 --- a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c +++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c @@ -27,6 +27,7 @@ static const struct { hw_mod_slc_lr_present }, { "PDB", hw_mod_pdb_alloc, hw_mod_pdb_free, hw_mod_pdb_reset, hw_mod_pdb_present }, + { "TPE", hw_mod_tpe_alloc, hw_mod_tpe_free, hw_mod_tpe_reset, hw_mod_tpe_present }, }; #define MOD_COUNT (ARRAY_SIZE(module)) diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_tpe.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_tpe.c new file mode 100644 index 0000000000..180deefd72 --- /dev/null +++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_tpe.c @@ -0,0 +1,277 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2023 Napatech A/S + */ + +#include +#include + +#include "hw_mod_backend.h" + +#define _MOD_ "TPE" +#define _VER_ be->tpe.ver + +bool hw_mod_tpe_present(struct flow_api_backend_s *be) +{ + return be->iface->get_tpe_present(be->be_dev); +} + +int hw_mod_tpe_alloc(struct flow_api_backend_s *be) +{ + int nb; + _VER_ = be->iface->get_tpe_version(be->be_dev); + NT_LOG(DBG, FILTER, _MOD_ " MODULE VERSION %i.%i\n", VER_MAJOR(_VER_), VER_MINOR(_VER_)); + + nb = be->iface->get_nb_tpe_categories(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(tpe_categories); + + be->tpe.nb_rcp_categories = (uint32_t)nb; + + nb = be->iface->get_nb_tpe_ifr_categories(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(tpe_ifr_categories); + + be->tpe.nb_ifr_categories = (uint32_t)nb; + + nb = be->iface->get_nb_tx_cpy_writers(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(tx_cpy_writers); + + be->tpe.nb_cpy_writers = (uint32_t)nb; + + nb = be->iface->get_nb_tx_rpl_depth(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(tx_rpl_depth); + + be->tpe.nb_rpl_depth = (uint32_t)nb; + + nb = be->iface->get_nb_tx_rpl_ext_categories(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(tx_rpl_ext_categories); + + be->tpe.nb_rpl_ext_categories = (uint32_t)nb; + + switch (_VER_) { + case 3: + if (!callocate_mod((struct common_func_s *)&be->tpe, 10, &be->tpe.v3.rpp_rcp, + be->tpe.nb_rcp_categories, sizeof(struct tpe_v1_rpp_v0_rcp_s), + &be->tpe.v3.rpp_ifr_rcp, be->tpe.nb_ifr_categories, + sizeof(struct tpe_v2_rpp_v1_ifr_rcp_s), &be->tpe.v3.ifr_rcp, + be->tpe.nb_ifr_categories, sizeof(struct tpe_v2_ifr_v1_rcp_s), + + &be->tpe.v3.ins_rcp, be->tpe.nb_rcp_categories, + sizeof(struct tpe_v1_ins_v1_rcp_s), + + &be->tpe.v3.rpl_rcp, be->tpe.nb_rcp_categories, + sizeof(struct tpe_v3_rpl_v4_rcp_s), &be->tpe.v3.rpl_ext, + be->tpe.nb_rpl_ext_categories, + sizeof(struct tpe_v1_rpl_v2_ext_s), &be->tpe.v3.rpl_rpl, + be->tpe.nb_rpl_depth, sizeof(struct tpe_v1_rpl_v2_rpl_s), + + &be->tpe.v3.cpy_rcp, + be->tpe.nb_cpy_writers * be->tpe.nb_rcp_categories, + sizeof(struct tpe_v1_cpy_v1_rcp_s), + + &be->tpe.v3.hfu_rcp, be->tpe.nb_rcp_categories, + sizeof(struct tpe_v1_hfu_v1_rcp_s), + + &be->tpe.v3.csu_rcp, be->tpe.nb_rcp_categories, + sizeof(struct tpe_v1_csu_v0_rcp_s))) + return -1; + + break; + + default: + return UNSUP_VER; + } + + return 0; +} + +void hw_mod_tpe_free(struct flow_api_backend_s *be) +{ + if (be->tpe.base) { + free(be->tpe.base); + be->tpe.base = NULL; + } +} + +int hw_mod_tpe_reset(struct flow_api_backend_s *be) +{ + int err = 0; + + /* Zero entire cache area */ + zero_module_cache((struct common_func_s *)(&be->tpe)); + + NT_LOG(DBG, FILTER, "INIT TPE\n"); + err |= hw_mod_tpe_rpp_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_ins_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_rpl_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_rpl_ext_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_rpl_rpl_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_cpy_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_hfu_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_csu_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_rpp_ifr_rcp_flush(be, 0, ALL_ENTRIES); + err |= hw_mod_tpe_ifr_rcp_flush(be, 0, ALL_ENTRIES); + + return err; +} + +/* + * RPP_IFR_RCP + */ + +int hw_mod_tpe_rpp_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_ifr_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_ifr_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_rpp_ifr_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * RPP_RCP + */ + +int hw_mod_tpe_rpp_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rcp_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rcp_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_rpp_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * IFR_RCP + */ + +int hw_mod_tpe_ifr_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_ifr_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_ifr_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_ifr_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * INS_RCP + */ + +int hw_mod_tpe_ins_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rcp_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rcp_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_ins_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * RPL_RCP + */ + +int hw_mod_tpe_rpl_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rcp_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rcp_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_rpl_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * RPL_EXT + */ + +int hw_mod_tpe_rpl_ext_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rpl_ext_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rpl_ext_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_rpl_ext_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * RPL_RPL + */ + +int hw_mod_tpe_rpl_rpl_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rpl_depth; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rpl_depth) + return INDEX_TOO_LARGE; + + return be->iface->tpe_rpl_rpl_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * CPY_RCP + */ + +int hw_mod_tpe_cpy_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + const uint32_t cpy_size = be->tpe.nb_cpy_writers * be->tpe.nb_rcp_categories; + + if (count == ALL_ENTRIES) + count = cpy_size; + + if ((unsigned int)(start_idx + count) > cpy_size) + return INDEX_TOO_LARGE; + + return be->iface->tpe_cpy_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * HFU_RCP + */ + +int hw_mod_tpe_hfu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rcp_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rcp_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_hfu_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} + +/* + * CSU_RCP + */ + +int hw_mod_tpe_csu_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->tpe.nb_rcp_categories; + + if ((unsigned int)(start_idx + count) > be->tpe.nb_rcp_categories) + return INDEX_TOO_LARGE; + + return be->iface->tpe_csu_rcp_flush(be->be_dev, &be->tpe, start_idx, count); +} -- 2.45.0