From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0508145AB8; Sat, 5 Oct 2024 09:26:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EF36243326; Sat, 5 Oct 2024 09:26:38 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9958A432FC for ; Sat, 5 Oct 2024 09:26:36 +0200 (CEST) Received: from pps.filterd (m0431383.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4957IuFu008646; Sat, 5 Oct 2024 00:26:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=F 9jqBz7ZDF4HE/BcQUNrTq3aEp2BDz6fLLC6ffZXEpc=; b=NKK2NTYxtDKIfA2aK jVgRZdZLZMXJBemyJwMQu1kDDD378bX8AZ5Qc3vQsp6OZB1/z4wb+H5m9TrvASuf UDIkIF5ipRCenXgbqjKDIKNv0cGAEqc3Nlpjju8TBsDvLx8otBlLwzXeK/nNWlrc MaVlU7GHr0gCnX9Qzuh9Yvr26q5E3GlXbG6VrDYEnYSxEr3fF/rJudO0lq4Gg/Q/ fMdTDRBNcYvO5xRYSiyCZ8PvtsfHhIxhs7cdNr1hk3UdOrR62zHY8JxSmW/WtWfC A+OgyXCDcgGDKHVrsC1Zr6pwEH+CtlP6zjcN+LKCX4Fxkq4KkPuqAC0cei3ws1ko D3txg== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 422xmy05vv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 05 Oct 2024 00:26:35 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 5 Oct 2024 00:26:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sat, 5 Oct 2024 00:26:28 -0700 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 764963F7055; Sat, 5 Oct 2024 00:26:24 -0700 (PDT) From: To: , , , , , , , , , , Pavan Nikhilesh CC: Subject: [PATCH v6 4/6] event/cnkx: add pre-schedule support Date: Sat, 5 Oct 2024 12:55:58 +0530 Message-ID: <20241005072600.7962-5-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241005072600.7962-1-pbhagavatula@marvell.com> References: <20241004162451.6842-1-pbhagavatula@marvell.com> <20241005072600.7962-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: ACwDLb2K2_Zqcnta92fZ2aGvCcR2SKB8 X-Proofpoint-ORIG-GUID: ACwDLb2K2_Zqcnta92fZ2aGvCcR2SKB8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Add device level and port level pre-schedule support for cnxk eventdev. Signed-off-by: Pavan Nikhilesh --- doc/guides/eventdevs/cnxk.rst | 10 ---------- doc/guides/eventdevs/features/cnxk.ini | 1 + drivers/event/cnxk/cn10k_eventdev.c | 19 +++++++++++++++++-- drivers/event/cnxk/cn10k_worker.c | 21 +++++++++++++++++++++ drivers/event/cnxk/cn10k_worker.h | 2 ++ drivers/event/cnxk/cnxk_eventdev.c | 2 -- drivers/event/cnxk/cnxk_eventdev.h | 1 - 7 files changed, 41 insertions(+), 15 deletions(-) diff --git a/doc/guides/eventdevs/cnxk.rst b/doc/guides/eventdevs/cnxk.rst index d038930594..e21846f4e0 100644 --- a/doc/guides/eventdevs/cnxk.rst +++ b/doc/guides/eventdevs/cnxk.rst @@ -78,16 +78,6 @@ Runtime Config Options -a 0002:0e:00.0,single_ws=1 -- ``CN10K Getwork mode`` - - CN10K supports three getwork prefetch modes no prefetch[0], prefetch - immediately[1] and delayed prefetch on forward progress event[2]. - The default getwork mode is 2. - - For example:: - - -a 0002:0e:00.0,gw_mode=1 - - ``Event Group QoS support`` SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight diff --git a/doc/guides/eventdevs/features/cnxk.ini b/doc/guides/eventdevs/features/cnxk.ini index d1516372fa..5ba528f086 100644 --- a/doc/guides/eventdevs/features/cnxk.ini +++ b/doc/guides/eventdevs/features/cnxk.ini @@ -17,6 +17,7 @@ carry_flow_id = Y maintenance_free = Y runtime_queue_attr = Y profile_links = Y +preschedule = Y [Eth Rx adapter Features] internal_port = Y diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 2d7b169974..5bd779990e 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -527,6 +527,7 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) event_dev->dma_enqueue = cn10k_dma_adapter_enqueue; event_dev->profile_switch = cn10k_sso_hws_profile_switch; + event_dev->preschedule_modify = cn10k_sso_hws_preschedule_modify; #else RTE_SET_USED(event_dev); #endif @@ -541,6 +542,9 @@ cn10k_sso_info_get(struct rte_eventdev *event_dev, dev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN10K_PMD); cnxk_sso_info_get(dev, dev_info); dev_info->max_event_port_enqueue_depth = UINT32_MAX; + dev_info->event_dev_cap |= RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE | + RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE | + RTE_EVENT_DEV_CAP_PER_PORT_PRESCHEDULE; } static int @@ -566,6 +570,19 @@ cn10k_sso_dev_configure(const struct rte_eventdev *event_dev) if (rc < 0) goto cnxk_rsrc_fini; + switch (event_dev->data->dev_conf.preschedule_type) { + default: + case RTE_EVENT_PRESCHEDULE_NONE: + dev->gw_mode = CN10K_GW_MODE_NONE; + break; + case RTE_EVENT_PRESCHEDULE: + dev->gw_mode = CN10K_GW_MODE_PREF; + break; + case RTE_EVENT_PRESCHEDULE_ADAPTIVE: + dev->gw_mode = CN10K_GW_MODE_PREF_WFE; + break; + } + rc = cnxk_setup_event_ports(event_dev, cn10k_sso_init_hws_mem, cn10k_sso_hws_setup); if (rc < 0) @@ -1199,7 +1216,6 @@ cn10k_sso_init(struct rte_eventdev *event_dev) return 0; } - dev->gw_mode = CN10K_GW_MODE_PREF_WFE; rc = cnxk_sso_init(event_dev); if (rc < 0) return rc; @@ -1256,7 +1272,6 @@ RTE_PMD_REGISTER_KMOD_DEP(event_cn10k, "vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(event_cn10k, CNXK_SSO_XAE_CNT "=" CNXK_SSO_GGRP_QOS "=" CNXK_SSO_FORCE_BP "=1" - CN10K_SSO_GW_MODE "=" CN10K_SSO_STASH "=" CNXK_TIM_DISABLE_NPA "=1" CNXK_TIM_CHNK_SLOTS "=" diff --git a/drivers/event/cnxk/cn10k_worker.c b/drivers/event/cnxk/cn10k_worker.c index d59769717e..a0e85face1 100644 --- a/drivers/event/cnxk/cn10k_worker.c +++ b/drivers/event/cnxk/cn10k_worker.c @@ -442,3 +442,24 @@ cn10k_sso_hws_profile_switch(void *port, uint8_t profile) return 0; } + +int __rte_hot +cn10k_sso_hws_preschedule_modify(void *port, enum rte_event_dev_preschedule_type type) +{ + struct cn10k_sso_hws *ws = port; + + ws->gw_wdata &= ~(BIT(19) | BIT(20)); + switch (type) { + default: + case RTE_EVENT_PRESCHEDULE_NONE: + break; + case RTE_EVENT_PRESCHEDULE: + ws->gw_wdata |= BIT(19); + break; + case RTE_EVENT_PRESCHEDULE_ADAPTIVE: + ws->gw_wdata |= BIT(19) | BIT(20); + break; + } + + return 0; +} diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index c5026409d7..4785cc6575 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -377,6 +377,8 @@ uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void *port, const struct rte_event ev[], uint16_t nb_events); int __rte_hot cn10k_sso_hws_profile_switch(void *port, uint8_t profile); +int __rte_hot cn10k_sso_hws_preschedule_modify(void *port, + enum rte_event_dev_preschedule_type type); #define R(name, flags) \ uint16_t __rte_hot cn10k_sso_hws_deq_##name( \ diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index 4b2d6bffa6..c1df481827 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -624,8 +624,6 @@ cnxk_sso_parse_devargs(struct cnxk_sso_evdev *dev, struct rte_devargs *devargs) &dev->force_ena_bp); rte_kvargs_process(kvlist, CN9K_SSO_SINGLE_WS, &parse_kvargs_flag, &single_ws); - rte_kvargs_process(kvlist, CN10K_SSO_GW_MODE, &parse_kvargs_value, - &dev->gw_mode); rte_kvargs_process(kvlist, CN10K_SSO_STASH, &parse_sso_kvargs_stash_dict, dev); dev->dual_ws = !single_ws; diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index ece49394e7..f147ef3c78 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -30,7 +30,6 @@ #define CNXK_SSO_GGRP_QOS "qos" #define CNXK_SSO_FORCE_BP "force_rx_bp" #define CN9K_SSO_SINGLE_WS "single_ws" -#define CN10K_SSO_GW_MODE "gw_mode" #define CN10K_SSO_STASH "stash" #define CNXK_SSO_MAX_PROFILES 2 -- 2.25.1