From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
by inbox.dpdk.org (Postfix) with ESMTP id 542A645ACC;
Sun, 6 Oct 2024 22:41:51 +0200 (CEST)
Received: from mails.dpdk.org (localhost [127.0.0.1])
by mails.dpdk.org (Postfix) with ESMTP id B205840684;
Sun, 6 Oct 2024 22:38:27 +0200 (CEST)
Received: from egress-ip11a.ess.de.barracuda.com
(egress-ip11a.ess.de.barracuda.com [18.184.203.234])
by mails.dpdk.org (Postfix) with ESMTP id D7CC0406BC
for <dev@dpdk.org>; Sun, 6 Oct 2024 22:38:01 +0200 (CEST)
Received: from EUR05-DB8-obe.outbound.protection.outlook.com
(mail-db8eur05lp2104.outbound.protection.outlook.com [104.47.17.104]) by
mx-outbound44-124.eu-central-1c.ess.aws.cudaops.com (version=TLSv1.2
cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO);
Sun, 06 Oct 2024 20:38:00 +0000
ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;
b=JlMsAbmeI6OvcgIDoSSjQQ6KOLLZSBmhROKtWv9hsPp8KFDIVWnI5hKhXbLFGNZ/P5WSd0mJ0GzZKLUg6S1cdYK6ewr0rTBu4CSAFPW2gzUhpGhgidzfuEXGOiQlZ0Bu+EvX7bDfk5JT5NH9inGRrBRFvMpIDjjGLZ1+8esazYYKUdKvdAoWeRODtQgLsXwbjL2lP+5W3FzJuojO3tj/3bJANcjOWEpLiXNgr8lq3dOEDqxmheJfc9tzURGMGPJs0n0ezjtz3djTsl7Tq2NfO0hbBte7auCNW//M9+gm6YQF+0rgFKHShFVjFgihAAQBXg1Dx4eQXEMmX64EPOS+UA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;
s=arcselector10001;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;
bh=wBBV/Gu9lxIr+wr/M42sah3EV9egPZ3zeRl9cYtkNt0=;
b=WAixZsCD0iWCgb5mu3ANtZUCLSEPEyRixEgX8CbQZguJknXgkPe5gttQ2Hunn1WOFiIFqMRwrmbdOlqF8RNSEKHcj0jIHpyI8l6VofbXf5OwhvvJzHF7TTekI7NdYxbmjfUn/UqC2ljO+0Bo7aEmizPJI6+e2OYNBhjfxMNJQG+7JSw7TXBm/dVbK1m4fOQWK/FJyzfDJeSkpCxWDxJkqhMSXPdS05imPtmfsRfir5HZv52mABWZNjJT9CwQ6boVkpEHEvRDlBSJI1yyrOi29peqiwPp6WyI0/O4gpT9bZfMB0tBsWRsIz7YYDs2YyIuBh4AbxbZ2G8WDFYC2A2ajw==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is
178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com;
dmarc=fail (p=reject sp=reject pct=100) action=oreject
header.from=napatech.com; dkim=none (message not signed); arc=none (0)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com;
s=selector1;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
bh=wBBV/Gu9lxIr+wr/M42sah3EV9egPZ3zeRl9cYtkNt0=;
b=IzSjJ7TArPZA14glocNw9ZpVkwpmL881HXHMJJEqM8AqxxXoSqnspfMq+8xkJ3p6k3X8Xk0vLRuwd6gxBAcVTxpATY/5/Y58RC5gs+qW4rp4G1X96LuFUCfltxlqIsVIZAStnlxK1IaheZviAX2gH/wlPE8SFJR7OcYTIiGHx58=
Received: from AM6PR04CA0036.eurprd04.prod.outlook.com (2603:10a6:20b:92::49)
by AS4P190MB1975.EURP190.PROD.OUTLOOK.COM (2603:10a6:20b:517::19)
with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.22; Sun, 6 Oct
2024 20:37:59 +0000
Received: from AMS0EPF00000190.eurprd05.prod.outlook.com
(2603:10a6:20b:92:cafe::eb) by AM6PR04CA0036.outlook.office365.com
(2603:10a6:20b:92::49) with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.20 via Frontend
Transport; Sun, 6 Oct 2024 20:37:59 +0000
X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4)
smtp.mailfrom=napatech.com; dkim=none (message not signed)
header.d=none;dmarc=fail action=oreject header.from=napatech.com;
Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not
designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com;
client-ip=178.72.21.4; helo=localhost.localdomain;
Received: from localhost.localdomain (178.72.21.4) by
AMS0EPF00000190.mail.protection.outlook.com (10.167.16.213) with Microsoft
SMTP Server id 15.20.7918.13 via Frontend Transport; Sun, 6 Oct 2024 20:37:58
+0000
From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com,
Oleksandr Kolomeiets <okl-plv@napatech.com>
Subject: [PATCH v1 34/50] net/ntnic: add packet descriptor builder (PDB) FPGA
module
Date: Sun, 6 Oct 2024 22:37:01 +0200
Message-ID: <20241006203728.330792-35-sil-plv@napatech.com>
X-Mailer: git-send-email 2.45.0
In-Reply-To: <20241006203728.330792-1-sil-plv@napatech.com>
References: <20241006203728.330792-1-sil-plv@napatech.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
X-EOPAttributedMessage: 0
X-MS-PublicTrafficType: Email
X-MS-TrafficTypeDiagnostic: AMS0EPF00000190:EE_|AS4P190MB1975:EE_
Content-Type: text/plain
X-MS-Office365-Filtering-Correlation-Id: db863f4e-bf05-4106-9fd3-08dce646c401
X-MS-Exchange-SenderADCheck: 1
X-MS-Exchange-AntiSpam-Relay: 0
X-Microsoft-Antispam: BCL:0;
ARA:13230040|1800799024|82310400026|36860700013|376014;
X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?MN40yxueEhteqg5WOCf6FCAImM9n/h42woJuR7Cw46FoQs1cpK1d2UV+O321?=
=?us-ascii?Q?nk/jc2Uh6n7BFhlw05Q6j0PNyDO/Y3SV1xOIInnOa1/sU0Upm9vdpTg4Ta34?=
=?us-ascii?Q?YTyjD6mrBl75FYisKCVXjq1pj6g6kmcpfhunSraixkYCjMkRgc1cAk1rjPK4?=
=?us-ascii?Q?9mzruSmOzKE+RD34eCDv/EEp3SdEvUI97n4SIWa3tDQbitRy8XB+bnl+VUxI?=
=?us-ascii?Q?ytnPeLRkAgKnmy1F63ZCMD1g3TQ/1aV2yvQS2ROBgfXwDdxstFRn5ag067LH?=
=?us-ascii?Q?Ntex7XbFeABJ+xZ+TqiMTuWb1eqwsOT9if2ovEF13GfJxmsD2SS4LjY2/ZkL?=
=?us-ascii?Q?QtqgoU6jGckIsNMpwcPqEyQOP7fMK6JaeXuGReiSBFSyTNmPocPWxFnAC1GT?=
=?us-ascii?Q?Ar4kLp1WgqGh6TB5BuKyM/uM7TG7Ys7SEM6TjTbE/lm/FXdA6Nf6uKFbmEzx?=
=?us-ascii?Q?WIVFHl11rb0GclkbyoIQwAr9acU5dnm6Ge8r4GJw08LByd5yVyQ1Y5KIUm9T?=
=?us-ascii?Q?b8qeDPxni+bDsHfrZ6oxnNkJLDdCnIizT8YqQtqOCfqi+KG05x2gJxKeGKFa?=
=?us-ascii?Q?BcpFGNm9HjZ0LuAAxx/r9HPRegJixcTG1jQaJ1UBJhJS/GZwpHfbiu6m2EMJ?=
=?us-ascii?Q?9auOhCguwaUbCE0BuKIUDeJESiIFgi1BI1kC9ZPjjgeZvspbaPDfh3P3BtN/?=
=?us-ascii?Q?5v/muEaaOsupix9vhX51QTqL5MUZ2fabnJPPmeb5OkMbhQxbK/Q4gOIsM0nH?=
=?us-ascii?Q?QYsooS9y+s/1FlL1mH1nd2x+Cx+bFGoZnWZrih31aP0aFqx//DJWL2pCJO5o?=
=?us-ascii?Q?wjrH6f9FSBYxTN9jr/tH2woVVViknSMnNzxSnnztg9MSoowj2FMKBnGy6Xvc?=
=?us-ascii?Q?5pOtuUPN3RBicixg4H3OYfuRckvxWQJdBBFb1ya7nuK4Qf0wdj3zupg/JuE2?=
=?us-ascii?Q?LBFcNzLpi25rVT07i4W3leArrkX4JEW36SVq2SuQRjRc+0liOeO8ApNPNlHP?=
=?us-ascii?Q?h4+9e/CunVmtVuDb0KIZTOFzY+ZnVctfE/aVyl4kw1AqpMvGsdoOtgTkJ8X+?=
=?us-ascii?Q?PwvLnNq04V7ltwq8fqGygscXabkux4L8p9fKgN9NHSHTHrxurIH27cS2yzHK?=
=?us-ascii?Q?rkSWM1kFg4KEKX7elr07mYczTdcZjjsRZS8D4m6E8z9QuffdWGDZrujf1cUM?=
=?us-ascii?Q?AiHx9evj3R8UimYjNKqGAcVslC9+yE6bDXjjPzH3IjyUELuG7PPWZcQK4cg8?=
=?us-ascii?Q?1QAUcUUi3zsGNmamH7p5JdBcUWbaEfhmwsphuv86D07/K+0/CVYb5xjsVOYM?=
=?us-ascii?Q?XmLVqK/UKvnW0HdiGOEfrpoQmHcogEE+XDrd/hWS+8vrA5Rd2Mg+c7ayuDlD?=
=?us-ascii?Q?bwjtnwQsR+layg1gN4ze0k1oaCXQ?=
X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:;
IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent;
CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);
DIR:OUT; SFP:1102;
X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: UEpGlRY9zjaXdtS0Mu+Bz1fDSyxXsVUZyEqqZQf2ppc2j7ZFJT+/WH1ljz6D+q6CpT1MN9zWU9r2B+R7wKQx1D/qqqJYCdjeoi4vrvtS+gwVELG9VVi3mrOSPz17PKhLHktHeYdLlgF3mwfwY75hQz4Cqr4l6HM64xMgciJz2w04xD0HEI8VJdeAI1CU+aCvvBKF9opmFXeaBLQ12wts3egIdOeXWJeSmDPVn20TLkJmR7Ah6tsEYDt7wx6YVDnKlAs55/91f9u5BmG3apNTicEZJ4aEwVlfEGCmM56a8vvHhDOhgw/pU5sD3m8uFohGASUa9gU6lFvDvK4wdedXWB5Vogna0gmpaserbFFmNc1wZXVAsjWYRPMx8U+kiNxYPaIBVEdvMfAZCm9iND0aU2tEMdNG3fME5xx+Ea+qXf6tuJ7LkooOGScpbwYR6qb+6wwQYngzI3+vB6c0A8Lex4Rwxx/soXzejvlGVnMlxY+G+Cab7YUSea+SeAPp3Gv9L6BKYy1JiDd7Vjb4Sx0aG835bUn8a7R6HzPrpldqmmybAyor8vHT7OSuJ9bStA/DLw2euIxnL+k8XvVjhNsjibj0scHDzrVWVvz/gr0Uc8EwkVGqS3cy48YXZK3uXOHKW4nzKOOqpMHIjOKHV7V7dA==
X-OriginatorOrg: napatech.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Oct 2024 20:37:58.8901 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: db863f4e-bf05-4106-9fd3-08dce646c401
X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4];
Helo=[localhost.localdomain]
X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000190.eurprd05.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4P190MB1975
X-BESS-ID: 1728247080-311388-12679-123472-1
X-BESS-VER: 2019.1_20240924.1654
X-BESS-Apparent-Source-IP: 104.47.17.104
X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVpaGJqZAVgZQ0NgiySDVzNDAIs
3MxMgoMdnAINU4zSjRPC05xcg4Kc1AqTYWAAKLqOlBAAAA
X-BESS-Outbound-Spam-Score: 0.00
X-BESS-Outbound-Spam-Report: Code version 3.2,
rules version 3.2.2.259547 [from
cloudscan18-201.eu-central-1b.ess.aws.cudaops.com]
Rule breakdown below
pts rule name description
---- ---------------------- --------------------------------
0.00 BSF_BESS_OUTBOUND META: BESS Outbound
X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS113687 scores of
KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND
X-BESS-BRTS-Status: 1
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
From: Oleksandr Kolomeiets <okl-plv@napatech.com>
The Packet Description Builder module creates packet meta-data
for example virtio-net headers.
Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
---
drivers/net/ntnic/include/hw_mod_backend.h | 34 ++++++++
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/nthw/flow_api/flow_api.c | 3 +
.../nthw/flow_api/hw_mod/hw_mod_backend.c | 1 +
.../ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c | 86 +++++++++++++++++++
.../supported/nthw_fpga_9563_055_049_0000.c | 40 ++++++++-
6 files changed, 164 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c
diff --git a/drivers/net/ntnic/include/hw_mod_backend.h b/drivers/net/ntnic/include/hw_mod_backend.h
index b28192e682..9644639131 100644
--- a/drivers/net/ntnic/include/hw_mod_backend.h
+++ b/drivers/net/ntnic/include/hw_mod_backend.h
@@ -609,6 +609,39 @@ struct pdb_func_s {
struct hw_mod_pdb_v9_s v9;
};
};
+enum hw_pdb_e {
+ /* functions */
+ HW_PDB_RCP_PRESET_ALL = 0,
+ HW_PDB_RCP_COMPARE,
+ HW_PDB_RCP_FIND,
+ /* fields */
+ HW_PDB_RCP_DESCRIPTOR = FIELD_START_INDEX,
+ HW_PDB_RCP_DESC_LEN,
+ HW_PDB_RCP_TX_PORT,
+ HW_PDB_RCP_TX_IGNORE,
+ HW_PDB_RCP_TX_NOW,
+ HW_PDB_RCP_CRC_OVERWRITE,
+ HW_PDB_RCP_ALIGN,
+ HW_PDB_RCP_OFS0_DYN,
+ HW_PDB_RCP_OFS0_REL,
+ HW_PDB_RCP_OFS1_DYN,
+ HW_PDB_RCP_OFS1_REL,
+ HW_PDB_RCP_OFS2_DYN,
+ HW_PDB_RCP_OFS2_REL,
+ HW_PDB_RCP_IP_PROT_TNL,
+ HW_PDB_RCP_PPC_HSH,
+ HW_PDB_RCP_DUPLICATE_EN,
+ HW_PDB_RCP_DUPLICATE_BIT,
+ HW_PDB_RCP_PCAP_KEEP_FCS,
+ HW_PDB_CONFIG_TS_FORMAT,
+ HW_PDB_CONFIG_PORT_OFS,
+};
+bool hw_mod_pdb_present(struct flow_api_backend_s *be);
+int hw_mod_pdb_alloc(struct flow_api_backend_s *be);
+void hw_mod_pdb_free(struct flow_api_backend_s *be);
+int hw_mod_pdb_reset(struct flow_api_backend_s *be);
+int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count);
+int hw_mod_pdb_config_flush(struct flow_api_backend_s *be);
struct tpe_func_s {
COMMON_FUNC_INFO_S;
@@ -779,6 +812,7 @@ struct flow_api_backend_s {
struct hsh_func_s hsh;
struct qsl_func_s qsl;
struct slc_lr_func_s slc_lr;
+ struct pdb_func_s pdb;
/* NIC attributes */
unsigned int num_phy_ports;
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 4caee8ac41..0415e5a5b2 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -53,6 +53,7 @@ sources = files(
'nthw/flow_api/hw_mod/hw_mod_flm.c',
'nthw/flow_api/hw_mod/hw_mod_hsh.c',
'nthw/flow_api/hw_mod/hw_mod_km.c',
+ 'nthw/flow_api/hw_mod/hw_mod_pdb.c',
'nthw/flow_api/hw_mod/hw_mod_qsl.c',
'nthw/flow_api/hw_mod/hw_mod_slc_lr.c',
'nthw/flow_filter/flow_nthw_cat.c',
diff --git a/drivers/net/ntnic/nthw/flow_api/flow_api.c b/drivers/net/ntnic/nthw/flow_api/flow_api.c
index 5d6571310c..03946fb52f 100644
--- a/drivers/net/ntnic/nthw/flow_api/flow_api.c
+++ b/drivers/net/ntnic/nthw/flow_api/flow_api.c
@@ -301,6 +301,9 @@ struct flow_nic_dev *flow_api_create(uint8_t adapter_no, const struct flow_api_b
if (init_resource_elements(ndev, RES_HSH_RCP, ndev->be.hsh.nb_rcp))
goto err_exit;
+ if (init_resource_elements(ndev, RES_PDB_RCP, ndev->be.pdb.nb_pdb_rcp_categories))
+ goto err_exit;
+
if (init_resource_elements(ndev, RES_QSL_RCP, ndev->be.qsl.nb_rcp_categories))
goto err_exit;
diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
index 6b0ea2a4a6..118e49f539 100644
--- a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
+++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
@@ -26,6 +26,7 @@ static const struct {
"SLC LR", hw_mod_slc_lr_alloc, hw_mod_slc_lr_free, hw_mod_slc_lr_reset,
hw_mod_slc_lr_present
},
+ { "PDB", hw_mod_pdb_alloc, hw_mod_pdb_free, hw_mod_pdb_reset, hw_mod_pdb_present },
};
#define MOD_COUNT (ARRAY_SIZE(module))
diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c
new file mode 100644
index 0000000000..13f0972e07
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c
@@ -0,0 +1,86 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "hw_mod_backend.h"
+
+#define _MOD_ "PDB"
+#define _VER_ be->pdb.ver
+
+bool hw_mod_pdb_present(struct flow_api_backend_s *be)
+{
+ return be->iface->get_pdb_present(be->be_dev);
+}
+
+int hw_mod_pdb_alloc(struct flow_api_backend_s *be)
+{
+ int nb;
+ _VER_ = be->iface->get_pdb_version(be->be_dev);
+ NT_LOG(DBG, FILTER, "PDB MODULE VERSION %i.%i\n", VER_MAJOR(_VER_), VER_MINOR(_VER_));
+
+ nb = be->iface->get_nb_pdb_categories(be->be_dev);
+
+ if (nb <= 0)
+ return COUNT_ERROR(pdb_categories);
+
+ be->pdb.nb_pdb_rcp_categories = (uint32_t)nb;
+
+ switch (_VER_) {
+ case 9:
+ if (!callocate_mod((struct common_func_s *)&be->pdb, 2, &be->pdb.v9.rcp,
+ be->pdb.nb_pdb_rcp_categories, sizeof(struct pdb_v9_rcp_s),
+ &be->pdb.v9.config, 1, sizeof(struct pdb_v9_config_s)))
+ return -1;
+
+ break;
+
+ /* end case 9 */
+ default:
+ return UNSUP_VER;
+ }
+
+ return 0;
+}
+
+void hw_mod_pdb_free(struct flow_api_backend_s *be)
+{
+ if (be->pdb.base) {
+ free(be->pdb.base);
+ be->pdb.base = NULL;
+ }
+}
+
+int hw_mod_pdb_reset(struct flow_api_backend_s *be)
+{
+ int err = 0;
+ /* Zero entire cache area */
+ zero_module_cache((struct common_func_s *)(&be->hsh));
+
+ NT_LOG(DBG, FILTER, "INIT PDB RCP\n");
+ err |= hw_mod_pdb_rcp_flush(be, 0, ALL_ENTRIES);
+
+ NT_LOG(DBG, FILTER, "INIT PDB CONFIG\n");
+ err |= hw_mod_pdb_config_flush(be);
+ return err;
+}
+
+int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count)
+{
+ if (count == ALL_ENTRIES)
+ count = be->pdb.nb_pdb_rcp_categories;
+
+ if ((unsigned int)(start_idx + count) > be->pdb.nb_pdb_rcp_categories)
+ return INDEX_TOO_LARGE;
+
+ return be->iface->pdb_rcp_flush(be->be_dev, &be->pdb, start_idx, count);
+}
+
+int hw_mod_pdb_config_flush(struct flow_api_backend_s *be)
+{
+ return be->iface->pdb_config_flush(be->be_dev, &be->pdb);
+}
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
index 7eeb210b80..9f821abf55 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
@@ -1297,6 +1297,43 @@ static nthw_fpga_register_init_s pci_wr_tg_registers[] = {
{ PCI_WR_TG_TG_WR_RUN, 4, 16, NTHW_FPGA_REG_TYPE_WO, 0, 1, pci_wr_tg_tg_wr_run_fields },
};
+static nthw_fpga_field_init_s pdb_config_fields[] = {
+ { PDB_CONFIG_PORT_OFS, 6, 3, 0 },
+ { PDB_CONFIG_TS_FORMAT, 3, 0, 0 },
+};
+
+static nthw_fpga_field_init_s pdb_rcp_ctrl_fields[] = {
+ { PDB_RCP_CTRL_ADR, 4, 0, 0x0000 },
+ { PDB_RCP_CTRL_CNT, 16, 16, 0x0000 },
+};
+
+static nthw_fpga_field_init_s pdb_rcp_data_fields[] = {
+ { PDB_RCP_DATA_ALIGN, 1, 17, 0x0000 },
+ { PDB_RCP_DATA_CRC_OVERWRITE, 1, 16, 0x0000 },
+ { PDB_RCP_DATA_DESCRIPTOR, 4, 0, 0x0000 },
+ { PDB_RCP_DATA_DESC_LEN, 5, 4, 0 },
+ { PDB_RCP_DATA_DUPLICATE_BIT, 5, 61, 0x0000 },
+ { PDB_RCP_DATA_DUPLICATE_EN, 1, 60, 0x0000 },
+ { PDB_RCP_DATA_IP_PROT_TNL, 1, 57, 0x0000 },
+ { PDB_RCP_DATA_OFS0_DYN, 5, 18, 0x0000 },
+ { PDB_RCP_DATA_OFS0_REL, 8, 23, 0x0000 },
+ { PDB_RCP_DATA_OFS1_DYN, 5, 31, 0x0000 },
+ { PDB_RCP_DATA_OFS1_REL, 8, 36, 0x0000 },
+ { PDB_RCP_DATA_OFS2_DYN, 5, 44, 0x0000 },
+ { PDB_RCP_DATA_OFS2_REL, 8, 49, 0x0000 },
+ { PDB_RCP_DATA_PCAP_KEEP_FCS, 1, 66, 0x0000 },
+ { PDB_RCP_DATA_PPC_HSH, 2, 58, 0x0000 },
+ { PDB_RCP_DATA_TX_IGNORE, 1, 14, 0x0000 },
+ { PDB_RCP_DATA_TX_NOW, 1, 15, 0x0000 },
+ { PDB_RCP_DATA_TX_PORT, 5, 9, 0x0000 },
+};
+
+static nthw_fpga_register_init_s pdb_registers[] = {
+ { PDB_CONFIG, 2, 10, NTHW_FPGA_REG_TYPE_WO, 0, 2, pdb_config_fields },
+ { PDB_RCP_CTRL, 0, 32, NTHW_FPGA_REG_TYPE_WO, 0, 2, pdb_rcp_ctrl_fields },
+ { PDB_RCP_DATA, 1, 67, NTHW_FPGA_REG_TYPE_WO, 0, 18, pdb_rcp_data_fields },
+};
+
static nthw_fpga_field_init_s qsl_qen_ctrl_fields[] = {
{ QSL_QEN_CTRL_ADR, 5, 0, 0x0000 },
{ QSL_QEN_CTRL_CNT, 16, 16, 0x0000 },
@@ -1510,6 +1547,7 @@ static nthw_fpga_module_init_s fpga_modules[] = {
MOD_PCI_WR_TG, 0, MOD_PCI_WR_TG, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 2304, 7,
pci_wr_tg_registers
},
+ { MOD_PDB, 0, MOD_PDB, 0, 9, NTHW_FPGA_BUS_TYPE_RAB1, 2560, 3, pdb_registers },
{ MOD_QSL, 0, MOD_QSL, 0, 7, NTHW_FPGA_BUS_TYPE_RAB1, 1792, 8, qsl_registers },
{ MOD_RAC, 0, MOD_RAC, 3, 0, NTHW_FPGA_BUS_TYPE_PCI, 8192, 14, rac_registers },
{ MOD_RST9563, 0, MOD_RST9563, 0, 5, NTHW_FPGA_BUS_TYPE_RAB0, 1024, 5, rst9563_registers },
@@ -1672,5 +1710,5 @@ static nthw_fpga_prod_param_s product_parameters[] = {
};
nthw_fpga_prod_init_s nthw_fpga_9563_055_049_0000 = {
- 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 19, fpga_modules,
+ 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 20, fpga_modules,
};
--
2.45.0