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From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Bing Zhao
<bingz@nvidia.com>, Ori Kam <orika@nvidia.com>, Suanming Mou
<suanmingm@nvidia.com>, Matan Azrad <matan@nvidia.com>
CC: <dev@dpdk.org>
Subject: [PATCH 02/10] net/mlx5: add checking if unicast flow rule exists
Date: Thu, 17 Oct 2024 09:57:30 +0200
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Add 2 internal functions for checking if:
- unicast DMAC control flow rule or
- unicast DMAC with VLAN control flow rule,
was created.
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5.h | 11 +++++++++++
drivers/net/mlx5/mlx5_flow.c | 37 ++++++++++++++++++++++++++++++++++++
2 files changed, 48 insertions(+)
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 80829be5b4..3551b793d6 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1831,6 +1831,17 @@ struct mlx5_hw_ctrl_flow_info {
};
};
+/** Returns true if a control flow rule with unicast DMAC match on given address was created. */
+bool mlx5_ctrl_flow_uc_dmac_exists(struct rte_eth_dev *dev, const struct rte_ether_addr *addr);
+
+/**
+ * Returns true if a control flow rule with unicast DMAC and VLAN match
+ * on given values was created.
+ */
+bool mlx5_ctrl_flow_uc_dmac_vlan_exists(struct rte_eth_dev *dev,
+ const struct rte_ether_addr *addr,
+ const uint16_t vid);
+
/** Entry for tracking control flow rules in HWS. */
struct mlx5_hw_ctrl_flow {
LIST_ENTRY(mlx5_hw_ctrl_flow) next;
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index effc61cdc9..69f8bd8d97 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -12180,3 +12180,40 @@ rte_pmd_mlx5_destroy_geneve_tlv_parser(void *handle)
return -rte_errno;
#endif
}
+
+bool
+mlx5_ctrl_flow_uc_dmac_exists(struct rte_eth_dev *dev, const struct rte_ether_addr *addr)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_hw_ctrl_flow *entry;
+ bool exists = false;
+
+ LIST_FOREACH(entry, &priv->hw_ctrl_flows, next) {
+ if (entry->info.type == MLX5_HW_CTRL_FLOW_TYPE_DEFAULT_RX_RSS_UNICAST_DMAC &&
+ rte_is_same_ether_addr(addr, &entry->info.uc.dmac)) {
+ exists = true;
+ break;
+ }
+ }
+ return exists;
+}
+
+bool
+mlx5_ctrl_flow_uc_dmac_vlan_exists(struct rte_eth_dev *dev,
+ const struct rte_ether_addr *addr,
+ const uint16_t vid)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_hw_ctrl_flow *entry;
+ bool exists = false;
+
+ LIST_FOREACH(entry, &priv->hw_ctrl_flows, next) {
+ if (entry->info.type == MLX5_HW_CTRL_FLOW_TYPE_DEFAULT_RX_RSS_UNICAST_DMAC_VLAN &&
+ rte_is_same_ether_addr(addr, &entry->info.uc.dmac) &&
+ vid == entry->info.uc.vlan) {
+ exists = true;
+ break;
+ }
+ }
+ return exists;
+}
--
2.39.5