[PATCH v6 44/47] net/bnxt: tf_ulp: enable support for truflow feature configuration

[Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>]

From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>

Added truflow feature bit meson configuration parameter to enable
optional capability features of the appplication.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c    |  6 ++++-
 drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c   |  6 ++++-
 drivers/net/bnxt/tf_ulp/bnxt_ulp_utils.h | 32 ++++++++++++++++++++++++
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
index c591f9327c..fa7e8fe000 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
@@ -476,7 +476,11 @@ ulp_tf_cntxt_app_caps_init(struct bnxt *bp,
 					       info[i].min_flow_priority);
 		bnxt_ulp_max_flow_priority_set(ulp_ctx,
 					       info[i].max_flow_priority);
-		ulp_ctx->cfg_data->feature_bits = info[i].feature_bits;
+		/* Update the capability feature bits*/
+		if (bnxt_ulp_cap_feat_process(info[i].feature_bits,
+					      &ulp_ctx->cfg_data->feature_bits))
+			return -EINVAL;
+
 		bnxt_ulp_cntxt_ptr2_default_class_bits_set(ulp_ctx,
 							   info[i].default_class_bits);
 		bnxt_ulp_cntxt_ptr2_default_act_bits_set(ulp_ctx,
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
index ebbc5a85a9..d83f3df884 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
@@ -536,7 +536,11 @@ ulp_tfc_cntxt_app_caps_init(struct bnxt *bp, uint8_t app_id, uint32_t dev_id)
 					    "Socket Direct feature is enabled\n");
 			}
 		}
-		ulp_ctx->cfg_data->feature_bits = info[i].feature_bits;
+		/* Update the capability feature bits*/
+		if (bnxt_ulp_cap_feat_process(info[i].feature_bits,
+					      &ulp_ctx->cfg_data->feature_bits))
+			return -EINVAL;
+
 		bnxt_ulp_default_app_priority_set(ulp_ctx,
 						  info[i].default_priority);
 		bnxt_ulp_max_def_priority_set(ulp_ctx,
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_utils.h b/drivers/net/bnxt/tf_ulp/bnxt_ulp_utils.h
index 26087526e8..edc75da05e 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_utils.h
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_utils.h
@@ -1035,4 +1035,36 @@ bnxt_ulp_vfr_session_fid_rem(struct bnxt_ulp_context *ulp_ctx,
 	return rc;
 }
 
+static inline int32_t
+bnxt_ulp_cap_feat_process(uint64_t feat_bits, uint64_t *out_bits)
+{
+#ifdef RTE_BNXT_TF_FEAT_BITS
+	uint64_t bit = RTE_BNXT_TF_FEAT_BITS;
+#else
+	uint64_t bit = 0;
+#endif
+
+	*out_bits = 0;
+	if ((feat_bits | bit) != feat_bits) {
+		BNXT_DRV_DBG(ERR, "Invalid TF feature bit is set %" PRIu64 "\n",
+			     bit);
+		return -EINVAL;
+	}
+	if ((bit & BNXT_ULP_FEATURE_BIT_PARENT_DMAC) &&
+	    (bit & BNXT_ULP_FEATURE_BIT_PORT_DMAC)) {
+		BNXT_DRV_DBG(ERR, "Invalid both Port and Parent Mac set\n");
+		return -EINVAL;
+	}
+
+	if (bit & BNXT_ULP_FEATURE_BIT_PARENT_DMAC)
+		BNXT_DRV_DBG(ERR, "Parent Mac Address Feature is enabled\n");
+	if (bit & BNXT_ULP_FEATURE_BIT_PORT_DMAC)
+		BNXT_DRV_DBG(ERR, "Port Mac Address Feature is enabled\n");
+	if (bit & BNXT_ULP_FEATURE_BIT_MULTI_TUNNEL_FLOW)
+		BNXT_DRV_DBG(ERR, "Multi Tunnel Flow Feature is enabled\n");
+
+	*out_bits =  bit;
+	return 0;
+}
+
 #endif /* _BNXT_ULP_UTILS_H_ */
-- 
2.39.3