From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124])
by inbox.dpdk.org (Postfix) with ESMTP id F1BAB45BA0;
Tue, 22 Oct 2024 14:07:51 +0200 (CEST)
Received: from mails.dpdk.org (localhost [127.0.0.1])
by mails.dpdk.org (Postfix) with ESMTP id 8DDE9406B6;
Tue, 22 Oct 2024 14:07:35 +0200 (CEST)
Received: from NAM12-MW2-obe.outbound.protection.outlook.com
(mail-mw2nam12on2082.outbound.protection.outlook.com [40.107.244.82])
by mails.dpdk.org (Postfix) with ESMTP id 4789F40674
for <dev@dpdk.org>; Tue, 22 Oct 2024 14:07:22 +0200 (CEST)
ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;
b=Z+31hE9DJpAkvCNSENn1RNMOjMzEtw4jwwFMrSADXgJmE7aU0sucxjy35rdOUqmxh58QWV6pjYBNeGgAPX+AtvxdgWuyasFSQ4f60RotTAlloJb6dRqTwmDXX/V2foSkYPA6UUuAWS38QwAjiEMCyuINXcSFoKz0Pk7RxU0jCeUTiYRl5ITtwtgAcjoRCriIzTJraU3mGwMdvI/t16yM/sipnseko9TO+P7HTty9QLqI5cF9I7is2OARBQFxxKFMGOZyUp2qDyx+KN1pRpA5Lir9fp22CTxGE6V/JNGwO8bubM0Qv4uZRBRRvvPOYBGrUtEXXtfQ4NZGt0dV1JCobw==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;
s=arcselector10001;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;
bh=bZFu5fCzCHdtJG7yh80/TJllQe344/tkH1D7Md0fM6Q=;
b=QN7qisTZkELQTm6Crioer/V07AS97tmqKSR3pJEpLjsA5uLcP4grSgkOOK6D8RDUJl+h9VTxfcElh8rN/xah/og+WF8fSlu+QXdnicgTnijKPL2oEq45kWFAwe8ccFANLu0/upETEuiU/bRT88LoOMMaebJMJ45B5DVtvaKBx6eMeKvCsq0PoHXLdpi617F13J0BPBwaZO3LjfPQpEGc+3XftKjdv7E+fE0DUAHoi3sTHz17dq3Z4tV3A5hhVJvgNxKlCHhNoj5P9TGdeU+xbSrtwjfk1CspmNu3kIKAQ8LzLaOqpqRop9AjSEko4puhg9wXKpRoAiW9wTJGXmrD/w==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is
216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;
dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;
dkim=none (message not signed); arc=none (0)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;
s=selector2;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
bh=bZFu5fCzCHdtJG7yh80/TJllQe344/tkH1D7Md0fM6Q=;
b=PAv85WiBbM/IChlnVV6VRKMHg+5eUx5lBJshLkmuTlmUMTIbdXqtp8QYDMT2/Y9RBaf6Vop5sS/+R/SSPHmDbi1YzxKQJVo/4HLA5FQNNfhu4MvJkYZlJi54FBXE4qEgLNnuTYnMWx/oJJyJRCC7JK1S3N1yIxGjx7A1Sg/JxPer73/teg80jCIbCrhOhPUlf4vhqCSEUoE6web1xPuO/28kCBV96uAf71qAPnRNupnXnXeHiD4KJRsCvwuw+JV3Lzwa8EqQtCIx52a4+iJl8E830f0rYa/nu+7gHeT9n20aB1OOaCj9GG45TGicd3ThybK5AGjE83fTE5M6JY0sYw==
Received: from SJ0PR13CA0130.namprd13.prod.outlook.com (2603:10b6:a03:2c6::15)
by CY5PR12MB6108.namprd12.prod.outlook.com (2603:10b6:930:27::15)
with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.16; Tue, 22 Oct
2024 12:07:18 +0000
Received: from SJ1PEPF000023D9.namprd21.prod.outlook.com
(2603:10b6:a03:2c6:cafe::d7) by SJ0PR13CA0130.outlook.office365.com
(2603:10b6:a03:2c6::15) with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.16 via Frontend
Transport; Tue, 22 Oct 2024 12:07:18 +0000
X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161)
smtp.mailfrom=nvidia.com;
dkim=none (message not signed)
header.d=none;dmarc=pass action=none header.from=nvidia.com;
Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates
216.228.117.161 as permitted sender) receiver=protection.outlook.com;
client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C
Received: from mail.nvidia.com (216.228.117.161) by
SJ1PEPF000023D9.mail.protection.outlook.com (10.167.244.74) with Microsoft
SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id
15.20.8114.2 via Frontend Transport; Tue, 22 Oct 2024 12:07:18 +0000
Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com
(10.129.200.67) with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 22 Oct
2024 05:07:03 -0700
Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com
(10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 22 Oct
2024 05:07:01 -0700
From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Bing Zhao
<bingz@nvidia.com>, Ori Kam <orika@nvidia.com>, Suanming Mou
<suanmingm@nvidia.com>, Matan Azrad <matan@nvidia.com>
CC: <dev@dpdk.org>
Subject: [PATCH v2 06/10] net/mlx5: shared init of control flow rules
Date: Tue, 22 Oct 2024 14:06:14 +0200
Message-ID: <20241022120618.512091-7-dsosnowski@nvidia.com>
X-Mailer: git-send-email 2.39.5
In-Reply-To: <20241022120618.512091-1-dsosnowski@nvidia.com>
References: <20241017075738.190064-1-dsosnowski@nvidia.com>
<20241022120618.512091-1-dsosnowski@nvidia.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
X-Originating-IP: [10.126.231.35]
X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To
rnnvmail201.nvidia.com (10.129.68.8)
X-EOPAttributedMessage: 0
X-MS-PublicTrafficType: Email
X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D9:EE_|CY5PR12MB6108:EE_
X-MS-Office365-Filtering-Correlation-Id: d3cacf13-0ea4-4c11-1d95-08dcf2921363
X-MS-Exchange-SenderADCheck: 1
X-MS-Exchange-AntiSpam-Relay: 0
X-Microsoft-Antispam: BCL:0;
ARA:13230040|376014|36860700013|82310400026|1800799024;
X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?njT5i3XP6lqeOwiOimfnji82WekrHtfkRsu4bnyPBDm6HTdUoM2QzT0vbbZ9?=
=?us-ascii?Q?I7U4Cz8cxJWkaxvdR7JtBamarNLM03cwHKtWVsFk1TGXSYTLOAze1i0iTKnK?=
=?us-ascii?Q?SnRUftWWvXTBB3775IPUMD1JEliGApTiVkY8bW9sAim62BpyUtYDSsY6xmZ+?=
=?us-ascii?Q?gUoKzwDuiSLdY0W7RQ0Bp5vktSHwETZ0Qg4gt/1G4rkaQzhOXDbjIFVLsZD2?=
=?us-ascii?Q?DO7O819YSu543ZlLBeUvLeMKciAG1R9vGpXx8nHpfbPqT9MIBGuVxWdkzLO9?=
=?us-ascii?Q?5oRXlePEim1plBECNeRQ7hsTOvpmJd01TSUaSWRgRiImcejKL8szI7YviaF9?=
=?us-ascii?Q?2GRRP+8NKiphH6lD++Gb1GGrXbH3YIRAw1jktirTY9H56HGAKP0Outnpq5Ar?=
=?us-ascii?Q?Kfh+JIGYGNsT1b01OPvJYKGYLSS0tgnPoLy/647YnIFRncsQ1MNDnPISp8oA?=
=?us-ascii?Q?WQ0wjFISIagvsBWS60lhZ847yGnyHgSs+HuVWTWCAjEYsp5qaTeq3EgHVkwr?=
=?us-ascii?Q?eblUFFHtwON19g22lJcGwneBFlCUKSk7q2LT4YLMIwMwdurdW8bHemnuy2td?=
=?us-ascii?Q?WdFnBQcpRcrYkK2lt2z8vUV76cUwQ+Ma0ye7flsJparbX8vT4njYjaLwKkdi?=
=?us-ascii?Q?Ni+PyrIVr22shoXyVycGrDCItThM44Vot9Cq4gxUlKTq+u/LrG3lJNo/wrXH?=
=?us-ascii?Q?jnFRgk49eN584FMmXyhY8toZG3teyRkjL6QkLL9rOQ6LbvtlMli91tEfLW/f?=
=?us-ascii?Q?BlguAKMN6eEwABJVLaFIt7l031NThTFxUlLfrbSEW4py2INCeM+PBtRDip4q?=
=?us-ascii?Q?6so2ukHds4vXru67SI26Xx2iEoa8lWSJXL2qerkpKhkxDEzX8srfzO5ARVH5?=
=?us-ascii?Q?IBGXMzirLdWZlvsz41wtaDiZSTV/2hs9KT/OJwJ+0OAYLymbai1NboV0UAvf?=
=?us-ascii?Q?4WkF3tDx6T+UU64jnbOc9ZY9qVJbufH6MBeKrx5dGncxzQAeV7fK1Hvr8TE7?=
=?us-ascii?Q?iozzHM7UGAJIyCBMDzm/jYYm1jx7kqjMwylKxhDhUACVuJIAr22EzjW5X1l6?=
=?us-ascii?Q?PVnVGE/Tnk057+Kxt9+QrGwOS30iUDgTjyGxCQGZJkTyez/UP6tAJOEHwcxm?=
=?us-ascii?Q?OUBYigNzHBTI1n6c6CHH1RWQ4b3N3BctUpEntbydTArvDiFCuQwUCRD6WqvN?=
=?us-ascii?Q?b5Q8COr+WGYMNWeB1bhIXalnTgdOiUH7ISGN+Lwrh8NL+uw7gU5JhAVYBYwg?=
=?us-ascii?Q?Ol8qGvfmejuMRpJ2AHcvP1ylLQidR4kjtQBKUWX9lGmEfqo4nI3ysU02MJR5?=
=?us-ascii?Q?kEYCk0EDpw/mwFpimWoccgreADseHBiY2I/1kZNcLyeqRKue0acALXn+EGkj?=
=?us-ascii?Q?uXgw2WrpIAODqFv067IBCPBRXwRFM0W522kYHCZMzWr3XpjAOg=3D=3D?=
X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:;
IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;
SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024); DIR:OUT;
SFP:1101;
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2024 12:07:18.2927 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: d3cacf13-0ea4-4c11-1d95-08dcf2921363
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];
Helo=[mail.nvidia.com]
X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D9.namprd21.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6108
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Control flow rules lists and control flow rule lock
can be reused between all flow engines, but their initialization
was done in flow_hw_configure() implementation.
This patch moves it to mlx5_dev_spawn(),
which is called for Verbs, DV and HWS flow engines.
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 3 +++
drivers/net/mlx5/mlx5_flow_hw.c | 3 ---
drivers/net/mlx5/windows/mlx5_os.c | 3 +++
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 0a8de88759..c8d7fdb8dd 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1701,6 +1701,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
(sh->config.dv_flow_en == 1 && mlx5_flow_discover_ipv6_tc_support(eth_dev)))
sh->phdev->config.ipv6_tc_fallback = MLX5_IPV6_TC_FALLBACK;
}
+ rte_spinlock_init(&priv->hw_ctrl_lock);
+ LIST_INIT(&priv->hw_ctrl_flows);
+ LIST_INIT(&priv->hw_ext_ctrl_flows);
if (priv->sh->config.dv_flow_en == 2) {
#ifdef HAVE_MLX5_HWS_SUPPORT
if (priv->sh->config.dv_esw_en) {
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 228dc677c0..5b34154bf1 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -11830,9 +11830,6 @@ __flow_hw_configure(struct rte_eth_dev *dev,
if (!priv->dr_ctx)
goto err;
priv->nb_queue = nb_q_updated;
- rte_spinlock_init(&priv->hw_ctrl_lock);
- LIST_INIT(&priv->hw_ctrl_flows);
- LIST_INIT(&priv->hw_ext_ctrl_flows);
ret = flow_hw_action_template_drop_init(dev, error);
if (ret)
goto err;
diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c
index 0ebd233595..80f1679388 100644
--- a/drivers/net/mlx5/windows/mlx5_os.c
+++ b/drivers/net/mlx5/windows/mlx5_os.c
@@ -600,6 +600,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
}
mlx5_flow_counter_mode_config(eth_dev);
mlx5_queue_counter_id_prepare(eth_dev);
+ rte_spinlock_init(&priv->hw_ctrl_lock);
+ LIST_INIT(&priv->hw_ctrl_flows);
+ LIST_INIT(&priv->hw_ext_ctrl_flows);
return eth_dev;
error:
if (priv) {
--
2.39.5