From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
stephen@networkplumber.org,
Danylo Vodopianov <dvo-plv@napatech.com>
Subject: [PATCH v1 30/32] net/ntnic: add igam module init
Date: Thu, 20 Feb 2025 23:03:54 +0100 [thread overview]
Message-ID: <20250220220406.3925597-31-sil-plv@napatech.com> (raw)
In-Reply-To: <20250220220406.3925597-1-sil-plv@napatech.com>
From: Danylo Vodopianov <dvo-plv@napatech.com>
Create and initialize IGAM module.
Signed-off-by: Danylo Vodopianov <dvo-plv@napatech.com>
---
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_igam.h | 37 +++++++++++
.../nt400dxx/reset/nthw_fpga_rst_nt400dxx.c | 4 ++
drivers/net/ntnic/nthw/core/nthw_igam.c | 62 +++++++++++++++++++
4 files changed, 104 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_igam.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_igam.c
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 7e326a3e1d..30a92130b5 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -56,6 +56,7 @@ sources = files(
'nthw/core/nthw_gpio_phy.c',
'nthw/core/nthw_hif.c',
'nthw/core/nthw_i2cm.c',
+ 'nthw/core/nthw_igam.c',
'nthw/core/nthw_iic.c',
'nthw/core/nthw_mac_pcs.c',
'nthw/core/nthw_pcie3.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_igam.h b/drivers/net/ntnic/nthw/core/include/nthw_igam.h
new file mode 100644
index 0000000000..e78637a331
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_igam.h
@@ -0,0 +1,37 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_IGAM_H__
+#define __NTHW_IGAM_H__
+
+#include "nthw_fpga_model.h"
+
+struct nt_igam {
+ nthw_fpga_t *mp_fpga;
+
+ nthw_module_t *mp_mod_igam;
+
+ int mn_igam_instance;
+
+ nthw_register_t *mp_reg_base;
+ nthw_field_t *mp_fld_base_ptr;
+ nthw_field_t *mp_fld_base_busy;
+ nthw_field_t *mp_fld_base_cmd;
+
+ nthw_register_t *mp_reg_data;
+ nthw_field_t *mp_fld_data_data;
+
+ /* CTRL From version 0.1 */
+ nthw_register_t *mp_reg_ctrl;
+ nthw_field_t *mp_fld_ctrl_forward_rst;
+};
+
+typedef struct nt_igam nthw_igam_t;
+typedef struct nt_igam nthw_igam;
+
+nthw_igam_t *nthw_igam_new(void);
+int nthw_igam_init(nthw_igam_t *p, nthw_fpga_t *p_fpga, int mn_igam_instance);
+
+#endif /* __NTHW_IGAM_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
index 35cbaea81e..95394b9c8f 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst_nt400dxx.c
@@ -9,6 +9,7 @@
#include "nthw_fpga.h"
#include "nthw_hif.h"
#include "ntnic_mod_reg.h"
+#include "nthw_igam.h"
static int nthw_fpga_rst_nt400dxx_init(struct fpga_info_s *p_fpga_info)
{
@@ -198,6 +199,9 @@ static int nthw_fpga_rst_nt400dxx_reset(struct fpga_info_s *p_fpga_info)
return -1;
}
+ nthw_igam_t *p_igam = nthw_igam_new();
+ nthw_igam_init(p_igam, p_fpga, 0);
+
return 0;
}
diff --git a/drivers/net/ntnic/nthw/core/nthw_igam.c b/drivers/net/ntnic/nthw/core/nthw_igam.c
new file mode 100644
index 0000000000..5dc7e36c7b
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nthw_igam.c
@@ -0,0 +1,62 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include "nt_util.h"
+#include "ntlog.h"
+
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "nthw_igam.h"
+
+nthw_igam_t *nthw_igam_new(void)
+{
+ nthw_igam_t *p = malloc(sizeof(nthw_igam_t));
+
+ if (p)
+ memset(p, 0, sizeof(nthw_igam_t));
+
+ return p;
+}
+
+int nthw_igam_init(nthw_igam_t *p, nthw_fpga_t *p_fpga, int mn_igam_instance)
+{
+ const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str;
+ nthw_module_t *mod = nthw_fpga_query_module(p_fpga, MOD_IGAM, mn_igam_instance);
+
+ if (p == NULL)
+ return mod == NULL ? -1 : 0;
+
+ if (mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: IGAM %d: no such instance", p_adapter_id_str,
+ mn_igam_instance);
+ return -1;
+ }
+
+ p->mp_fpga = p_fpga;
+ p->mn_igam_instance = mn_igam_instance;
+
+ p->mp_mod_igam = mod;
+
+ p->mp_reg_base = nthw_module_get_register(p->mp_mod_igam, IGAM_BASE);
+ p->mp_fld_base_ptr = nthw_register_get_field(p->mp_reg_base, IGAM_BASE_PTR);
+ p->mp_fld_base_busy = nthw_register_get_field(p->mp_reg_base, IGAM_BASE_BUSY);
+ p->mp_fld_base_cmd = nthw_register_get_field(p->mp_reg_base, IGAM_BASE_CMD);
+
+ p->mp_reg_data = nthw_module_get_register(p->mp_mod_igam, IGAM_DATA);
+ p->mp_fld_data_data = nthw_register_get_field(p->mp_reg_data, IGAM_DATA_DATA);
+
+ p->mp_reg_ctrl = nthw_module_query_register(p->mp_mod_igam, IGAM_CTRL);
+
+ if (p->mp_reg_ctrl) {
+ p->mp_fld_ctrl_forward_rst =
+ nthw_register_get_field(p->mp_reg_ctrl, IGAM_CTRL_FORWARD_RST);
+
+ } else {
+ p->mp_fld_ctrl_forward_rst = NULL;
+ }
+
+ return 0;
+}
--
2.45.0
next prev parent reply other threads:[~2025-02-20 22:07 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 22:03 [PATCH v1 00/32] add new adapter NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 01/32] net/ntnic: add link agx 100g Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 02/32] net/ntnic: add link state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 03/32] net/ntnic: add rpf and gfg init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 04/32] net/ntnic: add agx setup for port Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 05/32] net/ntnic: add host loopback init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 06/32] net/ntnic: add line " Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 07/32] net/ntnic: add 100 gbps port init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 08/32] net/ntnic: add port post init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 09/32] net/ntnic: add nim low power API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 10/32] net/ntnic: add link handling API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 11/32] net/ntnic: add port init to the state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 12/32] net/ntnic: add port disable API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 13/32] net/ntnic: add minimal initialization new NIC NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 14/32] net/ntnic: add minimal reset FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 15/32] net/ntnic: add FPGA modules and registers Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 16/32] net/ntnic: add setup for fpga reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 17/32] net/ntnic: add default reset setting for NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 18/32] net/ntnic: add DDR calibration to reset stage Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 19/32] net/ntnic: add PHY ftile reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 20/32] net/ntnic: add clock init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 21/32] net/ntnic: add nt400d13 pcm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 22/32] net/ntnic: add HIF clock test Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 23/32] net/ntnic: add nt400d13 PRM module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 24/32] net/ntnic: add nt400d13 PRM module reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 25/32] net/ntnic: add SPI v3 support for FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 26/32] net/ntnic: add i2cm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 27/32] net/ntnic: add pca init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 28/32] net/ntnic: add pcal init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 29/32] net/ntnic: add reset PHY init Serhii Iliushyk
2025-02-20 22:03 ` Serhii Iliushyk [this message]
2025-02-20 22:03 ` [PATCH v1 31/32] net/ntnic: init IGAM and config PLL for FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 32/32] net/ntnic: revert untrusted loop bound Serhii Iliushyk
2025-02-20 22:31 ` Stephen Hemminger
2025-02-20 23:49 ` [PATCH v1 00/32] add new adapter NT400D13 Stephen Hemminger
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