From: Maayan Kashani <mkashani@nvidia.com>
To: <dev@dpdk.org>
Cc: <mkashani@nvidia.com>, <dsosnowski@nvidia.com>,
<rasland@nvidia.com>, <stable@dpdk.org>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>,
Michael Baum <michaelba@nvidia.com>
Subject: [PATCH 1/2] doc: fix MPLS limitations under HWS
Date: Wed, 26 Feb 2025 10:02:56 +0200 [thread overview]
Message-ID: <20250226080258.30127-1-mkashani@nvidia.com> (raw)
Update missing limitations.
Fixes: 1e2a51f545b6 ("net/mlx5: support MPLS tunnel with HWS")
Cc: stable@dpdk.org
Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
doc/guides/nics/mlx5.rst | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 690b46a9743..316c3397d2e 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -279,6 +279,14 @@ Limitations
which results in L3 encap.
d. Only in transfer (switchdev) mode.
+ - MPLS:
+
+ - RTE_FLOW_ITEM_TYPE_MPLS matching is not supported for mlxcfg ``FLEX_PARSER_PROFILE_ENABLE`` = 1.
+ - RTE_FLOW_ITEM_TYPE_MPLS matching is not supported on group 0.
+ - Testpmd commands "set mplsoudp_encap" and "set mplsoudp_decap" support only one MPLS.
+ - For non relaxed pattern template, MPLSoUDP match is assumed when trying to match MPLS w/o former
+ protocol match.
+
- When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
specific VLAN will match for VLAN packets as well:
--
2.21.0
next reply other threads:[~2025-02-26 8:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 8:02 Maayan Kashani [this message]
2025-02-26 8:02 ` [PATCH 2/2] net/mlx5: add MPLSoGRE matching in HWS Maayan Kashani
2025-02-26 11:03 ` [PATCH 1/2] doc: fix MPLS limitations under HWS Raslan Darawsheh
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