From: Maayan Kashani <mkashani@nvidia.com>
To: <dev@dpdk.org>
Cc: <mkashani@nvidia.com>, <dsosnowski@nvidia.com>,
<rasland@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>
Subject: [PATCH 2/2] net/mlx5: add MPLSoGRE matching in HWS
Date: Wed, 26 Feb 2025 10:02:57 +0200 [thread overview]
Message-ID: <20250226080258.30127-2-mkashani@nvidia.com> (raw)
In-Reply-To: <20250226080258.30127-1-mkashani@nvidia.com>
Remove limitations in validation and MPLS match translation.
For non relaxed mode, assume MPLSoUDP if no protocol is mentioned.
Set UDP dest port to MPLS type only for UDP protocol.
Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
doc/guides/nics/mlx5.rst | 2 --
drivers/net/mlx5/hws/mlx5dr_definer.c | 28 +++++++++++++--------------
drivers/net/mlx5/mlx5_flow.c | 7 -------
3 files changed, 13 insertions(+), 24 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 316c3397d2e..204572c885e 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -356,8 +356,6 @@ Limitations
- L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
-- MPLSoGRE is not supported in HW steering (``dv_flow_en`` = 2).
-
- MPLSoUDP with multiple MPLS headers is only supported in HW steering (``dv_flow_en`` = 2).
- Match on Geneve header supports the following fields only:
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 837e0c47bda..ba4053c552f 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1644,14 +1644,9 @@ mlx5dr_definer_conv_item_mpls(struct mlx5dr_definer_conv_data *cd,
{
const struct rte_flow_item_mpls *m = item->mask;
struct mlx5dr_definer_fc *fc;
- bool inner = cd->tunnel;
-
- if (inner) {
- DR_LOG(ERR, "Inner MPLS item not supported");
- rte_errno = ENOTSUP;
- return rte_errno;
- }
+ bool is_udp;
+ /* If no protocol is set - assume MPLSoUDP */
if (!cd->relaxed) {
/* In order to match on MPLS we must match on ip_protocol and l4_dport. */
fc = &cd->fc[DR_CALC_FNAME(IP_PROTOCOL, false)];
@@ -1661,14 +1656,17 @@ mlx5dr_definer_conv_item_mpls(struct mlx5dr_definer_conv_data *cd,
fc->tag_set = &mlx5dr_definer_udp_protocol_set;
DR_CALC_SET(fc, eth_l2, l4_type_bwc, false);
}
-
- /* Currently support only MPLSoUDP */
- fc = &cd->fc[DR_CALC_FNAME(L4_DPORT, false)];
- if (!fc->tag_set) {
- fc->item_idx = item_idx;
- fc->tag_mask_set = &mlx5dr_definer_ones_set;
- fc->tag_set = &mlx5dr_definer_mpls_udp_port_set;
- DR_CALC_SET(fc, eth_l4, destination_port, false);
+ is_udp = (fc->tag_set == &mlx5dr_definer_udp_protocol_set);
+
+ if (is_udp) {
+ /* Set UDP dest port to MPLS. */
+ fc = &cd->fc[DR_CALC_FNAME(L4_DPORT, false)];
+ if (!fc->tag_set) {
+ fc->item_idx = item_idx;
+ fc->tag_mask_set = &mlx5dr_definer_ones_set;
+ fc->tag_set = &mlx5dr_definer_mpls_udp_port_set;
+ DR_CALC_SET(fc, eth_l4, destination_port, false);
+ }
}
}
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 3fbe89a9d42..69d7621d0bf 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -3812,13 +3812,6 @@ mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
return rte_flow_error_set(error, ENOTSUP,
RTE_FLOW_ERROR_TYPE_ITEM, item,
"multiple tunnel layers not supported");
- } else {
- /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
- if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
- !(item_flags & MLX5_FLOW_LAYER_MPLS))
- return rte_flow_error_set(error, ENOTSUP,
- RTE_FLOW_ERROR_TYPE_ITEM, item,
- "multiple tunnel layers not supported");
}
if (!mask)
mask = nic_mask;
--
2.21.0
next prev parent reply other threads:[~2025-02-26 8:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 8:02 [PATCH 1/2] doc: fix MPLS limitations under HWS Maayan Kashani
2025-02-26 8:02 ` Maayan Kashani [this message]
2025-02-26 11:03 ` Raslan Darawsheh
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