From: Nawal Kishor <nkishor@marvell.com>
To: <dev@dpdk.org>, Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>,
"Kiran Kumar K" <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>
Cc: <jerinj@marvell.com>, <asekhar@marvell.com>,
Nawal Kishor <nkishor@marvell.com>
Subject: [PATCH] common/cnxk: add flag for enabling opaque mode
Date: Tue, 4 Mar 2025 10:55:25 +0530 [thread overview]
Message-ID: <20250304052525.796933-1-nkishor@marvell.com> (raw)
Added flag that overrides the default natural alignment mode and uses
opaque mode.
Signed-off-by: Nawal Kishor <nkishor@marvell.com>
---
drivers/common/cnxk/roc_npa.c | 3 +++
drivers/common/cnxk/roc_npa.h | 3 ++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index a33f9a8499..d5ebfbfc11 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -669,6 +669,9 @@ roc_npa_pool_create(uint64_t *aura_handle, uint32_t block_size,
pool = &defpool;
}
+ if (flags & ROC_NPA_FORCE_OPAQUE_MODE_F)
+ pool->nat_align = 0;
+
rc = npa_aura_pool_pair_alloc(lf, block_size, block_count, aura, pool,
aura_handle, flags);
if (rc) {
diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index 8525038810..853c0fed43 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -767,7 +767,8 @@ int __roc_api roc_npa_dev_init(struct roc_npa *roc_npa);
int __roc_api roc_npa_dev_fini(struct roc_npa *roc_npa);
/* Flags to pool create */
-#define ROC_NPA_ZERO_AURA_F BIT(0)
+#define ROC_NPA_ZERO_AURA_F BIT(0)
+#define ROC_NPA_FORCE_OPAQUE_MODE_F BIT(1)
/* Enumerations */
enum roc_npa_buf_type {
--
2.34.1
reply other threads:[~2025-03-04 5:25 UTC|newest]
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