From: <psatheesh@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>
Cc: <dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>,
Jerin Jacob <jerinj@marvell.com>
Subject: [dpdk-dev] [PATCH 1/2] common/cnxk: support fragmented flags in KPU profile
Date: Fri, 21 Mar 2025 15:18:19 +0530 [thread overview]
Message-ID: <20250321094820.3311252-1-psatheesh@marvell.com> (raw)
From: Satheesh Paul <psatheesh@marvell.com>
In the CN20K device, only 4 bits are available for flags.
Adjust the fragmented flags to fit into the lower 4 bits.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/hw/npc.h | 12 ++++++++++++
drivers/common/cnxk/roc_npc_parse.c | 12 ++++++++++--
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/common/cnxk/hw/npc.h b/drivers/common/cnxk/hw/npc.h
index 4164c6ac2e..52b41a1a54 100644
--- a/drivers/common/cnxk/hw/npc.h
+++ b/drivers/common/cnxk/hw/npc.h
@@ -314,6 +314,18 @@ enum npc_kpu_lb_lflag {
NPC_F_LB_L_FDSA,
};
+enum npc_cn20k_kpu_lc_uflag {
+ NPC_CN20K_F_LC_U_MPLS_IN_IP = 0x20,
+ NPC_CN20K_F_LC_U_IP6_TUN_IP6 = 0x40,
+ NPC_CN20K_F_LC_U_IP6_MPLS_IN_IP = 0x80,
+};
+
+enum npc_cn20k_kpu_lc_lflag {
+ NPC_CN20K_F_LC_L_IP_FRAG = 2,
+ NPC_CN20K_F_LC_L_IP6_FRAG,
+ NPC_CN20K_F_LC_L_6TO4,
+};
+
enum npc_kpu_lc_uflag {
NPC_F_LC_U_UNK_PROTO = 0x10,
NPC_F_LC_U_IP_FRAG = 0x20,
diff --git a/drivers/common/cnxk/roc_npc_parse.c b/drivers/common/cnxk/roc_npc_parse.c
index 0aaf86c768..b52024f434 100644
--- a/drivers/common/cnxk/roc_npc_parse.c
+++ b/drivers/common/cnxk/roc_npc_parse.c
@@ -1,7 +1,9 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(C) 2021 Marvell.
*/
+
#include "roc_api.h"
+#include "roc_model.h"
#include "roc_priv.h"
const struct roc_npc_item_info *
@@ -708,7 +710,10 @@ npc_handle_ipv6ext_attr(const struct roc_npc_flow_item_ipv6 *ipv6_spec,
flags_count++;
}
if (ipv6_spec->has_frag_ext) {
- *flags = NPC_F_LC_U_IP6_FRAG;
+ if (roc_model_is_cn20k())
+ *flags = NPC_CN20K_F_LC_L_IP6_FRAG;
+ else
+ *flags = NPC_F_LC_U_IP6_FRAG;
flags_count++;
}
if (ipv6_spec->has_dest_ext) {
@@ -822,7 +827,10 @@ npc_process_ipv6_item(struct npc_parse_state *pst)
} else if (pattern->type == ROC_NPC_ITEM_TYPE_IPV6_FRAG_EXT) {
item_count++;
ltype = NPC_LT_LC_IP6_EXT;
- flags = NPC_F_LC_U_IP6_FRAG;
+ if (roc_model_is_cn20k())
+ flags = NPC_CN20K_F_LC_L_IP6_FRAG;
+ else
+ flags = NPC_F_LC_U_IP6_FRAG;
parse_info.len =
sizeof(struct roc_ipv6_hdr) + sizeof(struct roc_ipv6_fragment_ext);
if (pattern->spec)
--
2.42.0
next reply other threads:[~2025-03-21 9:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-21 9:48 psatheesh [this message]
2025-03-21 9:48 ` [dpdk-dev] [PATCH 2/2] common/cnxk: defragment MCAM bank during allocation psatheesh
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