* [PATCH 1/1] examples/ipsec-secgw: resolve segfault for IPv6 packets
@ 2025-03-27 7:03 Rakesh Kudurumalla
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From: Rakesh Kudurumalla @ 2025-03-27 7:03 UTC (permalink / raw)
To: Wathsala Vithanage, Radu Nicolau, Akhil Goyal, Rahul Bhansali
Cc: dev, jerinj, ndabilpuram, Rakesh Kudurumalla
While running ipsec-secgw application if IPV6 rules are not
configured in ipsec configuration lpm look up fails and
destination port is updated as BAD_PORT.During process_packet
ethernet_hdr is updated resulting in crash due out of bound.
This patch fixes the same.
Fixes: 6eb3ba03995c ("examples/ipsec-secgw: support poll mode NEON LPM lookup")
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
examples/ipsec-secgw/ipsec_neon.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec_neon.h b/examples/ipsec-secgw/ipsec_neon.h
index 8b93b4b52e..fc04000336 100644
--- a/examples/ipsec-secgw/ipsec_neon.h
+++ b/examples/ipsec-secgw/ipsec_neon.h
@@ -23,6 +23,7 @@ processx4_step3(struct rte_mbuf *pkts[FWDSTEP], uint16_t dst_port[FWDSTEP],
uint32x4_t ve[FWDSTEP];
uint32_t *p[FWDSTEP];
struct rte_mbuf *pkt;
+ uint16_t port;
uint32_t val;
uint8_t i;
@@ -34,7 +35,8 @@ processx4_step3(struct rte_mbuf *pkts[FWDSTEP], uint16_t dst_port[FWDSTEP],
*l_pkt |= 1;
p[i] = rte_pktmbuf_mtod(pkt, uint32_t *);
- ve[i] = vreinterpretq_u32_s32(val_eth[dst_port[i]]);
+ port = (dst_port[i] == BAD_PORT) ? 0 : dst_port[i];
+ ve[i] = vreinterpretq_u32_s32(val_eth[port]);
te[i] = vld1q_u32(p[i]);
/* Update last 4 bytes */
@@ -76,6 +78,7 @@ process_packet(struct rte_mbuf *pkt, uint16_t *dst_port, uint64_t tx_offloads,
{
struct rte_ether_hdr *eth_hdr;
uint32x4_t te, ve;
+ uint16_t port;
uint32_t val;
/* Check if it is a large packet */
@@ -85,7 +88,8 @@ process_packet(struct rte_mbuf *pkt, uint16_t *dst_port, uint64_t tx_offloads,
eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
te = vld1q_u32((uint32_t *)eth_hdr);
- ve = vreinterpretq_u32_s32(val_eth[dst_port[0]]);
+ port = (dst_port[0] == BAD_PORT) ? 0 : dst_port[0];
+ ve = vreinterpretq_u32_s32(val_eth[port]);
val = vgetq_lane_u32(te, 3);
#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
--
2.25.1
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