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Tue, 3 Jun 2025 08:13:34 -0700 Date: Tue, 3 Jun 2025 17:13:14 +0200 From: Dariusz Sosnowski To: Andre Muezerie CC: Viacheslav Ovsiienko , Bing Zhao , Ori Kam , Suanming Mou , Matan Azrad , Subject: Re: [PATCH] common/mlx5: use intrinsics instead of inline assembly Message-ID: <20250603151253.jjctszshwamnepdy@ds-vm-debian.local> References: <1746457062-8502-1-git-send-email-andremue@linux.microsoft.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1746457062-8502-1-git-send-email-andremue@linux.microsoft.com> X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00004682:EE_|DM4PR12MB6493:EE_ X-MS-Office365-Filtering-Correlation-Id: cd1f4209-005f-4515-e07e-08dda2b142fd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|36860700013|1800799024|376014|7053199007; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jun 2025 15:13:57.1234 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cd1f4209-005f-4515-e07e-08dda2b142fd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004682.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6493 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi, On Mon, May 05, 2025 at 07:57:42AM -0700, Andre Muezerie wrote: > When compiling with MSVC the errors below are hit because msvc does not > support inline assembly: > > 1) > ../drivers/common/mlx5/mlx5_common.c(86): warning C4013: '__asm__' > undefined; assuming extern returning int > ../drivers/common/mlx5/mlx5_common.c(87): error C2143: syntax error: > missing ')' before ':' > > 2) > ../drivers/net/mlx5/mlx5_txpp.c(510): error C2065: '__asm__': > undeclared identifier > ../drivers/net/mlx5/mlx5_txpp.c(510): error C2143: syntax error: > missing ';' before 'volatile' > > The fix for (1) is to use compiler intrinsic __cpuid and for (2) > intrinsic _InterlockedCompareExchange128 can be used. > > Signed-off-by: Andre Muezerie *snip* > diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c > index e6d3ad83e9..5bbaf668e6 100644 > --- a/drivers/net/mlx5/mlx5_txpp.c > +++ b/drivers/net/mlx5/mlx5_txpp.c > @@ -486,6 +486,20 @@ mlx5_txpp_cq_arm(struct mlx5_dev_ctx_shared *sh) > } > > #if defined(RTE_ARCH_X86_64) > +#ifdef RTE_TOOLCHAIN_MSVC > +static inline int > +mlx5_atomic128_compare_exchange(rte_int128_t *dst, > + rte_int128_t *exp, > + const rte_int128_t *src) > +{ > + return (int)_InterlockedCompareExchange128( > + (int64_t volatile *)dst, > + src->val[1], /* exchange high */ > + src->val[0], /* exchange low */ > + (int64_t *)exp /* comparand result */ > + ); There is one checkpatch warning to fix here: CHECK:OPEN_ENDED_LINE: Lines should not end with a '(' #117: FILE: drivers/net/mlx5/mlx5_txpp.c:495: + return (int)_InterlockedCompareExchange128( Also, I don't think that comments for arguments are needed here. Could you please organize the code as follows: return (int)_InterlockedCompareExchange128((int64_t volatile *)dst, src->val[1], src->val[0], (int64_t *)exp); > +} > +#else > static inline int > mlx5_atomic128_compare_exchange(rte_int128_t *dst, > rte_int128_t *exp, > @@ -510,6 +524,7 @@ mlx5_atomic128_compare_exchange(rte_int128_t *dst, > return res; > } > #endif > +#endif > > static inline void > mlx5_atomic_read_cqe(rte_int128_t *from, rte_int128_t *ts) Best regards, Dariusz Sosnowski