* [PATCH 1/8] net/r8169: add support for RTL8168 series
@ 2025-06-10 6:01 Howard Wang
2025-06-10 6:01 ` [PATCH 2/8] net/r8169: update HW configurations for 8125 and 8126 Howard Wang
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
This patch adds support for RTL8168EP, RTL8168FP, RTL8168G, RTL8168H
and RTL8168M.
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
doc/guides/nics/r8169.rst | 4 +
drivers/net/r8169/base/rtl8125a_mcu.c | 7 +-
drivers/net/r8169/base/rtl8126a.c | 4 +-
drivers/net/r8169/base/rtl8168ep.c | 221 +++
drivers/net/r8169/base/rtl8168ep.h | 15 +
drivers/net/r8169/base/rtl8168ep_mcu.c | 177 +++
drivers/net/r8169/base/rtl8168fp.c | 195 +++
drivers/net/r8169/base/rtl8168fp.h | 14 +
drivers/net/r8169/base/rtl8168fp_mcu.c | 270 ++++
drivers/net/r8169/base/rtl8168g.c | 297 ++++
drivers/net/r8169/base/rtl8168g.h | 15 +
drivers/net/r8169/base/rtl8168g_mcu.c | 1936 ++++++++++++++++++++++++
drivers/net/r8169/base/rtl8168h.c | 447 ++++++
drivers/net/r8169/base/rtl8168h.h | 21 +
drivers/net/r8169/base/rtl8168h_mcu.c | 1186 +++++++++++++++
drivers/net/r8169/base/rtl8168m.c | 19 +
drivers/net/r8169/meson.build | 9 +
drivers/net/r8169/r8169_compat.h | 25 +-
drivers/net/r8169/r8169_dash.c | 439 +++++-
drivers/net/r8169/r8169_dash.h | 8 +-
drivers/net/r8169/r8169_ethdev.c | 179 ++-
drivers/net/r8169/r8169_ethdev.h | 32 +-
drivers/net/r8169/r8169_hw.c | 1713 +++++++++++++++++++--
drivers/net/r8169/r8169_hw.h | 56 +-
drivers/net/r8169/r8169_phy.c | 1024 +++++++++++--
drivers/net/r8169/r8169_phy.h | 11 +
drivers/net/r8169/r8169_rxtx.c | 317 +++-
27 files changed, 8261 insertions(+), 380 deletions(-)
create mode 100644 drivers/net/r8169/base/rtl8168ep.c
create mode 100644 drivers/net/r8169/base/rtl8168ep.h
create mode 100644 drivers/net/r8169/base/rtl8168ep_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8168fp.c
create mode 100644 drivers/net/r8169/base/rtl8168fp.h
create mode 100644 drivers/net/r8169/base/rtl8168fp_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8168g.c
create mode 100644 drivers/net/r8169/base/rtl8168g.h
create mode 100644 drivers/net/r8169/base/rtl8168g_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8168h.c
create mode 100644 drivers/net/r8169/base/rtl8168h.h
create mode 100644 drivers/net/r8169/base/rtl8168h_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8168m.c
diff --git a/doc/guides/nics/r8169.rst b/doc/guides/nics/r8169.rst
index bffdfc91cf..f3c547c4d4 100644
--- a/doc/guides/nics/r8169.rst
+++ b/doc/guides/nics/r8169.rst
@@ -7,8 +7,12 @@ R8169 Poll Mode Driver
The R8169 PMD provides poll mode driver support for Realtek 1, 2.5 and 5 Gigabit
Ethernet NICs.
+More information about Realtek 1G Ethernet NIC can be found at `RTL8168
+<https://www.realtek.com/Product/Index?id=4080>`_.
+
More information about Realtek 2.5G Ethernet NIC can be found at `RTL8125
<https://www.realtek.com/Product/Index?id=3962&cate_id=786&menu_id=1010>`_.
+
More information about Realtek 5G Ethernet NIC can be found at `RTL8126
<https://www.realtek.com/Product/ProductHitsDetail?id=4425&menu_id=643>`_.
diff --git a/drivers/net/r8169/base/rtl8125a_mcu.c b/drivers/net/r8169/base/rtl8125a_mcu.c
index 5a69b3e094..e2d56102fb 100644
--- a/drivers/net/r8169/base/rtl8125a_mcu.c
+++ b/drivers/net/r8169/base/rtl8125a_mcu.c
@@ -162,7 +162,12 @@ static void
rtl_release_phy_mcu_patch_key_lock(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_53:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x0000);
rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x0000);
rtl_clear_eth_phy_ocp_bit(hw, 0xB82E, BIT_0);
diff --git a/drivers/net/r8169/base/rtl8126a.c b/drivers/net/r8169/base/rtl8126a.c
index 69fe7bc030..84354b6d32 100644
--- a/drivers/net/r8169/base/rtl8126a.c
+++ b/drivers/net/r8169/base/rtl8126a.c
@@ -29,7 +29,9 @@ static void
hw_ephy_config_8126a(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
/* nothing to do */
break;
}
diff --git a/drivers/net/r8169/base/rtl8168ep.c b/drivers/net/r8169/base/rtl8168ep.c
new file mode 100644
index 0000000000..5f955d2b0d
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168ep.c
@@ -0,0 +1,221 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168ep.h"
+
+/* For RTL8168EP, CFG_METHOD_23,27,28 */
+
+static void
+hw_init_rxcfg_8168ep(struct rtl_hw *hw)
+{
+ RTL_W32(hw, RxConfig, Rx_Single_fetch_V2 |
+ (RX_DMA_BURST_unlimited << RxCfgDMAShift) | RxEarly_off_V2);
+}
+
+static void
+hw_ephy_config_8168ep(struct rtl_hw *hw)
+{
+ u16 ephy_data;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ rtl_ephy_write(hw, 0x00, 0x10AB);
+ rtl_ephy_write(hw, 0x06, 0xf030);
+ rtl_ephy_write(hw, 0x08, 0x2006);
+ rtl_ephy_write(hw, 0x0D, 0x1666);
+
+ ephy_data = rtl_ephy_read(hw, 0x0C);
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 |
+ BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+ rtl_ephy_write(hw, 0x0C, ephy_data);
+ break;
+ case CFG_METHOD_27:
+ rtl_ephy_write(hw, 0x00, 0x10A3);
+ rtl_ephy_write(hw, 0x19, 0xFC00);
+ rtl_ephy_write(hw, 0x1E, 0x20EA);
+ break;
+ case CFG_METHOD_28:
+ rtl_ephy_write(hw, 0x00, 0x10AB);
+ rtl_ephy_write(hw, 0x19, 0xFC00);
+ rtl_ephy_write(hw, 0x1E, 0x20EB);
+ rtl_ephy_write(hw, 0x0D, 0x1666);
+ rtl_clear_pcie_phy_bit(hw, 0x0B, BIT_0);
+ rtl_set_pcie_phy_bit(hw, 0x1D, BIT_14);
+ rtl_clear_and_set_pcie_phy_bit(hw, 0x0C, (BIT_13 | BIT_12 | BIT_11 |
+ BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5),
+ BIT_9 | BIT_4);
+ break;
+ default:
+ break;
+ }
+}
+
+static void
+hw_phy_config_8168ep(struct rtl_hw *hw)
+{
+ if (hw->mcfg == CFG_METHOD_23) {
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) |
+ (BIT_3 | BIT_2));
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~BIT_8);
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_7);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_6);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8084);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) &
+ ~(BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_12);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_1);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_0);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A4B);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_2);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8012);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) | BIT_15);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0C42);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x11, BIT_13, BIT_14);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ } else if (hw->mcfg == CFG_METHOD_27 || hw->mcfg == CFG_METHOD_28) {
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~BIT_8);
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_7);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_6);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8084);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~(BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_12);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_1);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_0);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8012);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) | BIT_15);
+
+ rtl_mdio_write(hw, 0x1F, 0x0C42);
+ rtl_mdio_write(hw, 0x11, (rtl_mdio_read(hw, 0x11) & ~BIT_13) | BIT_14);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x80F3);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8B00);
+ rtl_mdio_write(hw, 0x13, 0x80F0);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x3A00);
+ rtl_mdio_write(hw, 0x13, 0x80EF);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0500);
+ rtl_mdio_write(hw, 0x13, 0x80F6);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6E00);
+ rtl_mdio_write(hw, 0x13, 0x80EC);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6800);
+ rtl_mdio_write(hw, 0x13, 0x80ED);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x7C00);
+ rtl_mdio_write(hw, 0x13, 0x80F2);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xF400);
+ rtl_mdio_write(hw, 0x13, 0x80F4);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8500);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8110);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xA800);
+ rtl_mdio_write(hw, 0x13, 0x810F);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x1D00);
+ rtl_mdio_write(hw, 0x13, 0x8111);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xF500);
+ rtl_mdio_write(hw, 0x13, 0x8113);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6100);
+ rtl_mdio_write(hw, 0x13, 0x8115);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x9200);
+ rtl_mdio_write(hw, 0x13, 0x810E);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0400);
+ rtl_mdio_write(hw, 0x13, 0x810C);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x7C00);
+ rtl_mdio_write(hw, 0x13, 0x810B);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x5A00);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x80D1);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xFF00);
+ rtl_mdio_write(hw, 0x13, 0x80CD);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x9E00);
+ rtl_mdio_write(hw, 0x13, 0x80D3);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0E00);
+ rtl_mdio_write(hw, 0x13, 0x80D5);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xCA00);
+ rtl_mdio_write(hw, 0x13, 0x80D7);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8400);
+ }
+}
+
+static void
+hw_config_8168ep(struct rtl_hw *hw)
+{
+ u16 mac_ocp_data;
+ u32 csi_tmp;
+
+ rtl_eri_write(hw, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+ /* Adjust the trx fifo */
+ rtl_eri_write(hw, 0xCA, 2, 0x0370, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xEA, 1, 0x10, ERIAR_ExGMAC);
+
+ /* Disable share fifo */
+ RTL_W32(hw, TxConfig, RTL_R32(hw, TxConfig) & ~BIT_7);
+
+ csi_tmp = rtl_eri_read(hw, 0xDC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+ csi_tmp |= BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~Beacon_en);
+
+ /* EEE led enable */
+ RTL_W8(hw, 0x1B, RTL_R8(hw, 0x1B) & ~0x07);
+
+ if (hw->mcfg == CFG_METHOD_27 || hw->mcfg == CFG_METHOD_28) {
+ rtl_oob_mutex_lock(hw);
+ rtl_eri_write(hw, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+ rtl_oob_mutex_unlock(hw);
+ }
+
+ rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
+ rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
+
+ if (hw->mcfg == CFG_METHOD_28) {
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xD3E2);
+ mac_ocp_data &= 0xF000;
+ mac_ocp_data |= 0xAFD;
+ rtl_mac_ocp_write(hw, 0xD3E2, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xD3E4);
+ mac_ocp_data &= 0xFF00;
+ rtl_mac_ocp_write(hw, 0xD3E4, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE860);
+ mac_ocp_data |= BIT_7;
+ rtl_mac_ocp_write(hw, 0xE860, mac_ocp_data);
+ }
+}
+
+const struct rtl_hw_ops rtl8168ep_ops = {
+ .hw_config = hw_config_8168ep,
+ .hw_init_rxcfg = hw_init_rxcfg_8168ep,
+ .hw_ephy_config = hw_ephy_config_8168ep,
+ .hw_phy_config = hw_phy_config_8168ep,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8168ep,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8168ep,
+};
diff --git a/drivers/net/r8169/base/rtl8168ep.h b/drivers/net/r8169/base/rtl8168ep.h
new file mode 100644
index 0000000000..a03c94dc9f
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168ep.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _RTL8168EP_H_
+#define _RTL8168EP_H_
+
+#include "../r8169_compat.h"
+
+extern const struct rtl_hw_ops rtl8168ep_ops;
+
+void hw_mac_mcu_config_8168ep(struct rtl_hw *hw);
+void hw_phy_mcu_config_8168ep(struct rtl_hw *hw);
+
+#endif
diff --git a/drivers/net/r8169/base/rtl8168ep_mcu.c b/drivers/net/r8169/base/rtl8168ep_mcu.c
new file mode 100644
index 0000000000..49375390ab
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168ep_mcu.c
@@ -0,0 +1,177 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_dash.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168ep.h"
+
+/* For RTL8168EP, CFG_METHOD_23,27,28 */
+
+/* -------------------------------------MAC 8168EP------------------------------------ */
+
+static void
+rtl8168_set_mac_mcu_8168ep_1(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168ep_1[] = {
+ 0xE008, 0xE0D3, 0xE0D6, 0xE0D9, 0xE0DB, 0xE0DD, 0xE0DF, 0xE0E1, 0xC251,
+ 0x7340, 0x49B1, 0xF010, 0x1D02, 0x8D40, 0xC202, 0xBA00, 0x2C3A, 0xC0F0,
+ 0xE8DE, 0x2000, 0x8000, 0xC0B6, 0x268C, 0x752C, 0x49D4, 0xF112, 0xE025,
+ 0xC2F6, 0x7146, 0xC2F5, 0x7340, 0x49BE, 0xF103, 0xC7F2, 0xE002, 0xC7F1,
+ 0x304F, 0x6226, 0x49A1, 0xF1F0, 0x7222, 0x49A0, 0xF1ED, 0x2525, 0x1F28,
+ 0x3097, 0x3091, 0x9A36, 0x752C, 0x21DC, 0x25BC, 0xC6E2, 0x77C0, 0x1304,
+ 0xF014, 0x1303, 0xF014, 0x1302, 0xF014, 0x1301, 0xF014, 0x49D4, 0xF103,
+ 0xC3D7, 0xBB00, 0xC618, 0x67C6, 0x752E, 0x22D7, 0x26DD, 0x1505, 0xF013,
+ 0xC60A, 0xBE00, 0xC309, 0xBB00, 0xC308, 0xBB00, 0xC307, 0xBB00, 0xC306,
+ 0xBB00, 0x25C8, 0x25A6, 0x25AC, 0x25B2, 0x25B8, 0xCD08, 0x0000, 0xC0BC,
+ 0xC2FF, 0x7340, 0x49B0, 0xF04E, 0x1F46, 0x308F, 0xC3F7, 0x1C04, 0xE84D,
+ 0x1401, 0xF147, 0x7226, 0x49A7, 0xF044, 0x7222, 0x2525, 0x1F30, 0x3097,
+ 0x3091, 0x7340, 0xC4EA, 0x401C, 0xF006, 0xC6E8, 0x75C0, 0x49D7, 0xF105,
+ 0xE036, 0x1D08, 0x8DC1, 0x0208, 0x6640, 0x2764, 0x1606, 0xF12F, 0x6346,
+ 0x133B, 0xF12C, 0x9B34, 0x1B18, 0x3093, 0xC32A, 0x1C10, 0xE82A, 0x1401,
+ 0xF124, 0x1A36, 0x308A, 0x7322, 0x25B5, 0x0B0E, 0x1C00, 0xE82C, 0xC71F,
+ 0x4027, 0xF11A, 0xE838, 0x1F42, 0x308F, 0x1B08, 0xE824, 0x7236, 0x7746,
+ 0x1700, 0xF00D, 0xC313, 0x401F, 0xF103, 0x1F00, 0x9F46, 0x7744, 0x449F,
+ 0x445F, 0xE817, 0xC70A, 0x4027, 0xF105, 0xC302, 0xBB00, 0x2E08, 0x2DC2,
+ 0xC7FF, 0xBF00, 0xCDB8, 0xFFFF, 0x0C02, 0xA554, 0xA5DC, 0x402F, 0xF105,
+ 0x1400, 0xF1FA, 0x1C01, 0xE002, 0x1C00, 0xFF80, 0x49B0, 0xF004, 0x0B01,
+ 0xA1D3, 0xE003, 0x0B02, 0xA5D3, 0x3127, 0x3720, 0x0B02, 0xA5D3, 0x3127,
+ 0x3720, 0x1300, 0xF1FB, 0xFF80, 0x7322, 0x25B5, 0x1E28, 0x30DE, 0x30D9,
+ 0x7264, 0x1E11, 0x2368, 0x3116, 0xFF80, 0x1B7E, 0xC602, 0xBE00, 0x06A6,
+ 0x1B7E, 0xC602, 0xBE00, 0x0764, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_1); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168ep_1[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x2549);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x06A5);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0763);
+}
+
+static void
+rtl8168_set_mac_mcu_8168ep_2(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168ep_2[] = {
+ 0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
+ 0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
+ 0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
+ 0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
+ 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF117, 0xC123, 0xC223,
+ 0xC323, 0xE808, 0xC322, 0xE806, 0xC321, 0xE804, 0xC320, 0xE802, 0xE00C,
+ 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
+ 0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
+ 0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
+ 0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_2); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168ep_2[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0BB3);
+ if (!rtl8168_check_dash_other_fun_present(hw))
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x1FC7);
+}
+
+/* ------------------------------------PHY 8168FP------------------------------------- */
+
+static void
+rtl8168_set_phy_mcu_8168ep_2(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x8700);
+ rtl_mdio_write(hw, 0x13, 0xB82E);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+
+ rtl_mdio_write(hw, 0x13, 0x83DD);
+ rtl_mdio_write(hw, 0x14, 0xAF83);
+ rtl_mdio_write(hw, 0x14, 0xE9AF);
+ rtl_mdio_write(hw, 0x14, 0x83EE);
+ rtl_mdio_write(hw, 0x14, 0xAF83);
+ rtl_mdio_write(hw, 0x14, 0xF1A1);
+ rtl_mdio_write(hw, 0x14, 0x83F4);
+ rtl_mdio_write(hw, 0x14, 0xD149);
+ rtl_mdio_write(hw, 0x14, 0xAF06);
+ rtl_mdio_write(hw, 0x14, 0x47AF);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0xAF00);
+ rtl_mdio_write(hw, 0x14, 0x00AF);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_mdio_write(hw, 0x13, 0xB818);
+ rtl_mdio_write(hw, 0x14, 0x0645);
+
+ rtl_mdio_write(hw, 0x13, 0xB81A);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_mdio_write(hw, 0x13, 0xB81C);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_mdio_write(hw, 0x13, 0xB81E);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_mdio_write(hw, 0x13, 0xB832);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x17);
+ gphy_val &= ~BIT_0;
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+void
+hw_mac_mcu_config_8168ep(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_27:
+ rtl8168_set_mac_mcu_8168ep_1(hw);
+ break;
+ case CFG_METHOD_28:
+ rtl8168_set_mac_mcu_8168ep_2(hw);
+ break;
+ }
+}
+
+void
+hw_phy_mcu_config_8168ep(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_28:
+ rtl8168_set_phy_mcu_8168ep_2(hw);
+ break;
+ }
+}
diff --git a/drivers/net/r8169/base/rtl8168fp.c b/drivers/net/r8169/base/rtl8168fp.c
new file mode 100644
index 0000000000..b8a058bbd9
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168fp.c
@@ -0,0 +1,195 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168fp.h"
+
+/* For RTL8168FP, CFG_METHOD_31,32,33,34 */
+
+static void
+hw_init_rxcfg_8168fp(struct rtl_hw *hw)
+{
+ RTL_W32(hw, RxConfig, Rx_Single_fetch_V2 |
+ (RX_DMA_BURST_unlimited << RxCfgDMAShift) | RxEarly_off_V2);
+}
+
+static void
+hw_ephy_config_8168fp(struct rtl_hw *hw)
+{
+ rtl_clear_and_set_pcie_phy_bit(hw, 0x19, BIT_6, BIT_12 | BIT_8);
+ rtl_clear_and_set_pcie_phy_bit(hw, 0x59, BIT_6, BIT_12 | BIT_8);
+
+ rtl_clear_pcie_phy_bit(hw, 0x0C, BIT_4);
+ rtl_clear_pcie_phy_bit(hw, 0x4C, BIT_4);
+ rtl_clear_pcie_phy_bit(hw, 0x0B, BIT_0);
+}
+
+static void
+hw_phy_config_8168fp(struct rtl_hw *hw)
+{
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x808E);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x4800);
+ rtl_mdio_write(hw, 0x13, 0x8090);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0xCC00);
+ rtl_mdio_write(hw, 0x13, 0x8092);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0xB000);
+ rtl_mdio_write(hw, 0x13, 0x8088);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x6000);
+ rtl_mdio_write(hw, 0x13, 0x808B);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x3F00, 0x0B00);
+ rtl_mdio_write(hw, 0x13, 0x808D);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x1F00, 0x0600);
+ rtl_mdio_write(hw, 0x13, 0x808C);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0xB000);
+
+ rtl_mdio_write(hw, 0x13, 0x80A0);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x2800);
+ rtl_mdio_write(hw, 0x13, 0x80A2);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x5000);
+ rtl_mdio_write(hw, 0x13, 0x809B);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xF800, 0xB000);
+ rtl_mdio_write(hw, 0x13, 0x809A);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x4B00);
+ rtl_mdio_write(hw, 0x13, 0x809D);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x3F00, 0x0800);
+ rtl_mdio_write(hw, 0x13, 0x80A1);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x7000);
+ rtl_mdio_write(hw, 0x13, 0x809F);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x1F00, 0x0300);
+ rtl_mdio_write(hw, 0x13, 0x809E);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x8800);
+
+ rtl_mdio_write(hw, 0x13, 0x80B2);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x2200);
+ rtl_mdio_write(hw, 0x13, 0x80AD);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xF800, 0x9800);
+ rtl_mdio_write(hw, 0x13, 0x80AF);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x3F00, 0x0800);
+ rtl_mdio_write(hw, 0x13, 0x80B3);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x6F00);
+ rtl_mdio_write(hw, 0x13, 0x80B1);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x1F00, 0x0300);
+ rtl_mdio_write(hw, 0x13, 0x80B0);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x9300);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8011);
+ rtl_set_eth_phy_bit(hw, 0x14, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_set_eth_phy_bit(hw, 0x11, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8016);
+ rtl_set_eth_phy_bit(hw, 0x14, BIT_10);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ /* Enable EthPhyPPSW */
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_clear_eth_phy_bit(hw, 0x11, BIT_7);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+static void
+hw_config_8168fp(struct rtl_hw *hw)
+{
+ u16 mac_ocp_data;
+ u32 csi_tmp;
+
+ rtl_eri_write(hw, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+ /* Adjust the trx fifo*/
+ rtl_eri_write(hw, 0xCA, 2, 0x0370, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xEA, 1, 0x10, ERIAR_ExGMAC);
+
+ /* Disable share fifo */
+ RTL_W32(hw, TxConfig, RTL_R32(hw, TxConfig) & ~BIT_7);
+
+ csi_tmp = rtl_eri_read(hw, 0xDC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+ csi_tmp |= BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ /* EEE pwrsave params */
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE056);
+ mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+ rtl_mac_ocp_write(hw, 0xE056, mac_ocp_data);
+
+ if (hw->HwPkgDet == 0x0F)
+ rtl_mac_ocp_write(hw, 0xEA80, 0x0003);
+ else
+ rtl_mac_ocp_write(hw, 0xEA80, 0x0000);
+
+ rtl_oob_mutex_lock(hw);
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE052);
+ mac_ocp_data &= ~(BIT_3 | BIT_0);
+ if (hw->HwPkgDet == 0x0F)
+ mac_ocp_data |= BIT_0;
+ rtl_mac_ocp_write(hw, 0xE052, mac_ocp_data);
+ rtl_oob_mutex_unlock(hw);
+
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~Beacon_en);
+
+ RTL_W8(hw, 0x1B, RTL_R8(hw, 0x1B) & ~0x07);
+
+ RTL_W8(hw, Config2, RTL_R8(hw, Config2) & ~PMSTS_En);
+
+ if (!HW_SUPP_SERDES_PHY(hw)) {
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) | BIT_6);
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) | BIT_6);
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) | BIT_7);
+ } else {
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) & ~BIT_6);
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_6);
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) & ~BIT_7);
+ }
+
+ rtl_oob_mutex_lock(hw);
+ if (hw->HwPkgDet == 0x0F)
+ rtl_eri_write(hw, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC);
+ else
+ rtl_eri_write(hw, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
+ rtl_oob_mutex_unlock(hw);
+
+ csi_tmp = rtl_eri_read(hw, 0xDC, 4, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_2 | BIT_3);
+ rtl_eri_write(hw, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
+
+ if (hw->mcfg == CFG_METHOD_32 || hw->mcfg == CFG_METHOD_33 ||
+ hw->mcfg == CFG_METHOD_34) {
+ csi_tmp = rtl_eri_read(hw, 0xD4, 4, ERIAR_ExGMAC);
+ csi_tmp |= BIT_4;
+ rtl_eri_write(hw, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+ }
+
+ rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
+ rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
+
+ csi_tmp = rtl_eri_read(hw, 0x2FC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~(BIT_0 | BIT_1);
+ csi_tmp |= BIT_0;
+ rtl_eri_write(hw, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ csi_tmp = rtl_eri_read(hw, 0x1D0, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_1;
+ rtl_eri_write(hw, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+}
+
+const struct rtl_hw_ops rtl8168fp_ops = {
+ .hw_config = hw_config_8168fp,
+ .hw_init_rxcfg = hw_init_rxcfg_8168fp,
+ .hw_ephy_config = hw_ephy_config_8168fp,
+ .hw_phy_config = hw_phy_config_8168fp,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8168fp,
+};
diff --git a/drivers/net/r8169/base/rtl8168fp.h b/drivers/net/r8169/base/rtl8168fp.h
new file mode 100644
index 0000000000..4613fe9a98
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168fp.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _RTL8168FP_H_
+#define _RTL8168FP_H_
+
+#include "../r8169_compat.h"
+
+extern const struct rtl_hw_ops rtl8168fp_ops;
+
+void hw_mac_mcu_config_8168fp(struct rtl_hw *hw);
+
+#endif
diff --git a/drivers/net/r8169/base/rtl8168fp_mcu.c b/drivers/net/r8169/base/rtl8168fp_mcu.c
new file mode 100644
index 0000000000..839dcfde61
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168fp_mcu.c
@@ -0,0 +1,270 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_dash.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168fp.h"
+
+/* For RTL8168FP, CFG_METHOD_31,32,33,34 */
+
+/* ------------------------------------MAC 8168FP--------------------------------------- */
+
+static void
+rtl8168_set_mac_mcu_8168fp_1(struct rtl_hw *hw)
+{
+ u16 i;
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+ if (hw->HwPkgDet == 0x00 || hw->HwPkgDet == 0x0F) {
+ static const u16 mcu_patch_code_8168fp_1_1[] = {
+ 0xE00A, 0xE0C1, 0xE104, 0xE108, 0xE10D, 0xE112, 0xE11C, 0xE121, 0xE000,
+ 0xE0C8, 0xB400, 0xC1FE, 0x49E2, 0xF04C, 0x49EA, 0xF04A, 0x74E6, 0xC246,
+ 0x7542, 0x73EC, 0x1800, 0x49C0, 0xF10D, 0x49C1, 0xF10B, 0x49C2, 0xF109,
+ 0x49B0, 0xF107, 0x49B1, 0xF105, 0x7220, 0x49A2, 0xF102, 0xE002, 0x4800,
+ 0x49D0, 0xF10A, 0x49D1, 0xF108, 0x49D2, 0xF106, 0x49D3, 0xF104, 0x49DF,
+ 0xF102, 0xE00C, 0x4801, 0x72E4, 0x49AD, 0xF108, 0xC225, 0x6741, 0x48F0,
+ 0x8F41, 0x4870, 0x8F41, 0xC7CF, 0x49B5, 0xF01F, 0x49B2, 0xF00B, 0x4980,
+ 0xF003, 0x484E, 0x94E7, 0x4981, 0xF004, 0x485E, 0xC212, 0x9543, 0xE071,
+ 0x49B6, 0xF003, 0x49B3, 0xF10F, 0x4980, 0xF003, 0x484E, 0x94E7, 0x4981,
+ 0xF004, 0x485E, 0xC204, 0x9543, 0xE005, 0xE000, 0xE0FC, 0xE0FA, 0xE065,
+ 0x49B7, 0xF007, 0x4980, 0xF005, 0x1A38, 0x46D4, 0x1200, 0xF109, 0x4981,
+ 0xF055, 0x49C3, 0xF105, 0x1A30, 0x46D5, 0x1200, 0xF04F, 0x7220, 0x49A2,
+ 0xF130, 0x49C1, 0xF12E, 0x49B0, 0xF12C, 0xC2E6, 0x7240, 0x49A8, 0xF003,
+ 0x49D0, 0xF126, 0x49A9, 0xF003, 0x49D1, 0xF122, 0x49AA, 0xF003, 0x49D2,
+ 0xF11E, 0x49AB, 0xF003, 0x49DF, 0xF11A, 0x49AC, 0xF003, 0x49D3, 0xF116,
+ 0x4980, 0xF003, 0x49C7, 0xF105, 0x4981, 0xF02C, 0x49D7, 0xF02A, 0x49C0,
+ 0xF00C, 0xC721, 0x62F4, 0x49A0, 0xF008, 0x49A4, 0xF106, 0x4824, 0x8AF4,
+ 0xC71A, 0x1A40, 0x9AE0, 0x49B6, 0xF017, 0x200E, 0xC7B8, 0x72E0, 0x4710,
+ 0x92E1, 0xC70E, 0x77E0, 0x49F0, 0xF112, 0xC70B, 0x77E0, 0x27FE, 0x1AFA,
+ 0x4317, 0xC705, 0x9AE2, 0x1A11, 0x8AE0, 0xE008, 0xE41C, 0xC0AE, 0xD23A,
+ 0xC7A2, 0x74E6, 0x484F, 0x94E7, 0xC79E, 0x8CE6, 0x8BEC, 0xC29C, 0x8D42,
+ 0x7220, 0xB000, 0xC502, 0xBD00, 0x0932, 0xB400, 0xC240, 0xC340, 0x7060,
+ 0x498F, 0xF014, 0x488F, 0x9061, 0x744C, 0x49C3, 0xF004, 0x7562, 0x485E,
+ 0x9563, 0x7446, 0x49C3, 0xF106, 0x7562, 0x1C30, 0x46E5, 0x1200, 0xF004,
+ 0x7446, 0x484F, 0x9447, 0xC32A, 0x7466, 0x49C0, 0xF00F, 0x48C0, 0x9C66,
+ 0x7446, 0x4840, 0x4841, 0x4842, 0x9C46, 0x744C, 0x4840, 0x9C4C, 0x744A,
+ 0x484A, 0x9C4A, 0xE013, 0x498E, 0xF011, 0x488E, 0x9061, 0x744C, 0x49C3,
+ 0xF004, 0x7446, 0x484E, 0x9447, 0x7446, 0x1D38, 0x46EC, 0x1500, 0xF004,
+ 0x7446, 0x484F, 0x9447, 0xB000, 0xC502, 0xBD00, 0x074C, 0xE000, 0xE0FC,
+ 0xE0C0, 0x4830, 0x4837, 0xC502, 0xBD00, 0x0978, 0x63E2, 0x4830, 0x4837,
+ 0xC502, 0xBD00, 0x09FE, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A12,
+ 0x73E2, 0x48B0, 0x48B3, 0x48B4, 0x48B5, 0x48B6, 0x48B7, 0x8BE2, 0xC302,
+ 0xBB00, 0x0A5A, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A6C, 0x73E2,
+ 0x4830, 0x4837, 0xC502, 0xBD00, 0x0A86
+ };
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_1); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168fp_1_1[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0890);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0712);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0974);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x09FC);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0A0E);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x0A56);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x0A68);
+ rtl_mac_ocp_write(hw, 0xFC36, 0x0A84);
+
+ /* Set bp enable*/
+ if (hw->HwPkgDet == 0x00)
+ rtl_mac_ocp_write(hw, 0xFC38, 0x00FC);
+ else if (hw->HwPkgDet == 0x0F)
+ rtl_mac_ocp_write(hw, 0xFC38, 0x00FF);
+ } else if (hw->HwPkgDet == 0x05 || hw->HwPkgDet == 0x06) {
+ static const u16 mcu_patch_code_8168fp_1_2[] = {
+ 0xE008, 0xE00A, 0xE031, 0xE033, 0xE035, 0xE144, 0xE166, 0xE168, 0xC502,
+ 0xBD00, 0x0000, 0xC725, 0x75E0, 0x48D0, 0x9DE0, 0xC722, 0x75E0, 0x1C78,
+ 0x416C, 0x1530, 0xF111, 0xC71D, 0x75F6, 0x49D1, 0xF00D, 0x75E0, 0x1C1F,
+ 0x416C, 0x1502, 0xF108, 0x75FA, 0x49D3, 0xF005, 0x75EC, 0x9DE4, 0x4853,
+ 0x9DFA, 0xC70B, 0x75E0, 0x4852, 0x4850, 0x9DE0, 0xC602, 0xBE00, 0x04B8,
+ 0xE420, 0xE000, 0xE0FC, 0xE43C, 0xDC00, 0xEB00, 0xC202, 0xBA00, 0x0000,
+ 0xC002, 0xB800, 0x0000, 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xB406,
+ 0xC44D, 0xC54D, 0x1867, 0xE8A2, 0x2318, 0x276E, 0x1601, 0xF106, 0x1A07,
+ 0xE861, 0xE86B, 0xE873, 0xE037, 0x231E, 0x276E, 0x1602, 0xF10B, 0x1A07,
+ 0xE858, 0xE862, 0xC247, 0xC344, 0xE8E3, 0xC73B, 0x66E0, 0xE8B5, 0xE029,
+ 0x231A, 0x276C, 0xC733, 0x9EE0, 0x1866, 0xE885, 0x251C, 0x120F, 0xF011,
+ 0x1209, 0xF011, 0x2014, 0x240E, 0x1000, 0xF007, 0x120C, 0xF00D, 0x1203,
+ 0xF00D, 0x1200, 0xF00D, 0x120C, 0xF00D, 0x1203, 0xF00D, 0x1A03, 0xE00C,
+ 0x1A07, 0xE00A, 0x1A00, 0xE008, 0x1A01, 0xE006, 0x1A02, 0xE004, 0x1A04,
+ 0xE002, 0x1A05, 0xE829, 0xE833, 0xB006, 0xB005, 0xB004, 0xB003, 0xB002,
+ 0xB001, 0x60C4, 0xC702, 0xBF00, 0x2786, 0xDD00, 0xD030, 0xE0C4, 0xE0F8,
+ 0xDC42, 0xD3F0, 0x0000, 0x0004, 0x0007, 0x0014, 0x0090, 0x1000, 0x0F00,
+ 0x1004, 0x1008, 0x3000, 0x3004, 0x3008, 0x4000, 0x7777, 0x8000, 0x8001,
+ 0x8008, 0x8003, 0x8004, 0xC000, 0xC004, 0xF004, 0xFFFF, 0xB406, 0xB407,
+ 0xC6E5, 0x77C0, 0x27F3, 0x23F3, 0x47FA, 0x9FC0, 0xB007, 0xB006, 0xFF80,
+ 0xB405, 0xB407, 0xC7D8, 0x75E0, 0x48D0, 0x9DE0, 0xB007, 0xB005, 0xFF80,
+ 0xB401, 0xC0EA, 0xC2DC, 0xC3D8, 0xE865, 0xC0D3, 0xC1E0, 0xC2E3, 0xE861,
+ 0xE817, 0xC0CD, 0xC2CF, 0xE85D, 0xC0C9, 0xC1D6, 0xC2DB, 0xE859, 0xE80F,
+ 0xC1C7, 0xC2CE, 0xE855, 0xC0C0, 0xC1D1, 0xC2D3, 0xE851, 0xE807, 0xC0BE,
+ 0xC2C2, 0xE84D, 0xE803, 0xB001, 0xFF80, 0xB402, 0xC2C6, 0xE859, 0x499F,
+ 0xF1FE, 0xB002, 0xFF80, 0xB402, 0xB403, 0xB407, 0xE821, 0x8882, 0x1980,
+ 0x8983, 0xE81D, 0x7180, 0x218B, 0x25BB, 0x1310, 0xF014, 0x1310, 0xFB03,
+ 0x1F20, 0x38FB, 0x3288, 0x434B, 0x2491, 0x430B, 0x1F0F, 0x38FB, 0x4313,
+ 0x2121, 0x4353, 0x2521, 0x418A, 0x6282, 0x2527, 0x212F, 0x418A, 0xB007,
+ 0xB003, 0xB002, 0xFF80, 0x6183, 0x2496, 0x1100, 0xF1FD, 0xFF80, 0x4800,
+ 0x4801, 0xC213, 0xC313, 0xE815, 0x4860, 0x8EE0, 0xC210, 0xC310, 0xE822,
+ 0x481E, 0xC20C, 0xC30C, 0xE80C, 0xC206, 0x7358, 0x483A, 0x9B58, 0xFF80,
+ 0xE8E0, 0xE000, 0x1008, 0x0F00, 0x800C, 0x0F00, 0xB407, 0xB406, 0xB403,
+ 0xC7F7, 0x98E0, 0x99E2, 0x9AE4, 0x21B2, 0x4831, 0x483F, 0x9BE6, 0x66E7,
+ 0x49E6, 0xF1FE, 0xB003, 0xB006, 0xB007, 0xFF80, 0xB407, 0xB406, 0xB403,
+ 0xC7E5, 0x9AE4, 0x21B2, 0x4831, 0x9BE6, 0x66E7, 0x49E6, 0xF1FE, 0x70E0,
+ 0x71E2, 0xB003, 0xB006, 0xB007, 0xFF80, 0x4882, 0xB406, 0xB405, 0xC71E,
+ 0x76E0, 0x1D78, 0x4175, 0x1630, 0xF10C, 0xC715, 0x76E0, 0x4861, 0x9EE0,
+ 0xC713, 0x1EFF, 0x9EE2, 0x75E0, 0x4850, 0x9DE0, 0xE005, 0xC70B, 0x76E0,
+ 0x4865, 0x9EE0, 0xB005, 0xB006, 0xC708, 0xC102, 0xB900, 0x279E, 0xEB16,
+ 0xEB00, 0xE43C, 0xDC00, 0xD3EC, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000
+ };
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_2); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168fp_1_2[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x04b4);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x279C);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC36, 0x0000);
+
+ /* Set bp enable*/
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0022);
+ }
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_8116as_2(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168fp_8116as_2[] = {
+ 0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602,
+ 0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+ 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+ 0xBE00, 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x2AAC);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0B14);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0BE4);
+
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0007);
+}
+
+static void
+_rtl8168_set_mac_mcu_8168fp_2(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168fp_2[] = {
+ 0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602,
+ 0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+ 0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
+ 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
+ 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
+ 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, 0xE80E, 0xE018, 0xC126,
+ 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, 0xE805, 0xC521, 0xC324,
+ 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x9D0A, 0x9A0C, 0x9B0E,
+ 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
+ 0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
+ 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
+ 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000,
+ 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_2); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168fp_2[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x2AAC);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0B14);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0BE4);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x2A5C);
+
+ if (rtl8168_check_dash_other_fun_present(hw))
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0006);
+ else
+ rtl_mac_ocp_write(hw, 0xFC38, 0x000E);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_2(struct rtl_hw *hw)
+{
+ if (hw->HwSuppSerDesPhyVer == 1)
+ rtl8168_set_mac_mcu_8168fp_8116as_2(hw);
+ else
+ _rtl8168_set_mac_mcu_8168fp_2(hw);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_3(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168fp_3[] = {
+ 0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400,
+ 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
+ 0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
+ 0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
+ 0xE80E, 0xE018, 0xC126, 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326,
+ 0xE805, 0xC521, 0xC324, 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908,
+ 0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
+ 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
+ 0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
+ 0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC,
+ 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+ 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_3); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168fp_3[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x2B14);
+
+ if (rtl8168_check_dash_other_fun_present(hw))
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0000);
+ else
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0001);
+}
+
+/* ------------------------------------PHY 8168FP------------------------------------- */
+
+void
+hw_mac_mcu_config_8168fp(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_31:
+ rtl8168_set_mac_mcu_8168fp_1(hw);
+ break;
+ case CFG_METHOD_32:
+ rtl8168_set_mac_mcu_8168fp_2(hw);
+ break;
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ rtl8168_set_mac_mcu_8168fp_3(hw);
+ break;
+ }
+}
diff --git a/drivers/net/r8169/base/rtl8168g.c b/drivers/net/r8169/base/rtl8168g.c
new file mode 100644
index 0000000000..8f5e7ac2a5
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168g.c
@@ -0,0 +1,297 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168g.h"
+
+/* For RTL8168G,RTL8168GU, CFG_METHOD_21,22,24,25 */
+
+static void
+hw_init_rxcfg_8168g(struct rtl_hw *hw)
+{
+ RTL_W32(hw, RxConfig, Rx_Single_fetch_V2 |
+ (RX_DMA_BURST_unlimited << RxCfgDMAShift) | RxEarly_off_V2);
+}
+
+static void
+hw_ephy_config_8168g(struct rtl_hw *hw)
+{
+ u16 ephy_data;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ ephy_data = rtl_ephy_read(hw, 0x00);
+ ephy_data &= ~BIT_3;
+ rtl_ephy_write(hw, 0x00, ephy_data);
+ ephy_data = rtl_ephy_read(hw, 0x0C);
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 |
+ BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+ ephy_data |= (BIT_5 | BIT_11);
+ rtl_ephy_write(hw, 0x0C, ephy_data);
+
+ ephy_data = rtl_ephy_read(hw, 0x1E);
+ ephy_data |= BIT_0;
+ rtl_ephy_write(hw, 0x1E, ephy_data);
+
+ ephy_data = rtl_ephy_read(hw, 0x19);
+ ephy_data &= ~BIT_15;
+ rtl_ephy_write(hw, 0x19, ephy_data);
+ break;
+ case CFG_METHOD_25:
+ ephy_data = rtl_ephy_read(hw, 0x00);
+ ephy_data &= ~BIT_3;
+ rtl_ephy_write(hw, 0x00, ephy_data);
+ ephy_data = rtl_ephy_read(hw, 0x0C);
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 |
+ BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+ ephy_data |= (BIT_5 | BIT_11);
+ rtl_ephy_write(hw, 0x0C, ephy_data);
+
+ rtl_ephy_write(hw, 0x19, 0x7C00);
+ rtl_ephy_write(hw, 0x1E, 0x20EB);
+ rtl_ephy_write(hw, 0x0D, 0x1666);
+ rtl_ephy_write(hw, 0x00, 0x10A3);
+ rtl_ephy_write(hw, 0x06, 0xF050);
+
+ rtl_set_pcie_phy_bit(hw, 0x04, BIT_4);
+ rtl_clear_pcie_phy_bit(hw, 0x1D, BIT_14);
+ break;
+ default:
+ break;
+ }
+}
+
+static void
+hw_phy_config_8168g_1(struct rtl_hw *hw)
+{
+ u16 gphy_val;
+
+ rtl_mdio_write(hw, 0x1F, 0x0A46);
+ gphy_val = rtl_mdio_read(hw, 0x10);
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ if (gphy_val & BIT_8)
+ rtl_clear_eth_phy_bit(hw, 0x12, BIT_15);
+ else
+ rtl_set_eth_phy_bit(hw, 0x12, BIT_15);
+ rtl_mdio_write(hw, 0x1F, 0x0A46);
+ gphy_val = rtl_mdio_read(hw, 0x13);
+ rtl_mdio_write(hw, 0x1F, 0x0C41);
+ if (gphy_val & BIT_8)
+ rtl_set_eth_phy_bit(hw, 0x15, BIT_1);
+ else
+ rtl_clear_eth_phy_bit(hw, 0x15, BIT_1);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_2 | BIT_3);
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~BIT_8);
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_7);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_6);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8084);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~(BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_12);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_1);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_0);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A4B);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_2);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8012);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) | BIT_15);
+
+ rtl_mdio_write(hw, 0x1F, 0x0C42);
+ gphy_val = rtl_mdio_read(hw, 0x11);
+ gphy_val |= BIT_14;
+ gphy_val &= ~BIT_13;
+ rtl_mdio_write(hw, 0x11, gphy_val);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x809A);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x13, 0x80A0);
+ gphy_val = rtl_mdio_read(hw, 0x14) & 0x00FF;
+ gphy_val |= 0x1000;
+ rtl_mdio_write(hw, 0x14, gphy_val);
+ rtl_mdio_write(hw, 0x13, 0x8088);
+ rtl_mdio_write(hw, 0x14, 0x9222);
+
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+static void
+hw_phy_config_8168g_2(struct rtl_hw *hw)
+{
+ u16 gphy_val;
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~BIT_8);
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_7);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_6);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8084);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~(BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_12);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_1);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_0);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8012);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) | BIT_15);
+
+ rtl_mdio_write(hw, 0x1F, 0x0C42);
+ gphy_val = rtl_mdio_read(hw, 0x11);
+ gphy_val |= BIT_14;
+ gphy_val &= ~BIT_13;
+ rtl_mdio_write(hw, 0x11, gphy_val);
+}
+
+static void
+hw_phy_config_8168g_3(struct rtl_hw *hw)
+{
+ rtl_mdio_write(hw, 0x1F, 0x0BCC);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~BIT_8);
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_7);
+ rtl_mdio_write(hw, 0x11, rtl_mdio_read(hw, 0x11) | BIT_6);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8084);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) & ~(BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_12);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_1);
+ rtl_mdio_write(hw, 0x10, rtl_mdio_read(hw, 0x10) | BIT_0);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8012);
+ rtl_mdio_write(hw, 0x14, rtl_mdio_read(hw, 0x14) | BIT_15);
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCE);
+ rtl_mdio_write(hw, 0x12, 0x8860);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x80F3);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8B00);
+ rtl_mdio_write(hw, 0x13, 0x80F0);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x3A00);
+ rtl_mdio_write(hw, 0x13, 0x80EF);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0500);
+ rtl_mdio_write(hw, 0x13, 0x80F6);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6E00);
+ rtl_mdio_write(hw, 0x13, 0x80EC);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6800);
+ rtl_mdio_write(hw, 0x13, 0x80ED);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x7C00);
+ rtl_mdio_write(hw, 0x13, 0x80F2);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xF400);
+ rtl_mdio_write(hw, 0x13, 0x80F4);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8500);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8110);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xA800);
+ rtl_mdio_write(hw, 0x13, 0x810F);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x1D00);
+ rtl_mdio_write(hw, 0x13, 0x8111);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xF500);
+ rtl_mdio_write(hw, 0x13, 0x8113);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x6100);
+ rtl_mdio_write(hw, 0x13, 0x8115);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x9200);
+ rtl_mdio_write(hw, 0x13, 0x810E);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0400);
+ rtl_mdio_write(hw, 0x13, 0x810C);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x7C00);
+ rtl_mdio_write(hw, 0x13, 0x810B);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x5A00);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x80D1);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xFF00);
+ rtl_mdio_write(hw, 0x13, 0x80CD);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x9E00);
+ rtl_mdio_write(hw, 0x13, 0x80D3);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x0E00);
+ rtl_mdio_write(hw, 0x13, 0x80D5);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0xCA00);
+ rtl_mdio_write(hw, 0x13, 0x80D7);
+ rtl_mdio_write(hw, 0x14, (rtl_mdio_read(hw, 0x14) & ~0xFF00) | 0x8400);
+}
+
+static void
+hw_phy_config_8168g(struct rtl_hw *hw)
+{
+ if (hw->mcfg == CFG_METHOD_21)
+ hw_phy_config_8168g_1(hw);
+ else if (hw->mcfg == CFG_METHOD_24)
+ hw_phy_config_8168g_2(hw);
+ else if (hw->mcfg == CFG_METHOD_25)
+ hw_phy_config_8168g_3(hw);
+
+ /* Disable EthPhyPPSW */
+ rtl_mdio_write(hw, 0x1F, 0x0BCD);
+ rtl_mdio_write(hw, 0x14, 0x5065);
+ rtl_mdio_write(hw, 0x14, 0xD065);
+ rtl_mdio_write(hw, 0x1F, 0x0BC8);
+ rtl_mdio_write(hw, 0x11, 0x5655);
+ rtl_mdio_write(hw, 0x1F, 0x0BCD);
+ rtl_mdio_write(hw, 0x14, 0x1065);
+ rtl_mdio_write(hw, 0x14, 0x9065);
+ rtl_mdio_write(hw, 0x14, 0x1065);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+static void
+hw_config_8168g(struct rtl_hw *hw)
+{
+ u32 csi_tmp;
+
+ /* Share fifo rx params */
+ rtl_eri_write(hw, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xCC, 1, 0x38, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xD0, 1, 0x48, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+ /* Adjust the trx fifo*/
+ rtl_eri_write(hw, 0xCA, 2, 0x0370, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xEA, 1, 0x10, ERIAR_ExGMAC);
+
+ /* Disable share fifo */
+ RTL_W32(hw, TxConfig, RTL_R32(hw, TxConfig) & ~BIT_7);
+
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~Beacon_en);
+
+ /* EEE led enable */
+ RTL_W8(hw, 0x1B, RTL_R8(hw, 0x1B) & ~0x07);
+
+ RTL_W8(hw, Config2, RTL_R8(hw, Config2) & ~PMSTS_En);
+
+ /* CRC wake disable */
+ rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
+
+ csi_tmp = rtl_eri_read(hw, 0x1B0, 4, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_12;
+ rtl_eri_write(hw, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+
+ csi_tmp = rtl_eri_read(hw, 0x2FC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
+ csi_tmp |= BIT_0;
+ rtl_eri_write(hw, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ csi_tmp = rtl_eri_read(hw, 0x1D0, 1, ERIAR_ExGMAC);
+ csi_tmp |= BIT_1;
+ rtl_eri_write(hw, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+}
+
+const struct rtl_hw_ops rtl8168g_ops = {
+ .hw_config = hw_config_8168g,
+ .hw_init_rxcfg = hw_init_rxcfg_8168g,
+ .hw_ephy_config = hw_ephy_config_8168g,
+ .hw_phy_config = hw_phy_config_8168g,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8168g,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8168g,
+};
diff --git a/drivers/net/r8169/base/rtl8168g.h b/drivers/net/r8169/base/rtl8168g.h
new file mode 100644
index 0000000000..feb0e28ff6
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168g.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _RTL8168G_H_
+#define _RTL8168G_H_
+
+#include "../r8169_compat.h"
+
+extern const struct rtl_hw_ops rtl8168g_ops;
+
+void hw_mac_mcu_config_8168g(struct rtl_hw *hw);
+void hw_phy_mcu_config_8168g(struct rtl_hw *hw);
+
+#endif
diff --git a/drivers/net/r8169/base/rtl8168g_mcu.c b/drivers/net/r8169/base/rtl8168g_mcu.c
new file mode 100644
index 0000000000..a1296b044b
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168g_mcu.c
@@ -0,0 +1,1936 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168g.h"
+
+/* For RTL8168G,RTL8168GU, CFG_METHOD_21,22,24,25 */
+
+/* ------------------------------------MAC 8168G1----------------------------------- */
+
+static void
+rtl8168_set_mac_mcu_8168g_1(struct rtl_hw *hw)
+{
+ rtl_mac_ocp_write(hw, 0xE43C, 0x0000);
+ rtl_mac_ocp_write(hw, 0xE43E, 0x0000);
+
+ rtl_mac_ocp_write(hw, 0xE434, 0x0004);
+ rtl_mac_ocp_write(hw, 0xE43C, 0x0004);
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ rtl_mac_ocp_write(hw, 0xF800, 0xE008);
+ rtl_mac_ocp_write(hw, 0xF802, 0xE01B);
+ rtl_mac_ocp_write(hw, 0xF804, 0xE022);
+ rtl_mac_ocp_write(hw, 0xF806, 0xE094);
+ rtl_mac_ocp_write(hw, 0xF808, 0xE097);
+ rtl_mac_ocp_write(hw, 0xF80A, 0xE09A);
+ rtl_mac_ocp_write(hw, 0xF80C, 0xE0B3);
+ rtl_mac_ocp_write(hw, 0xF80E, 0xE0BA);
+ rtl_mac_ocp_write(hw, 0xF810, 0x49D2);
+ rtl_mac_ocp_write(hw, 0xF812, 0xF10D);
+ rtl_mac_ocp_write(hw, 0xF814, 0x766C);
+ rtl_mac_ocp_write(hw, 0xF816, 0x49E2);
+ rtl_mac_ocp_write(hw, 0xF818, 0xF00A);
+ rtl_mac_ocp_write(hw, 0xF81A, 0x1EC0);
+ rtl_mac_ocp_write(hw, 0xF81C, 0x8EE1);
+ rtl_mac_ocp_write(hw, 0xF81E, 0xC60A);
+ rtl_mac_ocp_write(hw, 0xF820, 0x77C0);
+ rtl_mac_ocp_write(hw, 0xF822, 0x4870);
+ rtl_mac_ocp_write(hw, 0xF824, 0x9FC0);
+ rtl_mac_ocp_write(hw, 0xF826, 0x1EA0);
+ rtl_mac_ocp_write(hw, 0xF828, 0xC707);
+ rtl_mac_ocp_write(hw, 0xF82A, 0x8EE1);
+ rtl_mac_ocp_write(hw, 0xF82C, 0x9D6C);
+ rtl_mac_ocp_write(hw, 0xF82E, 0xC603);
+ rtl_mac_ocp_write(hw, 0xF830, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF832, 0xB416);
+ rtl_mac_ocp_write(hw, 0xF834, 0x0076);
+ rtl_mac_ocp_write(hw, 0xF836, 0xE86C);
+ rtl_mac_ocp_write(hw, 0xF838, 0xC406);
+ rtl_mac_ocp_write(hw, 0xF83A, 0x7580);
+ rtl_mac_ocp_write(hw, 0xF83C, 0x4852);
+ rtl_mac_ocp_write(hw, 0xF83E, 0x8D80);
+ rtl_mac_ocp_write(hw, 0xF840, 0xC403);
+ rtl_mac_ocp_write(hw, 0xF842, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF844, 0xD3E0);
+ rtl_mac_ocp_write(hw, 0xF846, 0x02C8);
+ rtl_mac_ocp_write(hw, 0xF848, 0x8918);
+ rtl_mac_ocp_write(hw, 0xF84A, 0xE815);
+ rtl_mac_ocp_write(hw, 0xF84C, 0x1100);
+ rtl_mac_ocp_write(hw, 0xF84E, 0xF011);
+ rtl_mac_ocp_write(hw, 0xF850, 0xE812);
+ rtl_mac_ocp_write(hw, 0xF852, 0x4990);
+ rtl_mac_ocp_write(hw, 0xF854, 0xF002);
+ rtl_mac_ocp_write(hw, 0xF856, 0xE817);
+ rtl_mac_ocp_write(hw, 0xF858, 0xE80E);
+ rtl_mac_ocp_write(hw, 0xF85A, 0x4992);
+ rtl_mac_ocp_write(hw, 0xF85C, 0xF002);
+ rtl_mac_ocp_write(hw, 0xF85E, 0xE80E);
+ rtl_mac_ocp_write(hw, 0xF860, 0xE80A);
+ rtl_mac_ocp_write(hw, 0xF862, 0x4993);
+ rtl_mac_ocp_write(hw, 0xF864, 0xF002);
+ rtl_mac_ocp_write(hw, 0xF866, 0xE818);
+ rtl_mac_ocp_write(hw, 0xF868, 0xE806);
+ rtl_mac_ocp_write(hw, 0xF86A, 0x4991);
+ rtl_mac_ocp_write(hw, 0xF86C, 0xF002);
+ rtl_mac_ocp_write(hw, 0xF86E, 0xE838);
+ rtl_mac_ocp_write(hw, 0xF870, 0xC25E);
+ rtl_mac_ocp_write(hw, 0xF872, 0xBA00);
+ rtl_mac_ocp_write(hw, 0xF874, 0xC056);
+ rtl_mac_ocp_write(hw, 0xF876, 0x7100);
+ rtl_mac_ocp_write(hw, 0xF878, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xF87A, 0x7100);
+ rtl_mac_ocp_write(hw, 0xF87C, 0x4892);
+ rtl_mac_ocp_write(hw, 0xF87E, 0x4813);
+ rtl_mac_ocp_write(hw, 0xF880, 0x8900);
+ rtl_mac_ocp_write(hw, 0xF882, 0xE00A);
+ rtl_mac_ocp_write(hw, 0xF884, 0x7100);
+ rtl_mac_ocp_write(hw, 0xF886, 0x4890);
+ rtl_mac_ocp_write(hw, 0xF888, 0x4813);
+ rtl_mac_ocp_write(hw, 0xF88A, 0x8900);
+ rtl_mac_ocp_write(hw, 0xF88C, 0xC74B);
+ rtl_mac_ocp_write(hw, 0xF88E, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF890, 0x48C2);
+ rtl_mac_ocp_write(hw, 0xF892, 0x4841);
+ rtl_mac_ocp_write(hw, 0xF894, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF896, 0xC746);
+ rtl_mac_ocp_write(hw, 0xF898, 0x74FC);
+ rtl_mac_ocp_write(hw, 0xF89A, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF89C, 0xF120);
+ rtl_mac_ocp_write(hw, 0xF89E, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8A0, 0xF11E);
+ rtl_mac_ocp_write(hw, 0xF8A2, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF8A4, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF8A6, 0xF01B);
+ rtl_mac_ocp_write(hw, 0xF8A8, 0x49C6);
+ rtl_mac_ocp_write(hw, 0xF8AA, 0xF119);
+ rtl_mac_ocp_write(hw, 0xF8AC, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF8AE, 0x49C4);
+ rtl_mac_ocp_write(hw, 0xF8B0, 0xF013);
+ rtl_mac_ocp_write(hw, 0xF8B2, 0xC536);
+ rtl_mac_ocp_write(hw, 0xF8B4, 0x74B0);
+ rtl_mac_ocp_write(hw, 0xF8B6, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8B8, 0xF1FD);
+ rtl_mac_ocp_write(hw, 0xF8BA, 0xC537);
+ rtl_mac_ocp_write(hw, 0xF8BC, 0xC434);
+ rtl_mac_ocp_write(hw, 0xF8BE, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xF8C0, 0xC435);
+ rtl_mac_ocp_write(hw, 0xF8C2, 0x1C13);
+ rtl_mac_ocp_write(hw, 0xF8C4, 0x484F);
+ rtl_mac_ocp_write(hw, 0xF8C6, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xF8C8, 0xC52B);
+ rtl_mac_ocp_write(hw, 0xF8CA, 0x74B0);
+ rtl_mac_ocp_write(hw, 0xF8CC, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8CE, 0xF1FD);
+ rtl_mac_ocp_write(hw, 0xF8D0, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF8D2, 0x48C4);
+ rtl_mac_ocp_write(hw, 0xF8D4, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF8D6, 0x7100);
+ rtl_mac_ocp_write(hw, 0xF8D8, 0x4893);
+ rtl_mac_ocp_write(hw, 0xF8DA, 0x8900);
+ rtl_mac_ocp_write(hw, 0xF8DC, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xF8DE, 0xC520);
+ rtl_mac_ocp_write(hw, 0xF8E0, 0x74B0);
+ rtl_mac_ocp_write(hw, 0xF8E2, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8E4, 0xF11C);
+ rtl_mac_ocp_write(hw, 0xF8E6, 0xC71E);
+ rtl_mac_ocp_write(hw, 0xF8E8, 0x74FC);
+ rtl_mac_ocp_write(hw, 0xF8EA, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8EC, 0xF118);
+ rtl_mac_ocp_write(hw, 0xF8EE, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF8F0, 0xF116);
+ rtl_mac_ocp_write(hw, 0xF8F2, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF8F4, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF8F6, 0xF013);
+ rtl_mac_ocp_write(hw, 0xF8F8, 0x48C3);
+ rtl_mac_ocp_write(hw, 0xF8FA, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF8FC, 0xC516);
+ rtl_mac_ocp_write(hw, 0xF8FE, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xF900, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xF902, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xF904, 0xC411);
+ rtl_mac_ocp_write(hw, 0xF906, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xF908, 0xC411);
+ rtl_mac_ocp_write(hw, 0xF90A, 0x1C13);
+ rtl_mac_ocp_write(hw, 0xF90C, 0x484F);
+ rtl_mac_ocp_write(hw, 0xF90E, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xF910, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xF912, 0x49CF);
+ rtl_mac_ocp_write(hw, 0xF914, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xF916, 0x7100);
+ rtl_mac_ocp_write(hw, 0xF918, 0x4891);
+ rtl_mac_ocp_write(hw, 0xF91A, 0x8900);
+ rtl_mac_ocp_write(hw, 0xF91C, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xF91E, 0xE400);
+ rtl_mac_ocp_write(hw, 0xF920, 0xD3E0);
+ rtl_mac_ocp_write(hw, 0xF922, 0xE000);
+ rtl_mac_ocp_write(hw, 0xF924, 0x0481);
+ rtl_mac_ocp_write(hw, 0xF926, 0x0C81);
+ rtl_mac_ocp_write(hw, 0xF928, 0xDE20);
+ rtl_mac_ocp_write(hw, 0xF92A, 0x0000);
+ rtl_mac_ocp_write(hw, 0xF92C, 0x0992);
+ rtl_mac_ocp_write(hw, 0xF92E, 0x1B76);
+ rtl_mac_ocp_write(hw, 0xF930, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF932, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF934, 0x059C);
+ rtl_mac_ocp_write(hw, 0xF936, 0x1B76);
+ rtl_mac_ocp_write(hw, 0xF938, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF93A, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF93C, 0x065A);
+ rtl_mac_ocp_write(hw, 0xF93E, 0xB400);
+ rtl_mac_ocp_write(hw, 0xF940, 0x18DE);
+ rtl_mac_ocp_write(hw, 0xF942, 0x2008);
+ rtl_mac_ocp_write(hw, 0xF944, 0x4001);
+ rtl_mac_ocp_write(hw, 0xF946, 0xF10F);
+ rtl_mac_ocp_write(hw, 0xF948, 0x7342);
+ rtl_mac_ocp_write(hw, 0xF94A, 0x1880);
+ rtl_mac_ocp_write(hw, 0xF94C, 0x2008);
+ rtl_mac_ocp_write(hw, 0xF94E, 0x0009);
+ rtl_mac_ocp_write(hw, 0xF950, 0x4018);
+ rtl_mac_ocp_write(hw, 0xF952, 0xF109);
+ rtl_mac_ocp_write(hw, 0xF954, 0x7340);
+ rtl_mac_ocp_write(hw, 0xF956, 0x25BC);
+ rtl_mac_ocp_write(hw, 0xF958, 0x130F);
+ rtl_mac_ocp_write(hw, 0xF95A, 0xF105);
+ rtl_mac_ocp_write(hw, 0xF95C, 0xC00A);
+ rtl_mac_ocp_write(hw, 0xF95E, 0x7300);
+ rtl_mac_ocp_write(hw, 0xF960, 0x4831);
+ rtl_mac_ocp_write(hw, 0xF962, 0x9B00);
+ rtl_mac_ocp_write(hw, 0xF964, 0xB000);
+ rtl_mac_ocp_write(hw, 0xF966, 0x7340);
+ rtl_mac_ocp_write(hw, 0xF968, 0x8320);
+ rtl_mac_ocp_write(hw, 0xF96A, 0xC302);
+ rtl_mac_ocp_write(hw, 0xF96C, 0xBB00);
+ rtl_mac_ocp_write(hw, 0xF96E, 0x0C12);
+ rtl_mac_ocp_write(hw, 0xF970, 0xE860);
+ rtl_mac_ocp_write(hw, 0xF972, 0xC406);
+ rtl_mac_ocp_write(hw, 0xF974, 0x7580);
+ rtl_mac_ocp_write(hw, 0xF976, 0x4851);
+ rtl_mac_ocp_write(hw, 0xF978, 0x8D80);
+ rtl_mac_ocp_write(hw, 0xF97A, 0xC403);
+ rtl_mac_ocp_write(hw, 0xF97C, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF97E, 0xD3E0);
+ rtl_mac_ocp_write(hw, 0xF980, 0x02C8);
+ rtl_mac_ocp_write(hw, 0xF982, 0xC406);
+ rtl_mac_ocp_write(hw, 0xF984, 0x7580);
+ rtl_mac_ocp_write(hw, 0xF986, 0x4850);
+ rtl_mac_ocp_write(hw, 0xF988, 0x8D80);
+ rtl_mac_ocp_write(hw, 0xF98A, 0xC403);
+ rtl_mac_ocp_write(hw, 0xF98C, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF98E, 0xD3E0);
+ rtl_mac_ocp_write(hw, 0xF990, 0x0298);
+
+ rtl_mac_ocp_write(hw, 0xDE30, 0x0080);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0075);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x02B1);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0991);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x059B);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0659);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x02C7);
+ rtl_mac_ocp_write(hw, 0xFC36, 0x0279);
+}
+
+/* ------------------------------------MAC 8168GU1---------------------------------- */
+
+static void
+rtl8168_set_mac_mcu_8168gu_1(struct rtl_hw *hw)
+{
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ rtl_mac_ocp_write(hw, 0xF800, 0xE008);
+ rtl_mac_ocp_write(hw, 0xF802, 0xE011);
+ rtl_mac_ocp_write(hw, 0xF804, 0xE015);
+ rtl_mac_ocp_write(hw, 0xF806, 0xE018);
+ rtl_mac_ocp_write(hw, 0xF808, 0xE01B);
+ rtl_mac_ocp_write(hw, 0xF80A, 0xE027);
+ rtl_mac_ocp_write(hw, 0xF80C, 0xE043);
+ rtl_mac_ocp_write(hw, 0xF80E, 0xE065);
+ rtl_mac_ocp_write(hw, 0xF810, 0x49E2);
+ rtl_mac_ocp_write(hw, 0xF812, 0xF005);
+ rtl_mac_ocp_write(hw, 0xF814, 0x49EA);
+ rtl_mac_ocp_write(hw, 0xF816, 0xF003);
+ rtl_mac_ocp_write(hw, 0xF818, 0xC404);
+ rtl_mac_ocp_write(hw, 0xF81A, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF81C, 0xC403);
+ rtl_mac_ocp_write(hw, 0xF81E, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF820, 0x0496);
+ rtl_mac_ocp_write(hw, 0xF822, 0x051A);
+ rtl_mac_ocp_write(hw, 0xF824, 0x1D01);
+ rtl_mac_ocp_write(hw, 0xF826, 0x8DE8);
+ rtl_mac_ocp_write(hw, 0xF828, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF82A, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF82C, 0x0206);
+ rtl_mac_ocp_write(hw, 0xF82E, 0x1B76);
+ rtl_mac_ocp_write(hw, 0xF830, 0xC202);
+ rtl_mac_ocp_write(hw, 0xF832, 0xBA00);
+ rtl_mac_ocp_write(hw, 0xF834, 0x058A);
+ rtl_mac_ocp_write(hw, 0xF836, 0x1B76);
+ rtl_mac_ocp_write(hw, 0xF838, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF83A, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF83C, 0x0648);
+ rtl_mac_ocp_write(hw, 0xF83E, 0x74E6);
+ rtl_mac_ocp_write(hw, 0xF840, 0x1B78);
+ rtl_mac_ocp_write(hw, 0xF842, 0x46DC);
+ rtl_mac_ocp_write(hw, 0xF844, 0x1300);
+ rtl_mac_ocp_write(hw, 0xF846, 0xF005);
+ rtl_mac_ocp_write(hw, 0xF848, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF84A, 0x48C3);
+ rtl_mac_ocp_write(hw, 0xF84C, 0x48C4);
+ rtl_mac_ocp_write(hw, 0xF84E, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF850, 0x64E7);
+ rtl_mac_ocp_write(hw, 0xF852, 0xC302);
+ rtl_mac_ocp_write(hw, 0xF854, 0xBB00);
+ rtl_mac_ocp_write(hw, 0xF856, 0x068E);
+ rtl_mac_ocp_write(hw, 0xF858, 0x74E4);
+ rtl_mac_ocp_write(hw, 0xF85A, 0x49C5);
+ rtl_mac_ocp_write(hw, 0xF85C, 0xF106);
+ rtl_mac_ocp_write(hw, 0xF85E, 0x49C6);
+ rtl_mac_ocp_write(hw, 0xF860, 0xF107);
+ rtl_mac_ocp_write(hw, 0xF862, 0x48C8);
+ rtl_mac_ocp_write(hw, 0xF864, 0x48C9);
+ rtl_mac_ocp_write(hw, 0xF866, 0xE011);
+ rtl_mac_ocp_write(hw, 0xF868, 0x48C9);
+ rtl_mac_ocp_write(hw, 0xF86A, 0x4848);
+ rtl_mac_ocp_write(hw, 0xF86C, 0xE00E);
+ rtl_mac_ocp_write(hw, 0xF86E, 0x4848);
+ rtl_mac_ocp_write(hw, 0xF870, 0x49C7);
+ rtl_mac_ocp_write(hw, 0xF872, 0xF00A);
+ rtl_mac_ocp_write(hw, 0xF874, 0x48C9);
+ rtl_mac_ocp_write(hw, 0xF876, 0xC60D);
+ rtl_mac_ocp_write(hw, 0xF878, 0x1D1F);
+ rtl_mac_ocp_write(hw, 0xF87A, 0x8DC2);
+ rtl_mac_ocp_write(hw, 0xF87C, 0x1D00);
+ rtl_mac_ocp_write(hw, 0xF87E, 0x8DC3);
+ rtl_mac_ocp_write(hw, 0xF880, 0x1D11);
+ rtl_mac_ocp_write(hw, 0xF882, 0x8DC0);
+ rtl_mac_ocp_write(hw, 0xF884, 0xE002);
+ rtl_mac_ocp_write(hw, 0xF886, 0x4849);
+ rtl_mac_ocp_write(hw, 0xF888, 0x94E5);
+ rtl_mac_ocp_write(hw, 0xF88A, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF88C, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF88E, 0x0238);
+ rtl_mac_ocp_write(hw, 0xF890, 0xE434);
+ rtl_mac_ocp_write(hw, 0xF892, 0x49D9);
+ rtl_mac_ocp_write(hw, 0xF894, 0xF01B);
+ rtl_mac_ocp_write(hw, 0xF896, 0xC31E);
+ rtl_mac_ocp_write(hw, 0xF898, 0x7464);
+ rtl_mac_ocp_write(hw, 0xF89A, 0x49C4);
+ rtl_mac_ocp_write(hw, 0xF89C, 0xF114);
+ rtl_mac_ocp_write(hw, 0xF89E, 0xC31B);
+ rtl_mac_ocp_write(hw, 0xF8A0, 0x6460);
+ rtl_mac_ocp_write(hw, 0xF8A2, 0x14FA);
+ rtl_mac_ocp_write(hw, 0xF8A4, 0xFA02);
+ rtl_mac_ocp_write(hw, 0xF8A6, 0xE00F);
+ rtl_mac_ocp_write(hw, 0xF8A8, 0xC317);
+ rtl_mac_ocp_write(hw, 0xF8AA, 0x7460);
+ rtl_mac_ocp_write(hw, 0xF8AC, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF8AE, 0xF10B);
+ rtl_mac_ocp_write(hw, 0xF8B0, 0xC311);
+ rtl_mac_ocp_write(hw, 0xF8B2, 0x7462);
+ rtl_mac_ocp_write(hw, 0xF8B4, 0x48C1);
+ rtl_mac_ocp_write(hw, 0xF8B6, 0x9C62);
+ rtl_mac_ocp_write(hw, 0xF8B8, 0x4841);
+ rtl_mac_ocp_write(hw, 0xF8BA, 0x9C62);
+ rtl_mac_ocp_write(hw, 0xF8BC, 0xC30A);
+ rtl_mac_ocp_write(hw, 0xF8BE, 0x1C04);
+ rtl_mac_ocp_write(hw, 0xF8C0, 0x8C60);
+ rtl_mac_ocp_write(hw, 0xF8C2, 0xE004);
+ rtl_mac_ocp_write(hw, 0xF8C4, 0x1C15);
+ rtl_mac_ocp_write(hw, 0xF8C6, 0xC305);
+ rtl_mac_ocp_write(hw, 0xF8C8, 0x8C60);
+ rtl_mac_ocp_write(hw, 0xF8CA, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF8CC, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF8CE, 0x0374);
+ rtl_mac_ocp_write(hw, 0xF8D0, 0xE434);
+ rtl_mac_ocp_write(hw, 0xF8D2, 0xE030);
+ rtl_mac_ocp_write(hw, 0xF8D4, 0xE61C);
+ rtl_mac_ocp_write(hw, 0xF8D6, 0xE906);
+ rtl_mac_ocp_write(hw, 0xF8D8, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF8DA, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF8DC, 0x0000);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0493);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0205);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0589);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x0647);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x0215);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x0285);
+}
+
+/* ------------------------------------MAC 8168GU2------------------------------------- */
+
+static void
+rtl8168_set_mac_mcu_8168gu_2(struct rtl_hw *hw)
+{
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ rtl_mac_ocp_write(hw, 0xF800, 0xE008);
+ rtl_mac_ocp_write(hw, 0xF802, 0xE00A);
+ rtl_mac_ocp_write(hw, 0xF804, 0xE00D);
+ rtl_mac_ocp_write(hw, 0xF806, 0xE02F);
+ rtl_mac_ocp_write(hw, 0xF808, 0xE031);
+ rtl_mac_ocp_write(hw, 0xF80A, 0xE038);
+ rtl_mac_ocp_write(hw, 0xF80C, 0xE03A);
+ rtl_mac_ocp_write(hw, 0xF80E, 0xE051);
+ rtl_mac_ocp_write(hw, 0xF810, 0xC202);
+ rtl_mac_ocp_write(hw, 0xF812, 0xBA00);
+ rtl_mac_ocp_write(hw, 0xF814, 0x0DFC);
+ rtl_mac_ocp_write(hw, 0xF816, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF818, 0xC502);
+ rtl_mac_ocp_write(hw, 0xF81A, 0xBD00);
+ rtl_mac_ocp_write(hw, 0xF81C, 0x0A30);
+ rtl_mac_ocp_write(hw, 0xF81E, 0x49D9);
+ rtl_mac_ocp_write(hw, 0xF820, 0xF019);
+ rtl_mac_ocp_write(hw, 0xF822, 0xC520);
+ rtl_mac_ocp_write(hw, 0xF824, 0x64A5);
+ rtl_mac_ocp_write(hw, 0xF826, 0x1400);
+ rtl_mac_ocp_write(hw, 0xF828, 0xF007);
+ rtl_mac_ocp_write(hw, 0xF82A, 0x0C01);
+ rtl_mac_ocp_write(hw, 0xF82C, 0x8CA5);
+ rtl_mac_ocp_write(hw, 0xF82E, 0x1C15);
+ rtl_mac_ocp_write(hw, 0xF830, 0xC515);
+ rtl_mac_ocp_write(hw, 0xF832, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xF834, 0xE00F);
+ rtl_mac_ocp_write(hw, 0xF836, 0xC513);
+ rtl_mac_ocp_write(hw, 0xF838, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xF83A, 0x48C8);
+ rtl_mac_ocp_write(hw, 0xF83C, 0x48CA);
+ rtl_mac_ocp_write(hw, 0xF83E, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xF840, 0xC510);
+ rtl_mac_ocp_write(hw, 0xF842, 0x1B00);
+ rtl_mac_ocp_write(hw, 0xF844, 0x9BA0);
+ rtl_mac_ocp_write(hw, 0xF846, 0x1B1C);
+ rtl_mac_ocp_write(hw, 0xF848, 0x483F);
+ rtl_mac_ocp_write(hw, 0xF84A, 0x9BA2);
+ rtl_mac_ocp_write(hw, 0xF84C, 0x1B04);
+ rtl_mac_ocp_write(hw, 0xF84E, 0xC506);
+ rtl_mac_ocp_write(hw, 0xF850, 0x9BA0);
+ rtl_mac_ocp_write(hw, 0xF852, 0xC603);
+ rtl_mac_ocp_write(hw, 0xF854, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF856, 0x0298);
+ rtl_mac_ocp_write(hw, 0xF858, 0x03DE);
+ rtl_mac_ocp_write(hw, 0xF85A, 0xE434);
+ rtl_mac_ocp_write(hw, 0xF85C, 0xE096);
+ rtl_mac_ocp_write(hw, 0xF85E, 0xE860);
+ rtl_mac_ocp_write(hw, 0xF860, 0xDE20);
+ rtl_mac_ocp_write(hw, 0xF862, 0xD3C0);
+ rtl_mac_ocp_write(hw, 0xF864, 0xC602);
+ rtl_mac_ocp_write(hw, 0xF866, 0xBE00);
+ rtl_mac_ocp_write(hw, 0xF868, 0x0A64);
+ rtl_mac_ocp_write(hw, 0xF86A, 0xC707);
+ rtl_mac_ocp_write(hw, 0xF86C, 0x1D00);
+ rtl_mac_ocp_write(hw, 0xF86E, 0x8DE2);
+ rtl_mac_ocp_write(hw, 0xF870, 0x48C1);
+ rtl_mac_ocp_write(hw, 0xF872, 0xC502);
+ rtl_mac_ocp_write(hw, 0xF874, 0xBD00);
+ rtl_mac_ocp_write(hw, 0xF876, 0x00AA);
+ rtl_mac_ocp_write(hw, 0xF878, 0xE0C0);
+ rtl_mac_ocp_write(hw, 0xF87A, 0xC502);
+ rtl_mac_ocp_write(hw, 0xF87C, 0xBD00);
+ rtl_mac_ocp_write(hw, 0xF87E, 0x0132);
+ rtl_mac_ocp_write(hw, 0xF880, 0xC50C);
+ rtl_mac_ocp_write(hw, 0xF882, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xF884, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xF886, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xF888, 0x1C00);
+ rtl_mac_ocp_write(hw, 0xF88A, 0x9EA0);
+ rtl_mac_ocp_write(hw, 0xF88C, 0x1C1C);
+ rtl_mac_ocp_write(hw, 0xF88E, 0x484F);
+ rtl_mac_ocp_write(hw, 0xF890, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xF892, 0xC402);
+ rtl_mac_ocp_write(hw, 0xF894, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xF896, 0x0AFA);
+ rtl_mac_ocp_write(hw, 0xF898, 0xDE20);
+ rtl_mac_ocp_write(hw, 0xF89A, 0xE000);
+ rtl_mac_ocp_write(hw, 0xF89C, 0xE092);
+ rtl_mac_ocp_write(hw, 0xF89E, 0xE430);
+ rtl_mac_ocp_write(hw, 0xF8A0, 0xDE20);
+ rtl_mac_ocp_write(hw, 0xF8A2, 0xE0C0);
+ rtl_mac_ocp_write(hw, 0xF8A4, 0xE860);
+ rtl_mac_ocp_write(hw, 0xF8A6, 0xE84C);
+ rtl_mac_ocp_write(hw, 0xF8A8, 0xB400);
+ rtl_mac_ocp_write(hw, 0xF8AA, 0xB430);
+ rtl_mac_ocp_write(hw, 0xF8AC, 0xE410);
+ rtl_mac_ocp_write(hw, 0xF8AE, 0xC0AE);
+ rtl_mac_ocp_write(hw, 0xF8B0, 0xB407);
+ rtl_mac_ocp_write(hw, 0xF8B2, 0xB406);
+ rtl_mac_ocp_write(hw, 0xF8B4, 0xB405);
+ rtl_mac_ocp_write(hw, 0xF8B6, 0xB404);
+ rtl_mac_ocp_write(hw, 0xF8B8, 0xB403);
+ rtl_mac_ocp_write(hw, 0xF8BA, 0xB402);
+ rtl_mac_ocp_write(hw, 0xF8BC, 0xB401);
+ rtl_mac_ocp_write(hw, 0xF8BE, 0xC7EE);
+ rtl_mac_ocp_write(hw, 0xF8C0, 0x76F4);
+ rtl_mac_ocp_write(hw, 0xF8C2, 0xC2ED);
+ rtl_mac_ocp_write(hw, 0xF8C4, 0xC3ED);
+ rtl_mac_ocp_write(hw, 0xF8C6, 0xC1EF);
+ rtl_mac_ocp_write(hw, 0xF8C8, 0xC5F3);
+ rtl_mac_ocp_write(hw, 0xF8CA, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xF8CC, 0x49CD);
+ rtl_mac_ocp_write(hw, 0xF8CE, 0xF001);
+ rtl_mac_ocp_write(hw, 0xF8D0, 0xC5EE);
+ rtl_mac_ocp_write(hw, 0xF8D2, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xF8D4, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF8D6, 0xF105);
+ rtl_mac_ocp_write(hw, 0xF8D8, 0xC5E4);
+ rtl_mac_ocp_write(hw, 0xF8DA, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xF8DC, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xF8DE, 0xF00B);
+ rtl_mac_ocp_write(hw, 0xF8E0, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF8E2, 0x484B);
+ rtl_mac_ocp_write(hw, 0xF8E4, 0x9C44);
+ rtl_mac_ocp_write(hw, 0xF8E6, 0x1C10);
+ rtl_mac_ocp_write(hw, 0xF8E8, 0x9C62);
+ rtl_mac_ocp_write(hw, 0xF8EA, 0x1C11);
+ rtl_mac_ocp_write(hw, 0xF8EC, 0x8C60);
+ rtl_mac_ocp_write(hw, 0xF8EE, 0x1C00);
+ rtl_mac_ocp_write(hw, 0xF8F0, 0x9CF6);
+ rtl_mac_ocp_write(hw, 0xF8F2, 0xE0EC);
+ rtl_mac_ocp_write(hw, 0xF8F4, 0x49E7);
+ rtl_mac_ocp_write(hw, 0xF8F6, 0xF016);
+ rtl_mac_ocp_write(hw, 0xF8F8, 0x1D80);
+ rtl_mac_ocp_write(hw, 0xF8FA, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xF8FC, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF8FE, 0x4843);
+ rtl_mac_ocp_write(hw, 0xF900, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF902, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF904, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF906, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF908, 0x48C8);
+ rtl_mac_ocp_write(hw, 0xF90A, 0x48C9);
+ rtl_mac_ocp_write(hw, 0xF90C, 0x48CA);
+ rtl_mac_ocp_write(hw, 0xF90E, 0x9C44);
+ rtl_mac_ocp_write(hw, 0xF910, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF912, 0x4844);
+ rtl_mac_ocp_write(hw, 0xF914, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF916, 0x1E01);
+ rtl_mac_ocp_write(hw, 0xF918, 0xE8DB);
+ rtl_mac_ocp_write(hw, 0xF91A, 0x7420);
+ rtl_mac_ocp_write(hw, 0xF91C, 0x48C1);
+ rtl_mac_ocp_write(hw, 0xF91E, 0x9C20);
+ rtl_mac_ocp_write(hw, 0xF920, 0xE0D5);
+ rtl_mac_ocp_write(hw, 0xF922, 0x49E6);
+ rtl_mac_ocp_write(hw, 0xF924, 0xF02A);
+ rtl_mac_ocp_write(hw, 0xF926, 0x1D40);
+ rtl_mac_ocp_write(hw, 0xF928, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xF92A, 0x74FC);
+ rtl_mac_ocp_write(hw, 0xF92C, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF92E, 0xF124);
+ rtl_mac_ocp_write(hw, 0xF930, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF932, 0xF122);
+ rtl_mac_ocp_write(hw, 0xF934, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF936, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF938, 0xF01F);
+ rtl_mac_ocp_write(hw, 0xF93A, 0xE8D3);
+ rtl_mac_ocp_write(hw, 0xF93C, 0x48C4);
+ rtl_mac_ocp_write(hw, 0xF93E, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF940, 0x1E00);
+ rtl_mac_ocp_write(hw, 0xF942, 0xE8C6);
+ rtl_mac_ocp_write(hw, 0xF944, 0xC5B1);
+ rtl_mac_ocp_write(hw, 0xF946, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xF948, 0x49C3);
+ rtl_mac_ocp_write(hw, 0xF94A, 0xF016);
+ rtl_mac_ocp_write(hw, 0xF94C, 0xC5AF);
+ rtl_mac_ocp_write(hw, 0xF94E, 0x74A4);
+ rtl_mac_ocp_write(hw, 0xF950, 0x49C2);
+ rtl_mac_ocp_write(hw, 0xF952, 0xF005);
+ rtl_mac_ocp_write(hw, 0xF954, 0xC5AA);
+ rtl_mac_ocp_write(hw, 0xF956, 0x74B2);
+ rtl_mac_ocp_write(hw, 0xF958, 0x49C9);
+ rtl_mac_ocp_write(hw, 0xF95A, 0xF10E);
+ rtl_mac_ocp_write(hw, 0xF95C, 0xC5A6);
+ rtl_mac_ocp_write(hw, 0xF95E, 0x74A8);
+ rtl_mac_ocp_write(hw, 0xF960, 0x4845);
+ rtl_mac_ocp_write(hw, 0xF962, 0x4846);
+ rtl_mac_ocp_write(hw, 0xF964, 0x4847);
+ rtl_mac_ocp_write(hw, 0xF966, 0x4848);
+ rtl_mac_ocp_write(hw, 0xF968, 0x9CA8);
+ rtl_mac_ocp_write(hw, 0xF96A, 0x74B2);
+ rtl_mac_ocp_write(hw, 0xF96C, 0x4849);
+ rtl_mac_ocp_write(hw, 0xF96E, 0x9CB2);
+ rtl_mac_ocp_write(hw, 0xF970, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xF972, 0x484F);
+ rtl_mac_ocp_write(hw, 0xF974, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xF976, 0xE0AA);
+ rtl_mac_ocp_write(hw, 0xF978, 0x49E4);
+ rtl_mac_ocp_write(hw, 0xF97A, 0xF018);
+ rtl_mac_ocp_write(hw, 0xF97C, 0x1D10);
+ rtl_mac_ocp_write(hw, 0xF97E, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xF980, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF982, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF984, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF986, 0x4843);
+ rtl_mac_ocp_write(hw, 0xF988, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF98A, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF98C, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF98E, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF990, 0x4844);
+ rtl_mac_ocp_write(hw, 0xF992, 0x4842);
+ rtl_mac_ocp_write(hw, 0xF994, 0x4841);
+ rtl_mac_ocp_write(hw, 0xF996, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF998, 0x1E01);
+ rtl_mac_ocp_write(hw, 0xF99A, 0xE89A);
+ rtl_mac_ocp_write(hw, 0xF99C, 0x7420);
+ rtl_mac_ocp_write(hw, 0xF99E, 0x4841);
+ rtl_mac_ocp_write(hw, 0xF9A0, 0x9C20);
+ rtl_mac_ocp_write(hw, 0xF9A2, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF9A4, 0x4848);
+ rtl_mac_ocp_write(hw, 0xF9A6, 0x9C44);
+ rtl_mac_ocp_write(hw, 0xF9A8, 0xE091);
+ rtl_mac_ocp_write(hw, 0xF9AA, 0x49E5);
+ rtl_mac_ocp_write(hw, 0xF9AC, 0xF03E);
+ rtl_mac_ocp_write(hw, 0xF9AE, 0x1D20);
+ rtl_mac_ocp_write(hw, 0xF9B0, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xF9B2, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF9B4, 0x48C2);
+ rtl_mac_ocp_write(hw, 0xF9B6, 0x4841);
+ rtl_mac_ocp_write(hw, 0xF9B8, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF9BA, 0x1E01);
+ rtl_mac_ocp_write(hw, 0xF9BC, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF9BE, 0x49CA);
+ rtl_mac_ocp_write(hw, 0xF9C0, 0xF103);
+ rtl_mac_ocp_write(hw, 0xF9C2, 0x49C2);
+ rtl_mac_ocp_write(hw, 0xF9C4, 0xF00C);
+ rtl_mac_ocp_write(hw, 0xF9C6, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF9C8, 0xF004);
+ rtl_mac_ocp_write(hw, 0xF9CA, 0x6447);
+ rtl_mac_ocp_write(hw, 0xF9CC, 0x2244);
+ rtl_mac_ocp_write(hw, 0xF9CE, 0xE002);
+ rtl_mac_ocp_write(hw, 0xF9D0, 0x1C01);
+ rtl_mac_ocp_write(hw, 0xF9D2, 0x9C62);
+ rtl_mac_ocp_write(hw, 0xF9D4, 0x1C11);
+ rtl_mac_ocp_write(hw, 0xF9D6, 0x8C60);
+ rtl_mac_ocp_write(hw, 0xF9D8, 0x1C00);
+ rtl_mac_ocp_write(hw, 0xF9DA, 0x9CF6);
+ rtl_mac_ocp_write(hw, 0xF9DC, 0x7444);
+ rtl_mac_ocp_write(hw, 0xF9DE, 0x49C8);
+ rtl_mac_ocp_write(hw, 0xF9E0, 0xF01D);
+ rtl_mac_ocp_write(hw, 0xF9E2, 0x74FC);
+ rtl_mac_ocp_write(hw, 0xF9E4, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF9E6, 0xF11A);
+ rtl_mac_ocp_write(hw, 0xF9E8, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xF9EA, 0xF118);
+ rtl_mac_ocp_write(hw, 0xF9EC, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xF9EE, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xF9F0, 0xF015);
+ rtl_mac_ocp_write(hw, 0xF9F2, 0x49C6);
+ rtl_mac_ocp_write(hw, 0xF9F4, 0xF113);
+ rtl_mac_ocp_write(hw, 0xF9F6, 0xE875);
+ rtl_mac_ocp_write(hw, 0xF9F8, 0x48C4);
+ rtl_mac_ocp_write(hw, 0xF9FA, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xF9FC, 0x7420);
+ rtl_mac_ocp_write(hw, 0xF9FE, 0x48C1);
+ rtl_mac_ocp_write(hw, 0xFA00, 0x9C20);
+ rtl_mac_ocp_write(hw, 0xFA02, 0xC50A);
+ rtl_mac_ocp_write(hw, 0xFA04, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFA06, 0x8CA5);
+ rtl_mac_ocp_write(hw, 0xFA08, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xFA0A, 0xC505);
+ rtl_mac_ocp_write(hw, 0xFA0C, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xFA0E, 0x1C11);
+ rtl_mac_ocp_write(hw, 0xFA10, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xFA12, 0xE00A);
+ rtl_mac_ocp_write(hw, 0xFA14, 0xE434);
+ rtl_mac_ocp_write(hw, 0xFA16, 0xD3C0);
+ rtl_mac_ocp_write(hw, 0xFA18, 0xDC00);
+ rtl_mac_ocp_write(hw, 0xFA1A, 0x7444);
+ rtl_mac_ocp_write(hw, 0xFA1C, 0x49CA);
+ rtl_mac_ocp_write(hw, 0xFA1E, 0xF004);
+ rtl_mac_ocp_write(hw, 0xFA20, 0x48CA);
+ rtl_mac_ocp_write(hw, 0xFA22, 0x9C44);
+ rtl_mac_ocp_write(hw, 0xFA24, 0xE855);
+ rtl_mac_ocp_write(hw, 0xFA26, 0xE052);
+ rtl_mac_ocp_write(hw, 0xFA28, 0x49E8);
+ rtl_mac_ocp_write(hw, 0xFA2A, 0xF024);
+ rtl_mac_ocp_write(hw, 0xFA2C, 0x1D01);
+ rtl_mac_ocp_write(hw, 0xFA2E, 0x8DF5);
+ rtl_mac_ocp_write(hw, 0xFA30, 0x7440);
+ rtl_mac_ocp_write(hw, 0xFA32, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xFA34, 0xF11E);
+ rtl_mac_ocp_write(hw, 0xFA36, 0x7444);
+ rtl_mac_ocp_write(hw, 0xFA38, 0x49C8);
+ rtl_mac_ocp_write(hw, 0xFA3A, 0xF01B);
+ rtl_mac_ocp_write(hw, 0xFA3C, 0x49CA);
+ rtl_mac_ocp_write(hw, 0xFA3E, 0xF119);
+ rtl_mac_ocp_write(hw, 0xFA40, 0xC5EC);
+ rtl_mac_ocp_write(hw, 0xFA42, 0x76A4);
+ rtl_mac_ocp_write(hw, 0xFA44, 0x49E3);
+ rtl_mac_ocp_write(hw, 0xFA46, 0xF015);
+ rtl_mac_ocp_write(hw, 0xFA48, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xFA4A, 0xF103);
+ rtl_mac_ocp_write(hw, 0xFA4C, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xFA4E, 0xF011);
+ rtl_mac_ocp_write(hw, 0xFA50, 0x4849);
+ rtl_mac_ocp_write(hw, 0xFA52, 0x9C44);
+ rtl_mac_ocp_write(hw, 0xFA54, 0x1C00);
+ rtl_mac_ocp_write(hw, 0xFA56, 0x9CF6);
+ rtl_mac_ocp_write(hw, 0xFA58, 0x7444);
+ rtl_mac_ocp_write(hw, 0xFA5A, 0x49C1);
+ rtl_mac_ocp_write(hw, 0xFA5C, 0xF004);
+ rtl_mac_ocp_write(hw, 0xFA5E, 0x6446);
+ rtl_mac_ocp_write(hw, 0xFA60, 0x1E07);
+ rtl_mac_ocp_write(hw, 0xFA62, 0xE003);
+ rtl_mac_ocp_write(hw, 0xFA64, 0x1C01);
+ rtl_mac_ocp_write(hw, 0xFA66, 0x1E03);
+ rtl_mac_ocp_write(hw, 0xFA68, 0x9C62);
+ rtl_mac_ocp_write(hw, 0xFA6A, 0x1C11);
+ rtl_mac_ocp_write(hw, 0xFA6C, 0x8C60);
+ rtl_mac_ocp_write(hw, 0xFA6E, 0xE830);
+ rtl_mac_ocp_write(hw, 0xFA70, 0xE02D);
+ rtl_mac_ocp_write(hw, 0xFA72, 0x49E9);
+ rtl_mac_ocp_write(hw, 0xFA74, 0xF004);
+ rtl_mac_ocp_write(hw, 0xFA76, 0x1D02);
+ rtl_mac_ocp_write(hw, 0xFA78, 0x8DF5);
+ rtl_mac_ocp_write(hw, 0xFA7A, 0xE79C);
+ rtl_mac_ocp_write(hw, 0xFA7C, 0x49E3);
+ rtl_mac_ocp_write(hw, 0xFA7E, 0xF006);
+ rtl_mac_ocp_write(hw, 0xFA80, 0x1D08);
+ rtl_mac_ocp_write(hw, 0xFA82, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xFA84, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xFA86, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xFA88, 0xE73A);
+ rtl_mac_ocp_write(hw, 0xFA8A, 0x49E1);
+ rtl_mac_ocp_write(hw, 0xFA8C, 0xF007);
+ rtl_mac_ocp_write(hw, 0xFA8E, 0x1D02);
+ rtl_mac_ocp_write(hw, 0xFA90, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xFA92, 0x1E01);
+ rtl_mac_ocp_write(hw, 0xFA94, 0xE7A7);
+ rtl_mac_ocp_write(hw, 0xFA96, 0xDE20);
+ rtl_mac_ocp_write(hw, 0xFA98, 0xE410);
+ rtl_mac_ocp_write(hw, 0xFA9A, 0x49E0);
+ rtl_mac_ocp_write(hw, 0xFA9C, 0xF017);
+ rtl_mac_ocp_write(hw, 0xFA9E, 0x1D01);
+ rtl_mac_ocp_write(hw, 0xFAA0, 0x8DF4);
+ rtl_mac_ocp_write(hw, 0xFAA2, 0xC5FA);
+ rtl_mac_ocp_write(hw, 0xFAA4, 0x1C00);
+ rtl_mac_ocp_write(hw, 0xFAA6, 0x8CA0);
+ rtl_mac_ocp_write(hw, 0xFAA8, 0x1C1B);
+ rtl_mac_ocp_write(hw, 0xFAAA, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xFAAC, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFAAE, 0x49CF);
+ rtl_mac_ocp_write(hw, 0xFAB0, 0xF0FE);
+ rtl_mac_ocp_write(hw, 0xFAB2, 0xC5F3);
+ rtl_mac_ocp_write(hw, 0xFAB4, 0x74A0);
+ rtl_mac_ocp_write(hw, 0xFAB6, 0x4849);
+ rtl_mac_ocp_write(hw, 0xFAB8, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xFABA, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xFABC, 0x49C0);
+ rtl_mac_ocp_write(hw, 0xFABE, 0xF006);
+ rtl_mac_ocp_write(hw, 0xFAC0, 0x48C3);
+ rtl_mac_ocp_write(hw, 0xFAC2, 0x8CF8);
+ rtl_mac_ocp_write(hw, 0xFAC4, 0xE820);
+ rtl_mac_ocp_write(hw, 0xFAC6, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xFAC8, 0x74F8);
+ rtl_mac_ocp_write(hw, 0xFACA, 0xC432);
+ rtl_mac_ocp_write(hw, 0xFACC, 0xBC00);
+ rtl_mac_ocp_write(hw, 0xFACE, 0xC5E4);
+ rtl_mac_ocp_write(hw, 0xFAD0, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFAD2, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xFAD4, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xFAD6, 0x9EA0);
+ rtl_mac_ocp_write(hw, 0xFAD8, 0x1C1C);
+ rtl_mac_ocp_write(hw, 0xFADA, 0x484F);
+ rtl_mac_ocp_write(hw, 0xFADC, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xFADE, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xFAE0, 0xB404);
+ rtl_mac_ocp_write(hw, 0xFAE2, 0xB405);
+ rtl_mac_ocp_write(hw, 0xFAE4, 0xC5D9);
+ rtl_mac_ocp_write(hw, 0xFAE6, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFAE8, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xFAEA, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xFAEC, 0xC41F);
+ rtl_mac_ocp_write(hw, 0xFAEE, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xFAF0, 0xC41C);
+ rtl_mac_ocp_write(hw, 0xFAF2, 0x1C13);
+ rtl_mac_ocp_write(hw, 0xFAF4, 0x484F);
+ rtl_mac_ocp_write(hw, 0xFAF6, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xFAF8, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFAFA, 0x49CF);
+ rtl_mac_ocp_write(hw, 0xFAFC, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xFAFE, 0xB005);
+ rtl_mac_ocp_write(hw, 0xFB00, 0xB004);
+ rtl_mac_ocp_write(hw, 0xFB02, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xFB04, 0xB404);
+ rtl_mac_ocp_write(hw, 0xFB06, 0xB405);
+ rtl_mac_ocp_write(hw, 0xFB08, 0xC5C7);
+ rtl_mac_ocp_write(hw, 0xFB0A, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFB0C, 0x49CE);
+ rtl_mac_ocp_write(hw, 0xFB0E, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xFB10, 0xC40E);
+ rtl_mac_ocp_write(hw, 0xFB12, 0x9CA0);
+ rtl_mac_ocp_write(hw, 0xFB14, 0xC40A);
+ rtl_mac_ocp_write(hw, 0xFB16, 0x1C13);
+ rtl_mac_ocp_write(hw, 0xFB18, 0x484F);
+ rtl_mac_ocp_write(hw, 0xFB1A, 0x9CA2);
+ rtl_mac_ocp_write(hw, 0xFB1C, 0x74A2);
+ rtl_mac_ocp_write(hw, 0xFB1E, 0x49CF);
+ rtl_mac_ocp_write(hw, 0xFB20, 0xF1FE);
+ rtl_mac_ocp_write(hw, 0xFB22, 0xB005);
+ rtl_mac_ocp_write(hw, 0xFB24, 0xB004);
+ rtl_mac_ocp_write(hw, 0xFB26, 0xFF80);
+ rtl_mac_ocp_write(hw, 0xFB28, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFB2A, 0x0481);
+ rtl_mac_ocp_write(hw, 0xFB2C, 0x0C81);
+ rtl_mac_ocp_write(hw, 0xFB2E, 0x0AE0);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x0297);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x00A9);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x012D);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC36, 0x08DF);
+}
+
+/* ------------------------------------PHY 8168G------------------------------------- */
+
+static void
+rtl8168_set_phy_mcu_8168g_1(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x2300);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0290);
+ rtl_mdio_write(hw, 0x13, 0xA012);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA014);
+ rtl_mdio_write(hw, 0x14, 0x2c04);
+ rtl_mdio_write(hw, 0x14, 0x2c0c);
+ rtl_mdio_write(hw, 0x14, 0x2c6c);
+ rtl_mdio_write(hw, 0x14, 0x2d0d);
+ rtl_mdio_write(hw, 0x14, 0x31ce);
+ rtl_mdio_write(hw, 0x14, 0x506d);
+ rtl_mdio_write(hw, 0x14, 0xd708);
+ rtl_mdio_write(hw, 0x14, 0x3108);
+ rtl_mdio_write(hw, 0x14, 0x106d);
+ rtl_mdio_write(hw, 0x14, 0x1560);
+ rtl_mdio_write(hw, 0x14, 0x15a9);
+ rtl_mdio_write(hw, 0x14, 0x206e);
+ rtl_mdio_write(hw, 0x14, 0x175b);
+ rtl_mdio_write(hw, 0x14, 0x6062);
+ rtl_mdio_write(hw, 0x14, 0xd700);
+ rtl_mdio_write(hw, 0x14, 0x5fae);
+ rtl_mdio_write(hw, 0x14, 0xd708);
+ rtl_mdio_write(hw, 0x14, 0x3107);
+ rtl_mdio_write(hw, 0x14, 0x4c1e);
+ rtl_mdio_write(hw, 0x14, 0x4169);
+ rtl_mdio_write(hw, 0x14, 0x316a);
+ rtl_mdio_write(hw, 0x14, 0x0c19);
+ rtl_mdio_write(hw, 0x14, 0x31aa);
+ rtl_mdio_write(hw, 0x14, 0x0c19);
+ rtl_mdio_write(hw, 0x14, 0x2c1b);
+ rtl_mdio_write(hw, 0x14, 0x5e62);
+ rtl_mdio_write(hw, 0x14, 0x26b5);
+ rtl_mdio_write(hw, 0x14, 0x31ab);
+ rtl_mdio_write(hw, 0x14, 0x5c1e);
+ rtl_mdio_write(hw, 0x14, 0x2c0c);
+ rtl_mdio_write(hw, 0x14, 0xc040);
+ rtl_mdio_write(hw, 0x14, 0x8808);
+ rtl_mdio_write(hw, 0x14, 0xc520);
+ rtl_mdio_write(hw, 0x14, 0xc421);
+ rtl_mdio_write(hw, 0x14, 0xd05a);
+ rtl_mdio_write(hw, 0x14, 0xd19a);
+ rtl_mdio_write(hw, 0x14, 0xd709);
+ rtl_mdio_write(hw, 0x14, 0x608f);
+ rtl_mdio_write(hw, 0x14, 0xd06b);
+ rtl_mdio_write(hw, 0x14, 0xd18a);
+ rtl_mdio_write(hw, 0x14, 0x2c2c);
+ rtl_mdio_write(hw, 0x14, 0xd0be);
+ rtl_mdio_write(hw, 0x14, 0xd188);
+ rtl_mdio_write(hw, 0x14, 0x2c2c);
+ rtl_mdio_write(hw, 0x14, 0xd708);
+ rtl_mdio_write(hw, 0x14, 0x4072);
+ rtl_mdio_write(hw, 0x14, 0xc104);
+ rtl_mdio_write(hw, 0x14, 0x2c3e);
+ rtl_mdio_write(hw, 0x14, 0x4076);
+ rtl_mdio_write(hw, 0x14, 0xc110);
+ rtl_mdio_write(hw, 0x14, 0x2c3e);
+ rtl_mdio_write(hw, 0x14, 0x4071);
+ rtl_mdio_write(hw, 0x14, 0xc102);
+ rtl_mdio_write(hw, 0x14, 0x2c3e);
+ rtl_mdio_write(hw, 0x14, 0x4070);
+ rtl_mdio_write(hw, 0x14, 0xc101);
+ rtl_mdio_write(hw, 0x14, 0x2c3e);
+ rtl_mdio_write(hw, 0x14, 0x175b);
+ rtl_mdio_write(hw, 0x14, 0xd709);
+ rtl_mdio_write(hw, 0x14, 0x3390);
+ rtl_mdio_write(hw, 0x14, 0x5c39);
+ rtl_mdio_write(hw, 0x14, 0x2c4e);
+ rtl_mdio_write(hw, 0x14, 0x175b);
+ rtl_mdio_write(hw, 0x14, 0xd708);
+ rtl_mdio_write(hw, 0x14, 0x6193);
+ rtl_mdio_write(hw, 0x14, 0xd709);
+ rtl_mdio_write(hw, 0x14, 0x5f9d);
+ rtl_mdio_write(hw, 0x14, 0x408b);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x6042);
+ rtl_mdio_write(hw, 0x14, 0xb401);
+ rtl_mdio_write(hw, 0x14, 0x175b);
+ rtl_mdio_write(hw, 0x14, 0xd708);
+ rtl_mdio_write(hw, 0x14, 0x6073);
+ rtl_mdio_write(hw, 0x14, 0x5fbc);
+ rtl_mdio_write(hw, 0x14, 0x2c4d);
+ rtl_mdio_write(hw, 0x14, 0x26ed);
+ rtl_mdio_write(hw, 0x14, 0xb280);
+ rtl_mdio_write(hw, 0x14, 0xa841);
+ rtl_mdio_write(hw, 0x14, 0x9420);
+ rtl_mdio_write(hw, 0x14, 0x8710);
+ rtl_mdio_write(hw, 0x14, 0xd709);
+ rtl_mdio_write(hw, 0x14, 0x42ec);
+ rtl_mdio_write(hw, 0x14, 0x606d);
+ rtl_mdio_write(hw, 0x14, 0xd207);
+ rtl_mdio_write(hw, 0x14, 0x2c57);
+ rtl_mdio_write(hw, 0x14, 0xd203);
+ rtl_mdio_write(hw, 0x14, 0x33ff);
+ rtl_mdio_write(hw, 0x14, 0x563b);
+ rtl_mdio_write(hw, 0x14, 0x3275);
+ rtl_mdio_write(hw, 0x14, 0x7c5e);
+ rtl_mdio_write(hw, 0x14, 0xb240);
+ rtl_mdio_write(hw, 0x14, 0xb402);
+ rtl_mdio_write(hw, 0x14, 0x263b);
+ rtl_mdio_write(hw, 0x14, 0x6096);
+ rtl_mdio_write(hw, 0x14, 0xb240);
+ rtl_mdio_write(hw, 0x14, 0xb406);
+ rtl_mdio_write(hw, 0x14, 0x263b);
+ rtl_mdio_write(hw, 0x14, 0x31d7);
+ rtl_mdio_write(hw, 0x14, 0x7c67);
+ rtl_mdio_write(hw, 0x14, 0xb240);
+ rtl_mdio_write(hw, 0x14, 0xb40e);
+ rtl_mdio_write(hw, 0x14, 0x263b);
+ rtl_mdio_write(hw, 0x14, 0xb410);
+ rtl_mdio_write(hw, 0x14, 0x8802);
+ rtl_mdio_write(hw, 0x14, 0xb240);
+ rtl_mdio_write(hw, 0x14, 0x940e);
+ rtl_mdio_write(hw, 0x14, 0x263b);
+ rtl_mdio_write(hw, 0x14, 0xba04);
+ rtl_mdio_write(hw, 0x14, 0x1cd6);
+ rtl_mdio_write(hw, 0x14, 0xa902);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x4045);
+ rtl_mdio_write(hw, 0x14, 0xa980);
+ rtl_mdio_write(hw, 0x14, 0x3003);
+ rtl_mdio_write(hw, 0x14, 0x59b1);
+ rtl_mdio_write(hw, 0x14, 0xa540);
+ rtl_mdio_write(hw, 0x14, 0xa601);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4043);
+ rtl_mdio_write(hw, 0x14, 0xa910);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x60a0);
+ rtl_mdio_write(hw, 0x14, 0xca33);
+ rtl_mdio_write(hw, 0x14, 0xcb33);
+ rtl_mdio_write(hw, 0x14, 0xa941);
+ rtl_mdio_write(hw, 0x14, 0x2c82);
+ rtl_mdio_write(hw, 0x14, 0xcaff);
+ rtl_mdio_write(hw, 0x14, 0xcbff);
+ rtl_mdio_write(hw, 0x14, 0xa921);
+ rtl_mdio_write(hw, 0x14, 0xce02);
+ rtl_mdio_write(hw, 0x14, 0xe070);
+ rtl_mdio_write(hw, 0x14, 0x0f10);
+ rtl_mdio_write(hw, 0x14, 0xaf01);
+ rtl_mdio_write(hw, 0x14, 0x8f01);
+ rtl_mdio_write(hw, 0x14, 0x1766);
+ rtl_mdio_write(hw, 0x14, 0x8e02);
+ rtl_mdio_write(hw, 0x14, 0x1787);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x609c);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fa4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0x1ce9);
+ rtl_mdio_write(hw, 0x14, 0xce04);
+ rtl_mdio_write(hw, 0x14, 0xe070);
+ rtl_mdio_write(hw, 0x14, 0x0f20);
+ rtl_mdio_write(hw, 0x14, 0xaf01);
+ rtl_mdio_write(hw, 0x14, 0x8f01);
+ rtl_mdio_write(hw, 0x14, 0x1766);
+ rtl_mdio_write(hw, 0x14, 0x8e04);
+ rtl_mdio_write(hw, 0x14, 0x6044);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0xa520);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4043);
+ rtl_mdio_write(hw, 0x14, 0x2cc1);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0501);
+ rtl_mdio_write(hw, 0x14, 0x1cef);
+ rtl_mdio_write(hw, 0x14, 0xb801);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x4060);
+ rtl_mdio_write(hw, 0x14, 0x7fc4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0x1cf5);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0502);
+ rtl_mdio_write(hw, 0x14, 0x1cef);
+ rtl_mdio_write(hw, 0x14, 0xb802);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x4061);
+ rtl_mdio_write(hw, 0x14, 0x7fc4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0x1cf5);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0504);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6099);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fa4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0xc17f);
+ rtl_mdio_write(hw, 0x14, 0xc200);
+ rtl_mdio_write(hw, 0x14, 0xc43f);
+ rtl_mdio_write(hw, 0x14, 0xcc03);
+ rtl_mdio_write(hw, 0x14, 0xa701);
+ rtl_mdio_write(hw, 0x14, 0xa510);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4018);
+ rtl_mdio_write(hw, 0x14, 0x9910);
+ rtl_mdio_write(hw, 0x14, 0x8510);
+ rtl_mdio_write(hw, 0x14, 0x2860);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0504);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6099);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fa4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0xa608);
+ rtl_mdio_write(hw, 0x14, 0xc17d);
+ rtl_mdio_write(hw, 0x14, 0xc200);
+ rtl_mdio_write(hw, 0x14, 0xc43f);
+ rtl_mdio_write(hw, 0x14, 0xcc03);
+ rtl_mdio_write(hw, 0x14, 0xa701);
+ rtl_mdio_write(hw, 0x14, 0xa510);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4018);
+ rtl_mdio_write(hw, 0x14, 0x9910);
+ rtl_mdio_write(hw, 0x14, 0x8510);
+ rtl_mdio_write(hw, 0x14, 0x2926);
+ rtl_mdio_write(hw, 0x14, 0x1792);
+ rtl_mdio_write(hw, 0x14, 0x27db);
+ rtl_mdio_write(hw, 0x14, 0xc000);
+ rtl_mdio_write(hw, 0x14, 0xc100);
+ rtl_mdio_write(hw, 0x14, 0xc200);
+ rtl_mdio_write(hw, 0x14, 0xc300);
+ rtl_mdio_write(hw, 0x14, 0xc400);
+ rtl_mdio_write(hw, 0x14, 0xc500);
+ rtl_mdio_write(hw, 0x14, 0xc600);
+ rtl_mdio_write(hw, 0x14, 0xc7c1);
+ rtl_mdio_write(hw, 0x14, 0xc800);
+ rtl_mdio_write(hw, 0x14, 0xcc00);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xca0f);
+ rtl_mdio_write(hw, 0x14, 0xcbff);
+ rtl_mdio_write(hw, 0x14, 0xa901);
+ rtl_mdio_write(hw, 0x14, 0x8902);
+ rtl_mdio_write(hw, 0x14, 0xc900);
+ rtl_mdio_write(hw, 0x14, 0xca00);
+ rtl_mdio_write(hw, 0x14, 0xcb00);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xb804);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x6044);
+ rtl_mdio_write(hw, 0x14, 0x9804);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6099);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fa4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xa510);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6098);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fa4);
+ rtl_mdio_write(hw, 0x14, 0x2cd4);
+ rtl_mdio_write(hw, 0x14, 0x8510);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x3003);
+ rtl_mdio_write(hw, 0x14, 0x1d01);
+ rtl_mdio_write(hw, 0x14, 0x2d0b);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x60be);
+ rtl_mdio_write(hw, 0x14, 0xe060);
+ rtl_mdio_write(hw, 0x14, 0x0920);
+ rtl_mdio_write(hw, 0x14, 0x1cd6);
+ rtl_mdio_write(hw, 0x14, 0x2c89);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x3063);
+ rtl_mdio_write(hw, 0x14, 0x1948);
+ rtl_mdio_write(hw, 0x14, 0x288a);
+ rtl_mdio_write(hw, 0x14, 0x1cd6);
+ rtl_mdio_write(hw, 0x14, 0x29bd);
+ rtl_mdio_write(hw, 0x14, 0xa802);
+ rtl_mdio_write(hw, 0x14, 0xa303);
+ rtl_mdio_write(hw, 0x14, 0x843f);
+ rtl_mdio_write(hw, 0x14, 0x81ff);
+ rtl_mdio_write(hw, 0x14, 0x8208);
+ rtl_mdio_write(hw, 0x14, 0xa201);
+ rtl_mdio_write(hw, 0x14, 0xc001);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x30a0);
+ rtl_mdio_write(hw, 0x14, 0x0d1c);
+ rtl_mdio_write(hw, 0x14, 0x30a0);
+ rtl_mdio_write(hw, 0x14, 0x3d13);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7f4c);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0xe003);
+ rtl_mdio_write(hw, 0x14, 0x0202);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6090);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fac);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0xa20c);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6091);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fac);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0x820e);
+ rtl_mdio_write(hw, 0x14, 0xa3e0);
+ rtl_mdio_write(hw, 0x14, 0xa520);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x609d);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fac);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0x8520);
+ rtl_mdio_write(hw, 0x14, 0x6703);
+ rtl_mdio_write(hw, 0x14, 0x2d34);
+ rtl_mdio_write(hw, 0x14, 0xa13e);
+ rtl_mdio_write(hw, 0x14, 0xc001);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x6046);
+ rtl_mdio_write(hw, 0x14, 0x2d0d);
+ rtl_mdio_write(hw, 0x14, 0xa43f);
+ rtl_mdio_write(hw, 0x14, 0xa101);
+ rtl_mdio_write(hw, 0x14, 0xc020);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x3121);
+ rtl_mdio_write(hw, 0x14, 0x0d45);
+ rtl_mdio_write(hw, 0x14, 0x30c0);
+ rtl_mdio_write(hw, 0x14, 0x3d0d);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7f4c);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0xa540);
+ rtl_mdio_write(hw, 0x14, 0xc001);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4001);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0501);
+ rtl_mdio_write(hw, 0x14, 0x1dac);
+ rtl_mdio_write(hw, 0x14, 0xc1c4);
+ rtl_mdio_write(hw, 0x14, 0xa268);
+ rtl_mdio_write(hw, 0x14, 0xa303);
+ rtl_mdio_write(hw, 0x14, 0x8420);
+ rtl_mdio_write(hw, 0x14, 0xe00f);
+ rtl_mdio_write(hw, 0x14, 0x0502);
+ rtl_mdio_write(hw, 0x14, 0x1dac);
+ rtl_mdio_write(hw, 0x14, 0xc002);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x8208);
+ rtl_mdio_write(hw, 0x14, 0x8410);
+ rtl_mdio_write(hw, 0x14, 0xa121);
+ rtl_mdio_write(hw, 0x14, 0xc002);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x8120);
+ rtl_mdio_write(hw, 0x14, 0x8180);
+ rtl_mdio_write(hw, 0x14, 0x1d97);
+ rtl_mdio_write(hw, 0x14, 0xa180);
+ rtl_mdio_write(hw, 0x14, 0xa13a);
+ rtl_mdio_write(hw, 0x14, 0x8240);
+ rtl_mdio_write(hw, 0x14, 0xa430);
+ rtl_mdio_write(hw, 0x14, 0xc010);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x30e1);
+ rtl_mdio_write(hw, 0x14, 0x0abc);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7f8c);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0xa480);
+ rtl_mdio_write(hw, 0x14, 0xa230);
+ rtl_mdio_write(hw, 0x14, 0xa303);
+ rtl_mdio_write(hw, 0x14, 0xc001);
+ rtl_mdio_write(hw, 0x14, 0xd70c);
+ rtl_mdio_write(hw, 0x14, 0x4124);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x6120);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x3128);
+ rtl_mdio_write(hw, 0x14, 0x3d76);
+ rtl_mdio_write(hw, 0x14, 0x2d70);
+ rtl_mdio_write(hw, 0x14, 0xa801);
+ rtl_mdio_write(hw, 0x14, 0x2d6c);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0xe018);
+ rtl_mdio_write(hw, 0x14, 0x0208);
+ rtl_mdio_write(hw, 0x14, 0xa1f8);
+ rtl_mdio_write(hw, 0x14, 0x8480);
+ rtl_mdio_write(hw, 0x14, 0xc004);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x6046);
+ rtl_mdio_write(hw, 0x14, 0x2d0d);
+ rtl_mdio_write(hw, 0x14, 0xa43f);
+ rtl_mdio_write(hw, 0x14, 0xa105);
+ rtl_mdio_write(hw, 0x14, 0x8228);
+ rtl_mdio_write(hw, 0x14, 0xc004);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x81bc);
+ rtl_mdio_write(hw, 0x14, 0xa220);
+ rtl_mdio_write(hw, 0x14, 0x1d97);
+ rtl_mdio_write(hw, 0x14, 0x8220);
+ rtl_mdio_write(hw, 0x14, 0xa1bc);
+ rtl_mdio_write(hw, 0x14, 0xc040);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x30e1);
+ rtl_mdio_write(hw, 0x14, 0x0abc);
+ rtl_mdio_write(hw, 0x14, 0x30e1);
+ rtl_mdio_write(hw, 0x14, 0x3d0d);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7f4c);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0xa802);
+ rtl_mdio_write(hw, 0x14, 0xd70c);
+ rtl_mdio_write(hw, 0x14, 0x4244);
+ rtl_mdio_write(hw, 0x14, 0xa301);
+ rtl_mdio_write(hw, 0x14, 0xc004);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x3128);
+ rtl_mdio_write(hw, 0x14, 0x3da5);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x5f80);
+ rtl_mdio_write(hw, 0x14, 0xd711);
+ rtl_mdio_write(hw, 0x14, 0x3109);
+ rtl_mdio_write(hw, 0x14, 0x3da7);
+ rtl_mdio_write(hw, 0x14, 0x2dab);
+ rtl_mdio_write(hw, 0x14, 0xa801);
+ rtl_mdio_write(hw, 0x14, 0x2d9a);
+ rtl_mdio_write(hw, 0x14, 0xa802);
+ rtl_mdio_write(hw, 0x14, 0xc004);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x4000);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x14, 0xa510);
+ rtl_mdio_write(hw, 0x14, 0xd710);
+ rtl_mdio_write(hw, 0x14, 0x609a);
+ rtl_mdio_write(hw, 0x14, 0xd71e);
+ rtl_mdio_write(hw, 0x14, 0x7fac);
+ rtl_mdio_write(hw, 0x14, 0x2ab6);
+ rtl_mdio_write(hw, 0x14, 0x8510);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x13, 0xA01A);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA006);
+ rtl_mdio_write(hw, 0x14, 0x0ad6);
+ rtl_mdio_write(hw, 0x13, 0xA004);
+ rtl_mdio_write(hw, 0x14, 0x07f5);
+ rtl_mdio_write(hw, 0x13, 0xA002);
+ rtl_mdio_write(hw, 0x14, 0x06a9);
+ rtl_mdio_write(hw, 0x13, 0xA000);
+ rtl_mdio_write(hw, 0x14, 0xf069);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x83a0);
+ rtl_mdio_write(hw, 0x14, 0xaf83);
+ rtl_mdio_write(hw, 0x14, 0xacaf);
+ rtl_mdio_write(hw, 0x14, 0x83b8);
+ rtl_mdio_write(hw, 0x14, 0xaf83);
+ rtl_mdio_write(hw, 0x14, 0xcdaf);
+ rtl_mdio_write(hw, 0x14, 0x83d3);
+ rtl_mdio_write(hw, 0x14, 0x0204);
+ rtl_mdio_write(hw, 0x14, 0x9a02);
+ rtl_mdio_write(hw, 0x14, 0x09a9);
+ rtl_mdio_write(hw, 0x14, 0x0284);
+ rtl_mdio_write(hw, 0x14, 0x61af);
+ rtl_mdio_write(hw, 0x14, 0x02fc);
+ rtl_mdio_write(hw, 0x14, 0xad20);
+ rtl_mdio_write(hw, 0x14, 0x0302);
+ rtl_mdio_write(hw, 0x14, 0x867c);
+ rtl_mdio_write(hw, 0x14, 0xad21);
+ rtl_mdio_write(hw, 0x14, 0x0302);
+ rtl_mdio_write(hw, 0x14, 0x85c9);
+ rtl_mdio_write(hw, 0x14, 0xad22);
+ rtl_mdio_write(hw, 0x14, 0x0302);
+ rtl_mdio_write(hw, 0x14, 0x1bc0);
+ rtl_mdio_write(hw, 0x14, 0xaf17);
+ rtl_mdio_write(hw, 0x14, 0xe302);
+ rtl_mdio_write(hw, 0x14, 0x8703);
+ rtl_mdio_write(hw, 0x14, 0xaf18);
+ rtl_mdio_write(hw, 0x14, 0x6201);
+ rtl_mdio_write(hw, 0x14, 0x06e0);
+ rtl_mdio_write(hw, 0x14, 0x8148);
+ rtl_mdio_write(hw, 0x14, 0xaf3c);
+ rtl_mdio_write(hw, 0x14, 0x69f8);
+ rtl_mdio_write(hw, 0x14, 0xf9fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0x10f7);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0x131f);
+ rtl_mdio_write(hw, 0x14, 0xd104);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0xf302);
+ rtl_mdio_write(hw, 0x14, 0x4259);
+ rtl_mdio_write(hw, 0x14, 0x0287);
+ rtl_mdio_write(hw, 0x14, 0x88bf);
+ rtl_mdio_write(hw, 0x14, 0x87cf);
+ rtl_mdio_write(hw, 0x14, 0xd7b8);
+ rtl_mdio_write(hw, 0x14, 0x22d0);
+ rtl_mdio_write(hw, 0x14, 0x0c02);
+ rtl_mdio_write(hw, 0x14, 0x4252);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xcda0);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xce8b);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xd1f5);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xd2a9);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xd30a);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xf010);
+ rtl_mdio_write(hw, 0x14, 0xee80);
+ rtl_mdio_write(hw, 0x14, 0xf38f);
+ rtl_mdio_write(hw, 0x14, 0xee81);
+ rtl_mdio_write(hw, 0x14, 0x011e);
+ rtl_mdio_write(hw, 0x14, 0xee81);
+ rtl_mdio_write(hw, 0x14, 0x0b4a);
+ rtl_mdio_write(hw, 0x14, 0xee81);
+ rtl_mdio_write(hw, 0x14, 0x0c7c);
+ rtl_mdio_write(hw, 0x14, 0xee81);
+ rtl_mdio_write(hw, 0x14, 0x127f);
+ rtl_mdio_write(hw, 0x14, 0xd100);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+ rtl_mdio_write(hw, 0x14, 0xb5ee);
+ rtl_mdio_write(hw, 0x14, 0x8088);
+ rtl_mdio_write(hw, 0x14, 0xa4ee);
+ rtl_mdio_write(hw, 0x14, 0x8089);
+ rtl_mdio_write(hw, 0x14, 0x44ee);
+ rtl_mdio_write(hw, 0x14, 0x809a);
+ rtl_mdio_write(hw, 0x14, 0xa4ee);
+ rtl_mdio_write(hw, 0x14, 0x809b);
+ rtl_mdio_write(hw, 0x14, 0x44ee);
+ rtl_mdio_write(hw, 0x14, 0x809c);
+ rtl_mdio_write(hw, 0x14, 0xa7ee);
+ rtl_mdio_write(hw, 0x14, 0x80a5);
+ rtl_mdio_write(hw, 0x14, 0xa7d2);
+ rtl_mdio_write(hw, 0x14, 0x0002);
+ rtl_mdio_write(hw, 0x14, 0x0e66);
+ rtl_mdio_write(hw, 0x14, 0x0285);
+ rtl_mdio_write(hw, 0x14, 0xc0ee);
+ rtl_mdio_write(hw, 0x14, 0x87fc);
+ rtl_mdio_write(hw, 0x14, 0x00e0);
+ rtl_mdio_write(hw, 0x14, 0x8245);
+ rtl_mdio_write(hw, 0x14, 0xf622);
+ rtl_mdio_write(hw, 0x14, 0xe482);
+ rtl_mdio_write(hw, 0x14, 0x45ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfdfc);
+ rtl_mdio_write(hw, 0x14, 0x0402);
+ rtl_mdio_write(hw, 0x14, 0x847a);
+ rtl_mdio_write(hw, 0x14, 0x0284);
+ rtl_mdio_write(hw, 0x14, 0xb302);
+ rtl_mdio_write(hw, 0x14, 0x0cab);
+ rtl_mdio_write(hw, 0x14, 0x020c);
+ rtl_mdio_write(hw, 0x14, 0xc402);
+ rtl_mdio_write(hw, 0x14, 0x0cef);
+ rtl_mdio_write(hw, 0x14, 0x020d);
+ rtl_mdio_write(hw, 0x14, 0x0802);
+ rtl_mdio_write(hw, 0x14, 0x0d33);
+ rtl_mdio_write(hw, 0x14, 0x020c);
+ rtl_mdio_write(hw, 0x14, 0x3d04);
+ rtl_mdio_write(hw, 0x14, 0xf8fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe182);
+ rtl_mdio_write(hw, 0x14, 0x2fac);
+ rtl_mdio_write(hw, 0x14, 0x291a);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x24ac);
+ rtl_mdio_write(hw, 0x14, 0x2102);
+ rtl_mdio_write(hw, 0x14, 0xae22);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+ rtl_mdio_write(hw, 0x14, 0x57f6);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8224);
+ rtl_mdio_write(hw, 0x14, 0xd101);
+ rtl_mdio_write(hw, 0x14, 0xbf44);
+ rtl_mdio_write(hw, 0x14, 0xd202);
+ rtl_mdio_write(hw, 0x14, 0x4259);
+ rtl_mdio_write(hw, 0x14, 0xae10);
+ rtl_mdio_write(hw, 0x14, 0x0212);
+ rtl_mdio_write(hw, 0x14, 0x4cf6);
+ rtl_mdio_write(hw, 0x14, 0x29e5);
+ rtl_mdio_write(hw, 0x14, 0x822f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x24f6);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8224);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xe182);
+ rtl_mdio_write(hw, 0x14, 0x2fac);
+ rtl_mdio_write(hw, 0x14, 0x2a18);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x24ac);
+ rtl_mdio_write(hw, 0x14, 0x2202);
+ rtl_mdio_write(hw, 0x14, 0xae26);
+ rtl_mdio_write(hw, 0x14, 0x0284);
+ rtl_mdio_write(hw, 0x14, 0xf802);
+ rtl_mdio_write(hw, 0x14, 0x8565);
+ rtl_mdio_write(hw, 0x14, 0xd101);
+ rtl_mdio_write(hw, 0x14, 0xbf44);
+ rtl_mdio_write(hw, 0x14, 0xd502);
+ rtl_mdio_write(hw, 0x14, 0x4259);
+ rtl_mdio_write(hw, 0x14, 0xae0e);
+ rtl_mdio_write(hw, 0x14, 0x0284);
+ rtl_mdio_write(hw, 0x14, 0xea02);
+ rtl_mdio_write(hw, 0x14, 0x85a9);
+ rtl_mdio_write(hw, 0x14, 0xe182);
+ rtl_mdio_write(hw, 0x14, 0x2ff6);
+ rtl_mdio_write(hw, 0x14, 0x2ae5);
+ rtl_mdio_write(hw, 0x14, 0x822f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x24f6);
+ rtl_mdio_write(hw, 0x14, 0x22e4);
+ rtl_mdio_write(hw, 0x14, 0x8224);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf9e2);
+ rtl_mdio_write(hw, 0x14, 0x8011);
+ rtl_mdio_write(hw, 0x14, 0xad31);
+ rtl_mdio_write(hw, 0x14, 0x05d2);
+ rtl_mdio_write(hw, 0x14, 0x0002);
+ rtl_mdio_write(hw, 0x14, 0x0e66);
+ rtl_mdio_write(hw, 0x14, 0xfd04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69e0);
+ rtl_mdio_write(hw, 0x14, 0x8011);
+ rtl_mdio_write(hw, 0x14, 0xad21);
+ rtl_mdio_write(hw, 0x14, 0x5cbf);
+ rtl_mdio_write(hw, 0x14, 0x43be);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97ac);
+ rtl_mdio_write(hw, 0x14, 0x281b);
+ rtl_mdio_write(hw, 0x14, 0xbf43);
+ rtl_mdio_write(hw, 0x14, 0xc102);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0xac28);
+ rtl_mdio_write(hw, 0x14, 0x12bf);
+ rtl_mdio_write(hw, 0x14, 0x43c7);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97ac);
+ rtl_mdio_write(hw, 0x14, 0x2804);
+ rtl_mdio_write(hw, 0x14, 0xd300);
+ rtl_mdio_write(hw, 0x14, 0xae07);
+ rtl_mdio_write(hw, 0x14, 0xd306);
+ rtl_mdio_write(hw, 0x14, 0xaf85);
+ rtl_mdio_write(hw, 0x14, 0x56d3);
+ rtl_mdio_write(hw, 0x14, 0x03e0);
+ rtl_mdio_write(hw, 0x14, 0x8011);
+ rtl_mdio_write(hw, 0x14, 0xad26);
+ rtl_mdio_write(hw, 0x14, 0x25bf);
+ rtl_mdio_write(hw, 0x14, 0x4559);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97e2);
+ rtl_mdio_write(hw, 0x14, 0x8073);
+ rtl_mdio_write(hw, 0x14, 0x0d21);
+ rtl_mdio_write(hw, 0x14, 0xf637);
+ rtl_mdio_write(hw, 0x14, 0x0d11);
+ rtl_mdio_write(hw, 0x14, 0xf62f);
+ rtl_mdio_write(hw, 0x14, 0x1b21);
+ rtl_mdio_write(hw, 0x14, 0xaa02);
+ rtl_mdio_write(hw, 0x14, 0xae10);
+ rtl_mdio_write(hw, 0x14, 0xe280);
+ rtl_mdio_write(hw, 0x14, 0x740d);
+ rtl_mdio_write(hw, 0x14, 0x21f6);
+ rtl_mdio_write(hw, 0x14, 0x371b);
+ rtl_mdio_write(hw, 0x14, 0x21aa);
+ rtl_mdio_write(hw, 0x14, 0x0313);
+ rtl_mdio_write(hw, 0x14, 0xae02);
+ rtl_mdio_write(hw, 0x14, 0x2b02);
+ rtl_mdio_write(hw, 0x14, 0x020e);
+ rtl_mdio_write(hw, 0x14, 0x5102);
+ rtl_mdio_write(hw, 0x14, 0x0e66);
+ rtl_mdio_write(hw, 0x14, 0x020f);
+ rtl_mdio_write(hw, 0x14, 0xa3ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfdfc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xf9fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe080);
+ rtl_mdio_write(hw, 0x14, 0x12ad);
+ rtl_mdio_write(hw, 0x14, 0x2733);
+ rtl_mdio_write(hw, 0x14, 0xbf43);
+ rtl_mdio_write(hw, 0x14, 0xbe02);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0xac28);
+ rtl_mdio_write(hw, 0x14, 0x09bf);
+ rtl_mdio_write(hw, 0x14, 0x43c1);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97ad);
+ rtl_mdio_write(hw, 0x14, 0x2821);
+ rtl_mdio_write(hw, 0x14, 0xbf45);
+ rtl_mdio_write(hw, 0x14, 0x5902);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0xe387);
+ rtl_mdio_write(hw, 0x14, 0xffd2);
+ rtl_mdio_write(hw, 0x14, 0x001b);
+ rtl_mdio_write(hw, 0x14, 0x45ac);
+ rtl_mdio_write(hw, 0x14, 0x2711);
+ rtl_mdio_write(hw, 0x14, 0xe187);
+ rtl_mdio_write(hw, 0x14, 0xfebf);
+ rtl_mdio_write(hw, 0x14, 0x87e4);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x590d);
+ rtl_mdio_write(hw, 0x14, 0x11bf);
+ rtl_mdio_write(hw, 0x14, 0x87e7);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfdfc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69d1);
+ rtl_mdio_write(hw, 0x14, 0x00bf);
+ rtl_mdio_write(hw, 0x14, 0x87e4);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59bf);
+ rtl_mdio_write(hw, 0x14, 0x87e7);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xff46);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xfe01);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69e0);
+ rtl_mdio_write(hw, 0x14, 0x8241);
+ rtl_mdio_write(hw, 0x14, 0xa000);
+ rtl_mdio_write(hw, 0x14, 0x0502);
+ rtl_mdio_write(hw, 0x14, 0x85eb);
+ rtl_mdio_write(hw, 0x14, 0xae0e);
+ rtl_mdio_write(hw, 0x14, 0xa001);
+ rtl_mdio_write(hw, 0x14, 0x0502);
+ rtl_mdio_write(hw, 0x14, 0x1a5a);
+ rtl_mdio_write(hw, 0x14, 0xae06);
+ rtl_mdio_write(hw, 0x14, 0xa002);
+ rtl_mdio_write(hw, 0x14, 0x0302);
+ rtl_mdio_write(hw, 0x14, 0x1ae6);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xf9fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x29f6);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8229);
+ rtl_mdio_write(hw, 0x14, 0xe080);
+ rtl_mdio_write(hw, 0x14, 0x10ac);
+ rtl_mdio_write(hw, 0x14, 0x2202);
+ rtl_mdio_write(hw, 0x14, 0xae76);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x27f7);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8227);
+ rtl_mdio_write(hw, 0x14, 0xbf43);
+ rtl_mdio_write(hw, 0x14, 0x1302);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0xef21);
+ rtl_mdio_write(hw, 0x14, 0xbf43);
+ rtl_mdio_write(hw, 0x14, 0x1602);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0x0c11);
+ rtl_mdio_write(hw, 0x14, 0x1e21);
+ rtl_mdio_write(hw, 0x14, 0xbf43);
+ rtl_mdio_write(hw, 0x14, 0x1902);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0x0c12);
+ rtl_mdio_write(hw, 0x14, 0x1e21);
+ rtl_mdio_write(hw, 0x14, 0xe682);
+ rtl_mdio_write(hw, 0x14, 0x43a2);
+ rtl_mdio_write(hw, 0x14, 0x000a);
+ rtl_mdio_write(hw, 0x14, 0xe182);
+ rtl_mdio_write(hw, 0x14, 0x27f6);
+ rtl_mdio_write(hw, 0x14, 0x29e5);
+ rtl_mdio_write(hw, 0x14, 0x8227);
+ rtl_mdio_write(hw, 0x14, 0xae42);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44f7);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x0246);
+ rtl_mdio_write(hw, 0x14, 0xaebf);
+ rtl_mdio_write(hw, 0x14, 0x4325);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97ef);
+ rtl_mdio_write(hw, 0x14, 0x21bf);
+ rtl_mdio_write(hw, 0x14, 0x431c);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x970c);
+ rtl_mdio_write(hw, 0x14, 0x121e);
+ rtl_mdio_write(hw, 0x14, 0x21bf);
+ rtl_mdio_write(hw, 0x14, 0x431f);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x970c);
+ rtl_mdio_write(hw, 0x14, 0x131e);
+ rtl_mdio_write(hw, 0x14, 0x21bf);
+ rtl_mdio_write(hw, 0x14, 0x4328);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x970c);
+ rtl_mdio_write(hw, 0x14, 0x141e);
+ rtl_mdio_write(hw, 0x14, 0x21bf);
+ rtl_mdio_write(hw, 0x14, 0x44b1);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x970c);
+ rtl_mdio_write(hw, 0x14, 0x161e);
+ rtl_mdio_write(hw, 0x14, 0x21e6);
+ rtl_mdio_write(hw, 0x14, 0x8242);
+ rtl_mdio_write(hw, 0x14, 0xee82);
+ rtl_mdio_write(hw, 0x14, 0x4101);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x46a0);
+ rtl_mdio_write(hw, 0x14, 0x0005);
+ rtl_mdio_write(hw, 0x14, 0x0286);
+ rtl_mdio_write(hw, 0x14, 0x96ae);
+ rtl_mdio_write(hw, 0x14, 0x06a0);
+ rtl_mdio_write(hw, 0x14, 0x0103);
+ rtl_mdio_write(hw, 0x14, 0x0219);
+ rtl_mdio_write(hw, 0x14, 0x19ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x29f6);
+ rtl_mdio_write(hw, 0x14, 0x20e4);
+ rtl_mdio_write(hw, 0x14, 0x8229);
+ rtl_mdio_write(hw, 0x14, 0xe080);
+ rtl_mdio_write(hw, 0x14, 0x10ac);
+ rtl_mdio_write(hw, 0x14, 0x2102);
+ rtl_mdio_write(hw, 0x14, 0xae54);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x27f7);
+ rtl_mdio_write(hw, 0x14, 0x20e4);
+ rtl_mdio_write(hw, 0x14, 0x8227);
+ rtl_mdio_write(hw, 0x14, 0xbf42);
+ rtl_mdio_write(hw, 0x14, 0xe602);
+ rtl_mdio_write(hw, 0x14, 0x4297);
+ rtl_mdio_write(hw, 0x14, 0xac28);
+ rtl_mdio_write(hw, 0x14, 0x22bf);
+ rtl_mdio_write(hw, 0x14, 0x430d);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97e5);
+ rtl_mdio_write(hw, 0x14, 0x8247);
+ rtl_mdio_write(hw, 0x14, 0xac28);
+ rtl_mdio_write(hw, 0x14, 0x20d1);
+ rtl_mdio_write(hw, 0x14, 0x03bf);
+ rtl_mdio_write(hw, 0x14, 0x4307);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59ee);
+ rtl_mdio_write(hw, 0x14, 0x8246);
+ rtl_mdio_write(hw, 0x14, 0x00e1);
+ rtl_mdio_write(hw, 0x14, 0x8227);
+ rtl_mdio_write(hw, 0x14, 0xf628);
+ rtl_mdio_write(hw, 0x14, 0xe582);
+ rtl_mdio_write(hw, 0x14, 0x27ae);
+ rtl_mdio_write(hw, 0x14, 0x21d1);
+ rtl_mdio_write(hw, 0x14, 0x04bf);
+ rtl_mdio_write(hw, 0x14, 0x4307);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59ae);
+ rtl_mdio_write(hw, 0x14, 0x08d1);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x4307);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59e0);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0xf720);
+ rtl_mdio_write(hw, 0x14, 0xe482);
+ rtl_mdio_write(hw, 0x14, 0x4402);
+ rtl_mdio_write(hw, 0x14, 0x46ae);
+ rtl_mdio_write(hw, 0x14, 0xee82);
+ rtl_mdio_write(hw, 0x14, 0x4601);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69e0);
+ rtl_mdio_write(hw, 0x14, 0x8013);
+ rtl_mdio_write(hw, 0x14, 0xad24);
+ rtl_mdio_write(hw, 0x14, 0x1cbf);
+ rtl_mdio_write(hw, 0x14, 0x87f0);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x97ad);
+ rtl_mdio_write(hw, 0x14, 0x2813);
+ rtl_mdio_write(hw, 0x14, 0xe087);
+ rtl_mdio_write(hw, 0x14, 0xfca0);
+ rtl_mdio_write(hw, 0x14, 0x0005);
+ rtl_mdio_write(hw, 0x14, 0x0287);
+ rtl_mdio_write(hw, 0x14, 0x36ae);
+ rtl_mdio_write(hw, 0x14, 0x10a0);
+ rtl_mdio_write(hw, 0x14, 0x0105);
+ rtl_mdio_write(hw, 0x14, 0x0287);
+ rtl_mdio_write(hw, 0x14, 0x48ae);
+ rtl_mdio_write(hw, 0x14, 0x08e0);
+ rtl_mdio_write(hw, 0x14, 0x8230);
+ rtl_mdio_write(hw, 0x14, 0xf626);
+ rtl_mdio_write(hw, 0x14, 0xe482);
+ rtl_mdio_write(hw, 0x14, 0x30ef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8e0);
+ rtl_mdio_write(hw, 0x14, 0x8245);
+ rtl_mdio_write(hw, 0x14, 0xf722);
+ rtl_mdio_write(hw, 0x14, 0xe482);
+ rtl_mdio_write(hw, 0x14, 0x4502);
+ rtl_mdio_write(hw, 0x14, 0x46ae);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xfc01);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xfb02);
+ rtl_mdio_write(hw, 0x14, 0x46d3);
+ rtl_mdio_write(hw, 0x14, 0xad50);
+ rtl_mdio_write(hw, 0x14, 0x2fbf);
+ rtl_mdio_write(hw, 0x14, 0x87ed);
+ rtl_mdio_write(hw, 0x14, 0xd101);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59bf);
+ rtl_mdio_write(hw, 0x14, 0x87ed);
+ rtl_mdio_write(hw, 0x14, 0xd100);
+ rtl_mdio_write(hw, 0x14, 0x0242);
+ rtl_mdio_write(hw, 0x14, 0x59e0);
+ rtl_mdio_write(hw, 0x14, 0x8245);
+ rtl_mdio_write(hw, 0x14, 0xf622);
+ rtl_mdio_write(hw, 0x14, 0xe482);
+ rtl_mdio_write(hw, 0x14, 0x4502);
+ rtl_mdio_write(hw, 0x14, 0x46ae);
+ rtl_mdio_write(hw, 0x14, 0xd100);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0xf002);
+ rtl_mdio_write(hw, 0x14, 0x4259);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xfc00);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x30f6);
+ rtl_mdio_write(hw, 0x14, 0x26e4);
+ rtl_mdio_write(hw, 0x14, 0x8230);
+ rtl_mdio_write(hw, 0x14, 0xffef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xface);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69fb);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0xb3d7);
+ rtl_mdio_write(hw, 0x14, 0x001c);
+ rtl_mdio_write(hw, 0x14, 0xd819);
+ rtl_mdio_write(hw, 0x14, 0xd919);
+ rtl_mdio_write(hw, 0x14, 0xda19);
+ rtl_mdio_write(hw, 0x14, 0xdb19);
+ rtl_mdio_write(hw, 0x14, 0x07ef);
+ rtl_mdio_write(hw, 0x14, 0x9502);
+ rtl_mdio_write(hw, 0x14, 0x4259);
+ rtl_mdio_write(hw, 0x14, 0x073f);
+ rtl_mdio_write(hw, 0x14, 0x0004);
+ rtl_mdio_write(hw, 0x14, 0x9fec);
+ rtl_mdio_write(hw, 0x14, 0xffef);
+ rtl_mdio_write(hw, 0x14, 0x96fe);
+ rtl_mdio_write(hw, 0x14, 0xc6fe);
+ rtl_mdio_write(hw, 0x14, 0xfdfc);
+ rtl_mdio_write(hw, 0x14, 0x0400);
+ rtl_mdio_write(hw, 0x14, 0x0145);
+ rtl_mdio_write(hw, 0x14, 0x7d00);
+ rtl_mdio_write(hw, 0x14, 0x0345);
+ rtl_mdio_write(hw, 0x14, 0x5c00);
+ rtl_mdio_write(hw, 0x14, 0x0143);
+ rtl_mdio_write(hw, 0x14, 0x4f00);
+ rtl_mdio_write(hw, 0x14, 0x0387);
+ rtl_mdio_write(hw, 0x14, 0xdb00);
+ rtl_mdio_write(hw, 0x14, 0x0987);
+ rtl_mdio_write(hw, 0x14, 0xde00);
+ rtl_mdio_write(hw, 0x14, 0x0987);
+ rtl_mdio_write(hw, 0x14, 0xe100);
+ rtl_mdio_write(hw, 0x14, 0x0087);
+ rtl_mdio_write(hw, 0x14, 0xeaa4);
+ rtl_mdio_write(hw, 0x14, 0x00b8);
+ rtl_mdio_write(hw, 0x14, 0x20c4);
+ rtl_mdio_write(hw, 0x14, 0x1600);
+ rtl_mdio_write(hw, 0x14, 0x000f);
+ rtl_mdio_write(hw, 0x14, 0xf800);
+ rtl_mdio_write(hw, 0x14, 0x7098);
+ rtl_mdio_write(hw, 0x14, 0xa58a);
+ rtl_mdio_write(hw, 0x14, 0xb6a8);
+ rtl_mdio_write(hw, 0x14, 0x3e50);
+ rtl_mdio_write(hw, 0x14, 0xa83e);
+ rtl_mdio_write(hw, 0x14, 0x33bc);
+ rtl_mdio_write(hw, 0x14, 0xc622);
+ rtl_mdio_write(hw, 0x14, 0xbcc6);
+ rtl_mdio_write(hw, 0x14, 0xaaa4);
+ rtl_mdio_write(hw, 0x14, 0x42ff);
+ rtl_mdio_write(hw, 0x14, 0xc408);
+ rtl_mdio_write(hw, 0x14, 0x00c4);
+ rtl_mdio_write(hw, 0x14, 0x16a8);
+ rtl_mdio_write(hw, 0x14, 0xbcc0);
+ rtl_mdio_write(hw, 0x13, 0xb818);
+ rtl_mdio_write(hw, 0x14, 0x02f3);
+ rtl_mdio_write(hw, 0x13, 0xb81a);
+ rtl_mdio_write(hw, 0x14, 0x17d1);
+ rtl_mdio_write(hw, 0x13, 0xb81c);
+ rtl_mdio_write(hw, 0x14, 0x185a);
+ rtl_mdio_write(hw, 0x13, 0xb81e);
+ rtl_mdio_write(hw, 0x14, 0x3c66);
+ rtl_mdio_write(hw, 0x13, 0xb820);
+ rtl_mdio_write(hw, 0x14, 0x021f);
+ rtl_mdio_write(hw, 0x13, 0xc416);
+ rtl_mdio_write(hw, 0x14, 0x0500);
+ rtl_mdio_write(hw, 0x13, 0xb82e);
+ rtl_mdio_write(hw, 0x14, 0xfffc);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x10);
+ gphy_val &= ~BIT_9;
+ rtl_mdio_write(hw, 0x10, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+/* ------------------------------------PHY 8168GU2------------------------------------- */
+
+static void
+rtl8168_set_phy_mcu_8168gu_2(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x0300);
+ rtl_mdio_write(hw, 0x13, 0xB82E);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0xb820);
+ rtl_mdio_write(hw, 0x14, 0x0290);
+ rtl_mdio_write(hw, 0x13, 0xa012);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xa014);
+ rtl_mdio_write(hw, 0x14, 0x2c04);
+ rtl_mdio_write(hw, 0x14, 0x2c07);
+ rtl_mdio_write(hw, 0x14, 0x2c07);
+ rtl_mdio_write(hw, 0x14, 0x2c07);
+ rtl_mdio_write(hw, 0x14, 0xa304);
+ rtl_mdio_write(hw, 0x14, 0xa301);
+ rtl_mdio_write(hw, 0x14, 0x207e);
+ rtl_mdio_write(hw, 0x13, 0xa01a);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xa006);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xa004);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xa002);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xa000);
+ rtl_mdio_write(hw, 0x14, 0x107c);
+ rtl_mdio_write(hw, 0x13, 0xb820);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x17);
+ gphy_val &= ~BIT_0;
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8146);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+void
+hw_mac_mcu_config_8168g(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ rtl8168_set_mac_mcu_8168g_1(hw);
+ break;
+ case CFG_METHOD_24:
+ rtl8168_set_mac_mcu_8168gu_1(hw);
+ break;
+ case CFG_METHOD_25:
+ rtl8168_set_mac_mcu_8168gu_2(hw);
+ break;
+ }
+}
+
+void
+hw_phy_mcu_config_8168g(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ rtl8168_set_phy_mcu_8168g_1(hw);
+ break;
+ case CFG_METHOD_25:
+ rtl8168_set_phy_mcu_8168gu_2(hw);
+ break;
+ }
+}
diff --git a/drivers/net/r8169/base/rtl8168h.c b/drivers/net/r8169/base/rtl8168h.c
new file mode 100644
index 0000000000..933a15ae39
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168h.c
@@ -0,0 +1,447 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168h.h"
+
+/* For RTL8168H, CFG_METHOD_29,30,35,36 */
+
+void
+hw_init_rxcfg_8168h(struct rtl_hw *hw)
+{
+ RTL_W32(hw, RxConfig, Rx_Single_fetch_V2 |
+ (RX_DMA_BURST_unlimited << RxCfgDMAShift) | RxEarly_off_V2);
+}
+
+void
+hw_ephy_config_8168h(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_37:
+ rtl_clear_pcie_phy_bit(hw, 0x1E, BIT_11);
+
+ rtl_set_pcie_phy_bit(hw, 0x1E, BIT_0);
+ rtl_set_pcie_phy_bit(hw, 0x1D, BIT_11);
+
+ rtl_ephy_write(hw, 0x05, 0x2089);
+ rtl_ephy_write(hw, 0x06, 0x5881);
+
+ rtl_ephy_write(hw, 0x04, 0x854A);
+ rtl_ephy_write(hw, 0x01, 0x068B);
+
+ break;
+ case CFG_METHOD_35:
+ rtl8168_clear_mcu_ocp_bit(hw, 0xD438, BIT_2);
+
+ rtl_clear_pcie_phy_bit(hw, 0x24, BIT_9);
+
+ rtl8168_clear_mcu_ocp_bit(hw, 0xDE28, (BIT_1 | BIT_0));
+
+ rtl8168_set_mcu_ocp_bit(hw, 0xD438, BIT_2);
+
+ break;
+ case CFG_METHOD_36:
+ rtl8168_clear_mcu_ocp_bit(hw, 0xD438, BIT_2);
+
+ rtl8168_clear_mcu_ocp_bit(hw, 0xDE28, (BIT_1 | BIT_0));
+
+ rtl8168_set_mcu_ocp_bit(hw, 0xD438, BIT_2);
+
+ break;
+ default:
+ break;
+ }
+}
+
+static int
+rtl8168h_require_adc_bias_patch_check(struct rtl_hw *hw, u16 *offset)
+{
+ int ret;
+ u16 ioffset_p3, ioffset_p2, ioffset_p1, ioffset_p0;
+ u16 tmp_ushort;
+
+ rtl_mac_ocp_write(hw, 0xDD02, 0x807D);
+ tmp_ushort = rtl_mac_ocp_read(hw, 0xDD02);
+ ioffset_p3 = ((tmp_ushort & BIT_7) >> 7);
+ ioffset_p3 <<= 3;
+ tmp_ushort = rtl_mac_ocp_read(hw, 0xDD00);
+
+ ioffset_p3 |= ((tmp_ushort & (BIT_15 | BIT_14 | BIT_13)) >> 13);
+
+ ioffset_p2 = ((tmp_ushort & (BIT_12 | BIT_11 | BIT_10 | BIT_9)) >> 9);
+ ioffset_p1 = ((tmp_ushort & (BIT_8 | BIT_7 | BIT_6 | BIT_5)) >> 5);
+
+ ioffset_p0 = ((tmp_ushort & BIT_4) >> 4);
+ ioffset_p0 <<= 3;
+ ioffset_p0 |= (tmp_ushort & (BIT_2 | BIT_1 | BIT_0));
+
+ if (ioffset_p3 == 0x0F && ioffset_p2 == 0x0F && ioffset_p1 == 0x0F &&
+ ioffset_p0 == 0x0F) {
+ ret = FALSE;
+ } else {
+ ret = TRUE;
+ *offset = (ioffset_p3 << 12) | (ioffset_p2 << 8) |
+ (ioffset_p1 << 4) | ioffset_p0;
+ }
+
+ return ret;
+}
+
+static void
+hw_phy_config_8168h_1(struct rtl_hw *hw)
+{
+ u16 dout_tapbin;
+ u16 gphy_val;
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x809b);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xF800, 0x8000);
+ rtl_mdio_write(hw, 0x13, 0x80A2);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x8000);
+ rtl_mdio_write(hw, 0x13, 0x80A4);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x8500);
+ rtl_mdio_write(hw, 0x13, 0x809C);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0xbd00);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x80AD);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xF800, 0x7000);
+ rtl_mdio_write(hw, 0x13, 0x80B4);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x5000);
+ rtl_mdio_write(hw, 0x13, 0x80AC);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x4000);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x808E);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x1200);
+ rtl_mdio_write(hw, 0x13, 0x8090);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0xE500);
+ rtl_mdio_write(hw, 0x13, 0x8092);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x9F00);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(hw)) {
+ dout_tapbin = 0x0000;
+ rtl_mdio_write(hw, 0x1F, 0x0A46);
+ gphy_val = rtl_mdio_read(hw, 0x13);
+ gphy_val &= (BIT_1 | BIT_0);
+ gphy_val <<= 2;
+ dout_tapbin |= gphy_val;
+
+ gphy_val = rtl_mdio_read(hw, 0x12);
+ gphy_val &= (BIT_15 | BIT_14);
+ gphy_val >>= 14;
+ dout_tapbin |= gphy_val;
+
+ dout_tapbin = ~(dout_tapbin ^ BIT_3);
+ dout_tapbin <<= 12;
+ dout_tapbin &= 0xF000;
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+
+ rtl_mdio_write(hw, 0x13, 0x827A);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 | BIT_12),
+ dout_tapbin);
+
+ rtl_mdio_write(hw, 0x13, 0x827B);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 | BIT_12),
+ dout_tapbin);
+
+ rtl_mdio_write(hw, 0x13, 0x827C);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 | BIT_12),
+ dout_tapbin);
+
+ rtl_mdio_write(hw, 0x13, 0x827D);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 | BIT_12),
+ dout_tapbin);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8011);
+ rtl_set_eth_phy_bit(hw, 0x14, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ rtl_set_eth_phy_bit(hw, 0x16, BIT_1);
+ }
+
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_set_eth_phy_bit(hw, 0x11, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCA);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x17, (BIT_13 | BIT_12), BIT_14);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x803F);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x8047);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x804F);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x8057);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x805F);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x8067);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x13, 0x806F);
+ rtl_clear_eth_phy_bit(hw, 0x14, (BIT_13 | BIT_12));
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+static void
+hw_phy_config_8168h_2(struct rtl_hw *hw)
+{
+ u16 gphy_val;
+ u16 offset;
+ u16 rlen;
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x808A);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0),
+ 0x0A);
+
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(hw)) {
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8011);
+ rtl_set_eth_phy_bit(hw, 0x14, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ rtl_set_eth_phy_bit(hw, 0x16, BIT_1);
+ }
+
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_set_eth_phy_bit(hw, 0x11, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ if (rtl8168h_require_adc_bias_patch_check(hw, &offset)) {
+ rtl_mdio_write(hw, 0x1F, 0x0BCF);
+ rtl_mdio_write(hw, 0x16, offset);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ }
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCD);
+ gphy_val = rtl_mdio_read(hw, 0x16);
+ gphy_val &= 0x000F;
+
+ if (gphy_val > 3)
+ rlen = gphy_val - 3;
+ else
+ rlen = 0;
+
+ gphy_val = rlen | (rlen << 4) | (rlen << 8) | (rlen << 12);
+
+ rtl_mdio_write(hw, 0x1F, 0x0BCD);
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(hw)) {
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x85FE);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, (BIT_15 | BIT_14 |
+ BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8),
+ BIT_9);
+ rtl_mdio_write(hw, 0x13, 0x85FF);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 | BIT_12),
+ (BIT_11 | BIT_10 | BIT_9 | BIT_8));
+ rtl_mdio_write(hw, 0x13, 0x814B);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14,
+ (BIT_15 | BIT_14 | BIT_13 |
+ BIT_11 | BIT_10 | BIT_9 | BIT_8),
+ BIT_12);
+ }
+
+ rtl_mdio_write(hw, 0x1F, 0x0C41);
+ rtl_clear_eth_phy_bit(hw, 0x15, BIT_1);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_set_eth_phy_bit(hw, 0x10, BIT_0);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+static void
+hw_phy_config_8168h_3(struct rtl_hw *hw)
+{
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_set_eth_phy_bit(hw, 0x11, BIT_11);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A4C);
+ rtl_clear_eth_phy_bit(hw, 0x15, (BIT_14 | BIT_13));
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x81B9);
+ rtl_mdio_write(hw, 0x14, 0x2000);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x81D4);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x6600);
+ rtl_mdio_write(hw, 0x13, 0x81CB);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x3500);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A80);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x16, 0x000F, 0x0005);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8016);
+ rtl_set_eth_phy_bit(hw, 0x14, BIT_13);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x811E);
+ rtl_mdio_write(hw, 0x14, 0xDECA);
+
+ rtl_mdio_write(hw, 0x13, 0x811C);
+ rtl_mdio_write(hw, 0x14, 0x8008);
+ rtl_mdio_write(hw, 0x13, 0x8118);
+ rtl_mdio_write(hw, 0x14, 0xF8B4);
+ rtl_mdio_write(hw, 0x13, 0x811A);
+ rtl_mdio_write(hw, 0x14, 0x1A04);
+
+ rtl_mdio_write(hw, 0x13, 0x8134);
+ rtl_mdio_write(hw, 0x14, 0xDECA);
+ rtl_mdio_write(hw, 0x13, 0x8132);
+ rtl_mdio_write(hw, 0x14, 0xA008);
+ rtl_mdio_write(hw, 0x13, 0x812E);
+ rtl_mdio_write(hw, 0x14, 0x00B5);
+ rtl_mdio_write(hw, 0x13, 0x8130);
+ rtl_mdio_write(hw, 0x14, 0x1A04);
+
+ rtl_mdio_write(hw, 0x13, 0x8112);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x7300);
+ rtl_mdio_write(hw, 0x13, 0x8106);
+ rtl_mdio_write(hw, 0x14, 0xA209);
+ rtl_mdio_write(hw, 0x13, 0x8108);
+ rtl_mdio_write(hw, 0x14, 0x13B0);
+ rtl_mdio_write(hw, 0x13, 0x8103);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xF800, 0xB800);
+ rtl_mdio_write(hw, 0x13, 0x8105);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x0A00);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x87EB);
+ rtl_mdio_write(hw, 0x14, 0x0018);
+ rtl_mdio_write(hw, 0x13, 0x87EB);
+ rtl_mdio_write(hw, 0x14, 0x0018);
+ rtl_mdio_write(hw, 0x13, 0x87ED);
+ rtl_mdio_write(hw, 0x14, 0x0733);
+ rtl_mdio_write(hw, 0x13, 0x87EF);
+ rtl_mdio_write(hw, 0x14, 0x08DC);
+ rtl_mdio_write(hw, 0x13, 0x87F1);
+ rtl_mdio_write(hw, 0x14, 0x08DF);
+ rtl_mdio_write(hw, 0x13, 0x87F3);
+ rtl_mdio_write(hw, 0x14, 0x0C79);
+ rtl_mdio_write(hw, 0x13, 0x87F5);
+ rtl_mdio_write(hw, 0x14, 0x0D93);
+ rtl_mdio_write(hw, 0x13, 0x87F9);
+ rtl_mdio_write(hw, 0x14, 0x0010);
+ rtl_mdio_write(hw, 0x13, 0x87FB);
+ rtl_mdio_write(hw, 0x14, 0x0800);
+ rtl_mdio_write(hw, 0x13, 0x8015);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0x7000, 0x7000);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8111);
+ rtl_clear_and_set_eth_phy_bit(hw, 0x14, 0xFF00, 0x7C00);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+}
+
+void
+hw_phy_config_8168h(struct rtl_hw *hw)
+{
+ if (hw->mcfg == CFG_METHOD_29)
+ hw_phy_config_8168h_1(hw);
+ else if (hw->mcfg == CFG_METHOD_30 || hw->mcfg == CFG_METHOD_37)
+ hw_phy_config_8168h_2(hw);
+ else if (hw->mcfg == CFG_METHOD_35)
+ hw_phy_config_8168h_3(hw);
+
+ /* Enable EthPhyPPSW */
+ if (hw->mcfg != CFG_METHOD_37) {
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ rtl_clear_eth_phy_bit(hw, 0x11, BIT_7);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ }
+}
+
+void
+hw_config_8168h(struct rtl_hw *hw)
+{
+ u32 csi_tmp;
+ u16 mac_ocp_data;
+
+ /* Share fifo rx params */
+ rtl_eri_write(hw, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xCC, 1, 0x38, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xD0, 1, 0x48, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+ /* Adjust the trx fifo*/
+ rtl_eri_write(hw, 0xCA, 2, 0x0370, ERIAR_ExGMAC);
+ rtl_eri_write(hw, 0xEA, 1, 0x10, ERIAR_ExGMAC);
+
+ /* Disable share fifo */
+ RTL_W32(hw, TxConfig, RTL_R32(hw, TxConfig) & ~BIT_7);
+
+ if (hw->mcfg == CFG_METHOD_35 || hw->mcfg == CFG_METHOD_36)
+ rtl8168_set_mcu_ocp_bit(hw, 0xD438, (BIT_1 | BIT_0));
+
+ /* EPHY err mask */
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE0D6);
+ mac_ocp_data &= ~(BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 |
+ BIT_2 | BIT_1 | BIT_0);
+ mac_ocp_data |= 0x17F;
+ rtl_mac_ocp_write(hw, 0xE0D6, mac_ocp_data);
+
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~Beacon_en);
+
+ /* EEE led enable */
+ RTL_W8(hw, 0x1B, RTL_R8(hw, 0x1B) & ~0x07);
+
+ RTL_W8(hw, Config2, RTL_R8(hw, Config2) & ~PMSTS_En);
+
+ csi_tmp = rtl_eri_read(hw, 0xDC, 4, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
+ rtl_eri_write(hw, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
+
+ /* CRC wake disable */
+ rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
+ rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
+
+ csi_tmp = rtl_eri_read(hw, 0x1B0, 4, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_12;
+ rtl_eri_write(hw, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+
+ csi_tmp = rtl_eri_read(hw, 0x2FC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_2;
+ rtl_eri_write(hw, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ if (hw->mcfg != CFG_METHOD_37) {
+ csi_tmp = rtl_eri_read(hw, 0x1D0, 1, ERIAR_ExGMAC);
+ csi_tmp |= BIT_1;
+ rtl_eri_write(hw, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+ }
+}
+
+const struct rtl_hw_ops rtl8168h_ops = {
+ .hw_config = hw_config_8168h,
+ .hw_init_rxcfg = hw_init_rxcfg_8168h,
+ .hw_ephy_config = hw_ephy_config_8168h,
+ .hw_phy_config = hw_phy_config_8168h,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8168h,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8168h,
+};
diff --git a/drivers/net/r8169/base/rtl8168h.h b/drivers/net/r8169/base/rtl8168h.h
new file mode 100644
index 0000000000..51612d5fc3
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168h.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef _RTL8168H_H_
+#define _RTL8168H_H_
+
+#include "../r8169_compat.h"
+
+extern const struct rtl_hw_ops rtl8168h_ops;
+extern const struct rtl_hw_ops rtl8168m_ops;
+
+void hw_mac_mcu_config_8168h(struct rtl_hw *hw);
+void hw_phy_mcu_config_8168h(struct rtl_hw *hw);
+
+void hw_init_rxcfg_8168h(struct rtl_hw *hw);
+void hw_ephy_config_8168h(struct rtl_hw *hw);
+void hw_phy_config_8168h(struct rtl_hw *hw);
+void hw_config_8168h(struct rtl_hw *hw);
+
+#endif
diff --git a/drivers/net/r8169/base/rtl8168h_mcu.c b/drivers/net/r8169/base/rtl8168h_mcu.c
new file mode 100644
index 0000000000..445e6ab22e
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168h_mcu.c
@@ -0,0 +1,1186 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168h.h"
+
+/* For RTL8168H, CFG_METHOD_29,30,35,36 */
+
+/* ------------------------------------MAC 8168H------------------------------------- */
+
+static void
+rtl8168_set_mac_mcu_8168h_1(struct rtl_hw *hw)
+{
+ rtl_hw_disable_mac_mcu_bps(hw);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_2(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168h_1[] = {
+ 0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707,
+ 0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
+ 0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
+ 0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
+ 0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, 0xF111,
+ 0xC517, 0x9DC8, 0xC516, 0x9DD2, 0xC618, 0x75C0, 0x49D4, 0xF003, 0x49D0,
+ 0xF104, 0xC60A, 0xC50E, 0x9DC0, 0xB005, 0xC607, 0x9DC0, 0xB007, 0xC602,
+ 0xBE00, 0x1A06, 0xB400, 0xE86C, 0xA000, 0x01E1, 0x0200, 0x9200, 0xE84C,
+ 0xE004, 0xE908, 0xC502, 0xBD00, 0x0B58, 0xB407, 0xB404, 0x2195, 0x25BD,
+ 0x9BE0, 0x1C1C, 0x484F, 0x9CE2, 0x72E2, 0x49AE, 0xF1FE, 0x0B00, 0xF116,
+ 0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
+ 0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
+ 0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
+ 0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46,
+ 0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_1); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168h_1[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC28, 0x00E2);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x0210);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x1A04);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x0B26);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0F02);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x0CA0);
+
+ rtl_mac_ocp_write(hw, 0xFC38, 0x003F);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_3(struct rtl_hw *hw)
+{
+ u16 i;
+ static const u16 mcu_patch_code_8168h_3[] = {
+ 0xE008, 0xE00A, 0xE00C, 0xE00E, 0xE010, 0xE03E, 0xE040, 0xE069, 0xC602,
+ 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602,
+ 0xBE00, 0x0000, 0xC72B, 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x9EE0, 0x1E1C,
+ 0x9EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC621, 0x9EE0, 0x1E1D, 0x486F, 0x9EE2,
+ 0x76E2, 0x49EE, 0xF1FE, 0xC71A, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB,
+ 0x48EC, 0x9EE0, 0xC70D, 0xC60D, 0x9EF4, 0xC60C, 0x9EF6, 0xC70E, 0x76E0,
+ 0x4863, 0x9EE0, 0xB007, 0xC602, 0xBE00, 0x0ACC, 0xE000, 0x03BF, 0x07FF,
+ 0xDE24, 0x3200, 0xE096, 0xD438, 0xC602, 0xBE00, 0x0000, 0x8EE6, 0xC726,
+ 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x8EE0, 0x1E1C, 0x8EE2, 0x76E2, 0x49EE,
+ 0xF1FE, 0xC61C, 0x8EE0, 0x1E1D, 0x486F, 0x8EE2, 0x76E2, 0x49EE, 0xF1FE,
+ 0xC715, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB, 0x48EC, 0x9EE0, 0xC708,
+ 0xC608, 0x9EF4, 0xC607, 0x9EF6, 0xC602, 0xBE00, 0x0ABE, 0xE000, 0x03BF,
+ 0x07FF, 0xDE24, 0x3200, 0xE096, 0xC602, 0xBE00, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x6838, 0x0A17, 0x0613, 0x0D26
+ };
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_3); i++)
+ rtl_mac_ocp_write(hw, 0xF800 + i * 2, mcu_patch_code_8168h_3[i]);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC30, 0x0ACA);
+
+ rtl8168_clear_mcu_ocp_bit(hw, 0xD438, BIT_3);
+
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0010);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_4(struct rtl_hw *hw)
+{
+ rtl_hw_disable_mac_mcu_bps(hw);
+}
+
+/* ------------------------------------PHY 8168H------------------------------------- */
+
+static void
+rtl8168_set_phy_mcu_8168h_1(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8028);
+ rtl_mdio_write(hw, 0x14, 0x6200);
+ rtl_mdio_write(hw, 0x13, 0xB82E);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0290);
+ rtl_mdio_write(hw, 0x13, 0xA012);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA014);
+ rtl_mdio_write(hw, 0x14, 0x2c04);
+ rtl_mdio_write(hw, 0x14, 0x2c10);
+ rtl_mdio_write(hw, 0x14, 0x2c10);
+ rtl_mdio_write(hw, 0x14, 0x2c10);
+ rtl_mdio_write(hw, 0x14, 0xa210);
+ rtl_mdio_write(hw, 0x14, 0xa101);
+ rtl_mdio_write(hw, 0x14, 0xce10);
+ rtl_mdio_write(hw, 0x14, 0xe070);
+ rtl_mdio_write(hw, 0x14, 0x0f40);
+ rtl_mdio_write(hw, 0x14, 0xaf01);
+ rtl_mdio_write(hw, 0x14, 0x8f01);
+ rtl_mdio_write(hw, 0x14, 0x183e);
+ rtl_mdio_write(hw, 0x14, 0x8e10);
+ rtl_mdio_write(hw, 0x14, 0x8101);
+ rtl_mdio_write(hw, 0x14, 0x8210);
+ rtl_mdio_write(hw, 0x14, 0x28da);
+ rtl_mdio_write(hw, 0x13, 0xA01A);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA006);
+ rtl_mdio_write(hw, 0x14, 0x0017);
+ rtl_mdio_write(hw, 0x13, 0xA004);
+ rtl_mdio_write(hw, 0x14, 0x0015);
+ rtl_mdio_write(hw, 0x13, 0xA002);
+ rtl_mdio_write(hw, 0x14, 0x0013);
+ rtl_mdio_write(hw, 0x13, 0xA000);
+ rtl_mdio_write(hw, 0x14, 0x18d1);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x17);
+ gphy_val &= ~BIT_0;
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8028);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+static void
+rtl8168_set_phy_mcu_8168h_2(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8028);
+ rtl_mdio_write(hw, 0x14, 0x6201);
+ rtl_mdio_write(hw, 0x13, 0xB82E);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0290);
+ rtl_mdio_write(hw, 0x13, 0xA012);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA014);
+ rtl_mdio_write(hw, 0x14, 0x2c04);
+ rtl_mdio_write(hw, 0x14, 0x2c09);
+ rtl_mdio_write(hw, 0x14, 0x2c0d);
+ rtl_mdio_write(hw, 0x14, 0x2c12);
+ rtl_mdio_write(hw, 0x14, 0xad01);
+ rtl_mdio_write(hw, 0x14, 0xad01);
+ rtl_mdio_write(hw, 0x14, 0xad01);
+ rtl_mdio_write(hw, 0x14, 0xad01);
+ rtl_mdio_write(hw, 0x14, 0x236c);
+ rtl_mdio_write(hw, 0x14, 0xd03c);
+ rtl_mdio_write(hw, 0x14, 0xd1aa);
+ rtl_mdio_write(hw, 0x14, 0xc010);
+ rtl_mdio_write(hw, 0x14, 0x2745);
+ rtl_mdio_write(hw, 0x14, 0x33de);
+ rtl_mdio_write(hw, 0x14, 0x16ba);
+ rtl_mdio_write(hw, 0x14, 0x31ee);
+ rtl_mdio_write(hw, 0x14, 0x2712);
+ rtl_mdio_write(hw, 0x14, 0x274e);
+ rtl_mdio_write(hw, 0x14, 0xc2bb);
+ rtl_mdio_write(hw, 0x14, 0xd500);
+ rtl_mdio_write(hw, 0x14, 0xc426);
+ rtl_mdio_write(hw, 0x14, 0xd01d);
+ rtl_mdio_write(hw, 0x14, 0xd1c3);
+ rtl_mdio_write(hw, 0x14, 0x401c);
+ rtl_mdio_write(hw, 0x14, 0xd501);
+ rtl_mdio_write(hw, 0x14, 0xc2b3);
+ rtl_mdio_write(hw, 0x14, 0xd500);
+ rtl_mdio_write(hw, 0x14, 0xd00b);
+ rtl_mdio_write(hw, 0x14, 0xd1c3);
+ rtl_mdio_write(hw, 0x14, 0x401c);
+ rtl_mdio_write(hw, 0x14, 0x241a);
+ rtl_mdio_write(hw, 0x13, 0xA01A);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA006);
+ rtl_mdio_write(hw, 0x14, 0x0414);
+ rtl_mdio_write(hw, 0x13, 0xA004);
+ rtl_mdio_write(hw, 0x14, 0x074c);
+ rtl_mdio_write(hw, 0x13, 0xA002);
+ rtl_mdio_write(hw, 0x14, 0x0744);
+ rtl_mdio_write(hw, 0x13, 0xA000);
+ rtl_mdio_write(hw, 0x14, 0xf36b);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0210);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8323);
+ rtl_mdio_write(hw, 0x14, 0xaf83);
+ rtl_mdio_write(hw, 0x14, 0x2faf);
+ rtl_mdio_write(hw, 0x14, 0x853d);
+ rtl_mdio_write(hw, 0x14, 0xaf85);
+ rtl_mdio_write(hw, 0x14, 0x3daf);
+ rtl_mdio_write(hw, 0x14, 0x853d);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x45ad);
+ rtl_mdio_write(hw, 0x14, 0x2052);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7ae3);
+ rtl_mdio_write(hw, 0x14, 0x85fe);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f6);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7a1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fa);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7be3);
+ rtl_mdio_write(hw, 0x14, 0x85fe);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f7);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7b1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fb);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7ce3);
+ rtl_mdio_write(hw, 0x14, 0x85fe);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f8);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7c1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fc);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7de3);
+ rtl_mdio_write(hw, 0x14, 0x85fe);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f9);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7d1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fd);
+ rtl_mdio_write(hw, 0x14, 0xae50);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7ee3);
+ rtl_mdio_write(hw, 0x14, 0x85ff);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f6);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7e1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fa);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7fe3);
+ rtl_mdio_write(hw, 0x14, 0x85ff);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f7);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x7f1b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fb);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x80e3);
+ rtl_mdio_write(hw, 0x14, 0x85ff);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f8);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x801b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fc);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x81e3);
+ rtl_mdio_write(hw, 0x14, 0x85ff);
+ rtl_mdio_write(hw, 0x14, 0x1a03);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x85f9);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x811b);
+ rtl_mdio_write(hw, 0x14, 0x03e4);
+ rtl_mdio_write(hw, 0x14, 0x85fd);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf6ad);
+ rtl_mdio_write(hw, 0x14, 0x2404);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xf610);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf7ad);
+ rtl_mdio_write(hw, 0x14, 0x2404);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xf710);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf8ad);
+ rtl_mdio_write(hw, 0x14, 0x2404);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xf810);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf9ad);
+ rtl_mdio_write(hw, 0x14, 0x2404);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xf910);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfaad);
+ rtl_mdio_write(hw, 0x14, 0x2704);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xfa00);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfbad);
+ rtl_mdio_write(hw, 0x14, 0x2704);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xfb00);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfcad);
+ rtl_mdio_write(hw, 0x14, 0x2704);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xfc00);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfdad);
+ rtl_mdio_write(hw, 0x14, 0x2704);
+ rtl_mdio_write(hw, 0x14, 0xee85);
+ rtl_mdio_write(hw, 0x14, 0xfd00);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44ad);
+ rtl_mdio_write(hw, 0x14, 0x203f);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf6e4);
+ rtl_mdio_write(hw, 0x14, 0x8288);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfae4);
+ rtl_mdio_write(hw, 0x14, 0x8289);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x440d);
+ rtl_mdio_write(hw, 0x14, 0x0458);
+ rtl_mdio_write(hw, 0x14, 0x01bf);
+ rtl_mdio_write(hw, 0x14, 0x8264);
+ rtl_mdio_write(hw, 0x14, 0x0215);
+ rtl_mdio_write(hw, 0x14, 0x38bf);
+ rtl_mdio_write(hw, 0x14, 0x824e);
+ rtl_mdio_write(hw, 0x14, 0x0213);
+ rtl_mdio_write(hw, 0x14, 0x06a0);
+ rtl_mdio_write(hw, 0x14, 0x010f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44f6);
+ rtl_mdio_write(hw, 0x14, 0x20e4);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x580f);
+ rtl_mdio_write(hw, 0x14, 0xe582);
+ rtl_mdio_write(hw, 0x14, 0x5aae);
+ rtl_mdio_write(hw, 0x14, 0x0ebf);
+ rtl_mdio_write(hw, 0x14, 0x825e);
+ rtl_mdio_write(hw, 0x14, 0xe382);
+ rtl_mdio_write(hw, 0x14, 0x44f7);
+ rtl_mdio_write(hw, 0x14, 0x3ce7);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x0212);
+ rtl_mdio_write(hw, 0x14, 0xf0ad);
+ rtl_mdio_write(hw, 0x14, 0x213f);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf7e4);
+ rtl_mdio_write(hw, 0x14, 0x8288);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfbe4);
+ rtl_mdio_write(hw, 0x14, 0x8289);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x440d);
+ rtl_mdio_write(hw, 0x14, 0x0558);
+ rtl_mdio_write(hw, 0x14, 0x01bf);
+ rtl_mdio_write(hw, 0x14, 0x826b);
+ rtl_mdio_write(hw, 0x14, 0x0215);
+ rtl_mdio_write(hw, 0x14, 0x38bf);
+ rtl_mdio_write(hw, 0x14, 0x824f);
+ rtl_mdio_write(hw, 0x14, 0x0213);
+ rtl_mdio_write(hw, 0x14, 0x06a0);
+ rtl_mdio_write(hw, 0x14, 0x010f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44f6);
+ rtl_mdio_write(hw, 0x14, 0x21e4);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x580f);
+ rtl_mdio_write(hw, 0x14, 0xe582);
+ rtl_mdio_write(hw, 0x14, 0x5bae);
+ rtl_mdio_write(hw, 0x14, 0x0ebf);
+ rtl_mdio_write(hw, 0x14, 0x8265);
+ rtl_mdio_write(hw, 0x14, 0xe382);
+ rtl_mdio_write(hw, 0x14, 0x44f7);
+ rtl_mdio_write(hw, 0x14, 0x3de7);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x0212);
+ rtl_mdio_write(hw, 0x14, 0xf0ad);
+ rtl_mdio_write(hw, 0x14, 0x223f);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf8e4);
+ rtl_mdio_write(hw, 0x14, 0x8288);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfce4);
+ rtl_mdio_write(hw, 0x14, 0x8289);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x440d);
+ rtl_mdio_write(hw, 0x14, 0x0658);
+ rtl_mdio_write(hw, 0x14, 0x01bf);
+ rtl_mdio_write(hw, 0x14, 0x8272);
+ rtl_mdio_write(hw, 0x14, 0x0215);
+ rtl_mdio_write(hw, 0x14, 0x38bf);
+ rtl_mdio_write(hw, 0x14, 0x8250);
+ rtl_mdio_write(hw, 0x14, 0x0213);
+ rtl_mdio_write(hw, 0x14, 0x06a0);
+ rtl_mdio_write(hw, 0x14, 0x010f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44f6);
+ rtl_mdio_write(hw, 0x14, 0x22e4);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x580f);
+ rtl_mdio_write(hw, 0x14, 0xe582);
+ rtl_mdio_write(hw, 0x14, 0x5cae);
+ rtl_mdio_write(hw, 0x14, 0x0ebf);
+ rtl_mdio_write(hw, 0x14, 0x826c);
+ rtl_mdio_write(hw, 0x14, 0xe382);
+ rtl_mdio_write(hw, 0x14, 0x44f7);
+ rtl_mdio_write(hw, 0x14, 0x3ee7);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x0212);
+ rtl_mdio_write(hw, 0x14, 0xf0ad);
+ rtl_mdio_write(hw, 0x14, 0x233f);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xf9e4);
+ rtl_mdio_write(hw, 0x14, 0x8288);
+ rtl_mdio_write(hw, 0x14, 0xe085);
+ rtl_mdio_write(hw, 0x14, 0xfde4);
+ rtl_mdio_write(hw, 0x14, 0x8289);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x440d);
+ rtl_mdio_write(hw, 0x14, 0x0758);
+ rtl_mdio_write(hw, 0x14, 0x01bf);
+ rtl_mdio_write(hw, 0x14, 0x8279);
+ rtl_mdio_write(hw, 0x14, 0x0215);
+ rtl_mdio_write(hw, 0x14, 0x38bf);
+ rtl_mdio_write(hw, 0x14, 0x8251);
+ rtl_mdio_write(hw, 0x14, 0x0213);
+ rtl_mdio_write(hw, 0x14, 0x06a0);
+ rtl_mdio_write(hw, 0x14, 0x010f);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0x44f6);
+ rtl_mdio_write(hw, 0x14, 0x23e4);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x580f);
+ rtl_mdio_write(hw, 0x14, 0xe582);
+ rtl_mdio_write(hw, 0x14, 0x5dae);
+ rtl_mdio_write(hw, 0x14, 0x0ebf);
+ rtl_mdio_write(hw, 0x14, 0x8273);
+ rtl_mdio_write(hw, 0x14, 0xe382);
+ rtl_mdio_write(hw, 0x14, 0x44f7);
+ rtl_mdio_write(hw, 0x14, 0x3fe7);
+ rtl_mdio_write(hw, 0x14, 0x8244);
+ rtl_mdio_write(hw, 0x14, 0x0212);
+ rtl_mdio_write(hw, 0x14, 0xf0ee);
+ rtl_mdio_write(hw, 0x14, 0x8288);
+ rtl_mdio_write(hw, 0x14, 0x10ee);
+ rtl_mdio_write(hw, 0x14, 0x8289);
+ rtl_mdio_write(hw, 0x14, 0x00af);
+ rtl_mdio_write(hw, 0x14, 0x14aa);
+ rtl_mdio_write(hw, 0x13, 0xb818);
+ rtl_mdio_write(hw, 0x14, 0x13cf);
+ rtl_mdio_write(hw, 0x13, 0xb81a);
+ rtl_mdio_write(hw, 0x14, 0xfffd);
+ rtl_mdio_write(hw, 0x13, 0xb81c);
+ rtl_mdio_write(hw, 0x14, 0xfffd);
+ rtl_mdio_write(hw, 0x13, 0xb81e);
+ rtl_mdio_write(hw, 0x14, 0xfffd);
+ rtl_mdio_write(hw, 0x13, 0xb832);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x17);
+ gphy_val &= ~BIT_0;
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8028);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+static void
+rtl8168_set_phy_mcu_8168h_3(struct rtl_hw *hw)
+{
+ unsigned int gphy_val;
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8042);
+ rtl_mdio_write(hw, 0x14, 0x3800);
+ rtl_mdio_write(hw, 0x13, 0xB82E);
+ rtl_mdio_write(hw, 0x14, 0x0001);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0090);
+ rtl_mdio_write(hw, 0x13, 0xA016);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA012);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x13, 0xA014);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8010);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8014);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x8022);
+ rtl_mdio_write(hw, 0x14, 0x2b5d);
+ rtl_mdio_write(hw, 0x14, 0x0c68);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x0b3c);
+ rtl_mdio_write(hw, 0x14, 0xc2bb);
+ rtl_mdio_write(hw, 0x14, 0xd500);
+ rtl_mdio_write(hw, 0x14, 0xc426);
+ rtl_mdio_write(hw, 0x14, 0xd01d);
+ rtl_mdio_write(hw, 0x14, 0xd1c3);
+ rtl_mdio_write(hw, 0x14, 0x401c);
+ rtl_mdio_write(hw, 0x14, 0xd501);
+ rtl_mdio_write(hw, 0x14, 0xc2b3);
+ rtl_mdio_write(hw, 0x14, 0xd500);
+ rtl_mdio_write(hw, 0x14, 0xd00b);
+ rtl_mdio_write(hw, 0x14, 0xd1c3);
+ rtl_mdio_write(hw, 0x14, 0x401c);
+ rtl_mdio_write(hw, 0x14, 0x1800);
+ rtl_mdio_write(hw, 0x14, 0x0478);
+ rtl_mdio_write(hw, 0x13, 0xA026);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA024);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA022);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA020);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA006);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA004);
+ rtl_mdio_write(hw, 0x14, 0x0fff);
+ rtl_mdio_write(hw, 0x13, 0xA002);
+ rtl_mdio_write(hw, 0x14, 0x0472);
+ rtl_mdio_write(hw, 0x13, 0xA000);
+ rtl_mdio_write(hw, 0x14, 0x0b3a);
+ rtl_mdio_write(hw, 0x13, 0xA008);
+ rtl_mdio_write(hw, 0x14, 0x0300);
+ rtl_mdio_write(hw, 0x13, 0xB820);
+ rtl_mdio_write(hw, 0x14, 0x0010);
+
+ rtl_mdio_write(hw, 0x13, 0x83f3);
+ rtl_mdio_write(hw, 0x14, 0xaf84);
+ rtl_mdio_write(hw, 0x14, 0x0baf);
+ rtl_mdio_write(hw, 0x14, 0x8466);
+ rtl_mdio_write(hw, 0x14, 0xaf84);
+ rtl_mdio_write(hw, 0x14, 0xcdaf);
+ rtl_mdio_write(hw, 0x14, 0x873c);
+ rtl_mdio_write(hw, 0x14, 0xaf87);
+ rtl_mdio_write(hw, 0x14, 0x3faf);
+ rtl_mdio_write(hw, 0x14, 0x8760);
+ rtl_mdio_write(hw, 0x14, 0xaf87);
+ rtl_mdio_write(hw, 0x14, 0x60af);
+ rtl_mdio_write(hw, 0x14, 0x8760);
+ rtl_mdio_write(hw, 0x14, 0xef79);
+ rtl_mdio_write(hw, 0x14, 0xfb89);
+ rtl_mdio_write(hw, 0x14, 0xe987);
+ rtl_mdio_write(hw, 0x14, 0xffd7);
+ rtl_mdio_write(hw, 0x14, 0x0017);
+ rtl_mdio_write(hw, 0x14, 0xd400);
+ rtl_mdio_write(hw, 0x14, 0x051c);
+ rtl_mdio_write(hw, 0x14, 0x421a);
+ rtl_mdio_write(hw, 0x14, 0x741b);
+ rtl_mdio_write(hw, 0x14, 0x97e9);
+ rtl_mdio_write(hw, 0x14, 0x87fe);
+ rtl_mdio_write(hw, 0x14, 0xffef);
+ rtl_mdio_write(hw, 0x14, 0x97e0);
+ rtl_mdio_write(hw, 0x14, 0x82aa);
+ rtl_mdio_write(hw, 0x14, 0xa000);
+ rtl_mdio_write(hw, 0x14, 0x08ef);
+ rtl_mdio_write(hw, 0x14, 0x46dc);
+ rtl_mdio_write(hw, 0x14, 0x19dd);
+ rtl_mdio_write(hw, 0x14, 0xaf1a);
+ rtl_mdio_write(hw, 0x14, 0x37a0);
+ rtl_mdio_write(hw, 0x14, 0x012d);
+ rtl_mdio_write(hw, 0x14, 0xe082);
+ rtl_mdio_write(hw, 0x14, 0xa7ac);
+ rtl_mdio_write(hw, 0x14, 0x2013);
+ rtl_mdio_write(hw, 0x14, 0xe087);
+ rtl_mdio_write(hw, 0x14, 0xffe1);
+ rtl_mdio_write(hw, 0x14, 0x87fe);
+ rtl_mdio_write(hw, 0x14, 0xac27);
+ rtl_mdio_write(hw, 0x14, 0x05a1);
+ rtl_mdio_write(hw, 0x14, 0x0807);
+ rtl_mdio_write(hw, 0x14, 0xae0f);
+ rtl_mdio_write(hw, 0x14, 0xa107);
+ rtl_mdio_write(hw, 0x14, 0x02ae);
+ rtl_mdio_write(hw, 0x14, 0x0aef);
+ rtl_mdio_write(hw, 0x14, 0x4619);
+ rtl_mdio_write(hw, 0x14, 0x19dc);
+ rtl_mdio_write(hw, 0x14, 0x19dd);
+ rtl_mdio_write(hw, 0x14, 0xaf1a);
+ rtl_mdio_write(hw, 0x14, 0x37d8);
+ rtl_mdio_write(hw, 0x14, 0x19d9);
+ rtl_mdio_write(hw, 0x14, 0x19dc);
+ rtl_mdio_write(hw, 0x14, 0x19dd);
+ rtl_mdio_write(hw, 0x14, 0xaf1a);
+ rtl_mdio_write(hw, 0x14, 0x3719);
+ rtl_mdio_write(hw, 0x14, 0x19ae);
+ rtl_mdio_write(hw, 0x14, 0xcfbf);
+ rtl_mdio_write(hw, 0x14, 0x878a);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdc3c);
+ rtl_mdio_write(hw, 0x14, 0x0005);
+ rtl_mdio_write(hw, 0x14, 0xaaf5);
+ rtl_mdio_write(hw, 0x14, 0x0249);
+ rtl_mdio_write(hw, 0x14, 0xcaef);
+ rtl_mdio_write(hw, 0x14, 0x67d7);
+ rtl_mdio_write(hw, 0x14, 0x0014);
+ rtl_mdio_write(hw, 0x14, 0x0249);
+ rtl_mdio_write(hw, 0x14, 0xe5ad);
+ rtl_mdio_write(hw, 0x14, 0x50f7);
+ rtl_mdio_write(hw, 0x14, 0xd400);
+ rtl_mdio_write(hw, 0x14, 0x01bf);
+ rtl_mdio_write(hw, 0x14, 0x46a7);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0x98bf);
+ rtl_mdio_write(hw, 0x14, 0x465c);
+ rtl_mdio_write(hw, 0x14, 0x024a);
+ rtl_mdio_write(hw, 0x14, 0x5fd4);
+ rtl_mdio_write(hw, 0x14, 0x0003);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9c02);
+ rtl_mdio_write(hw, 0x14, 0x4498);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9902);
+ rtl_mdio_write(hw, 0x14, 0x4a5f);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x8d02);
+ rtl_mdio_write(hw, 0x14, 0x4a5f);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9002);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0xad28);
+ rtl_mdio_write(hw, 0x14, 0xf7bf);
+ rtl_mdio_write(hw, 0x14, 0x8796);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcad);
+ rtl_mdio_write(hw, 0x14, 0x28f7);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9302);
+ rtl_mdio_write(hw, 0x14, 0x4a5f);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9302);
+ rtl_mdio_write(hw, 0x14, 0x4a56);
+ rtl_mdio_write(hw, 0x14, 0xbf46);
+ rtl_mdio_write(hw, 0x14, 0x5c02);
+ rtl_mdio_write(hw, 0x14, 0x4a56);
+ rtl_mdio_write(hw, 0x14, 0xbf45);
+ rtl_mdio_write(hw, 0x14, 0x21af);
+ rtl_mdio_write(hw, 0x14, 0x020e);
+ rtl_mdio_write(hw, 0x14, 0xee82);
+ rtl_mdio_write(hw, 0x14, 0x5000);
+ rtl_mdio_write(hw, 0x14, 0x0284);
+ rtl_mdio_write(hw, 0x14, 0xdd02);
+ rtl_mdio_write(hw, 0x14, 0x8521);
+ rtl_mdio_write(hw, 0x14, 0x0285);
+ rtl_mdio_write(hw, 0x14, 0x36af);
+ rtl_mdio_write(hw, 0x14, 0x03d2);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfafb);
+ rtl_mdio_write(hw, 0x14, 0xef59);
+ rtl_mdio_write(hw, 0x14, 0xbf45);
+ rtl_mdio_write(hw, 0x14, 0x3002);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0x3c00);
+ rtl_mdio_write(hw, 0x14, 0x03aa);
+ rtl_mdio_write(hw, 0x14, 0x2cbf);
+ rtl_mdio_write(hw, 0x14, 0x8790);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcad);
+ rtl_mdio_write(hw, 0x14, 0x2823);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x9602);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0xad28);
+ rtl_mdio_write(hw, 0x14, 0x1a02);
+ rtl_mdio_write(hw, 0x14, 0x49ca);
+ rtl_mdio_write(hw, 0x14, 0xef67);
+ rtl_mdio_write(hw, 0x14, 0xd700);
+ rtl_mdio_write(hw, 0x14, 0x0202);
+ rtl_mdio_write(hw, 0x14, 0x49e5);
+ rtl_mdio_write(hw, 0x14, 0xad50);
+ rtl_mdio_write(hw, 0x14, 0xf7bf);
+ rtl_mdio_write(hw, 0x14, 0x8793);
+ rtl_mdio_write(hw, 0x14, 0x024a);
+ rtl_mdio_write(hw, 0x14, 0x5fbf);
+ rtl_mdio_write(hw, 0x14, 0x8793);
+ rtl_mdio_write(hw, 0x14, 0x024a);
+ rtl_mdio_write(hw, 0x14, 0x56ef);
+ rtl_mdio_write(hw, 0x14, 0x95ff);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xe080);
+ rtl_mdio_write(hw, 0x14, 0x15ad);
+ rtl_mdio_write(hw, 0x14, 0x2406);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x8702);
+ rtl_mdio_write(hw, 0x14, 0x4a56);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xe087);
+ rtl_mdio_write(hw, 0x14, 0xf9e1);
+ rtl_mdio_write(hw, 0x14, 0x87fa);
+ rtl_mdio_write(hw, 0x14, 0x1b10);
+ rtl_mdio_write(hw, 0x14, 0x9f1e);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xf900);
+ rtl_mdio_write(hw, 0x14, 0xe080);
+ rtl_mdio_write(hw, 0x14, 0x15ac);
+ rtl_mdio_write(hw, 0x14, 0x2606);
+ rtl_mdio_write(hw, 0x14, 0xee87);
+ rtl_mdio_write(hw, 0x14, 0xf700);
+ rtl_mdio_write(hw, 0x14, 0xae12);
+ rtl_mdio_write(hw, 0x14, 0x0286);
+ rtl_mdio_write(hw, 0x14, 0x9d02);
+ rtl_mdio_write(hw, 0x14, 0x8565);
+ rtl_mdio_write(hw, 0x14, 0x0285);
+ rtl_mdio_write(hw, 0x14, 0x9d02);
+ rtl_mdio_write(hw, 0x14, 0x8660);
+ rtl_mdio_write(hw, 0x14, 0xae04);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x87f9);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69fa);
+ rtl_mdio_write(hw, 0x14, 0xbf45);
+ rtl_mdio_write(hw, 0x14, 0x3002);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0xa103);
+ rtl_mdio_write(hw, 0x14, 0x22e0);
+ rtl_mdio_write(hw, 0x14, 0x87eb);
+ rtl_mdio_write(hw, 0x14, 0xe187);
+ rtl_mdio_write(hw, 0x14, 0xecef);
+ rtl_mdio_write(hw, 0x14, 0x64bf);
+ rtl_mdio_write(hw, 0x14, 0x876f);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdc1b);
+ rtl_mdio_write(hw, 0x14, 0x46aa);
+ rtl_mdio_write(hw, 0x14, 0x0abf);
+ rtl_mdio_write(hw, 0x14, 0x8772);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdc1b);
+ rtl_mdio_write(hw, 0x14, 0x46ab);
+ rtl_mdio_write(hw, 0x14, 0x06bf);
+ rtl_mdio_write(hw, 0x14, 0x876c);
+ rtl_mdio_write(hw, 0x14, 0x024a);
+ rtl_mdio_write(hw, 0x14, 0x5ffe);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xef59);
+ rtl_mdio_write(hw, 0x14, 0xf9bf);
+ rtl_mdio_write(hw, 0x14, 0x4530);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdca1);
+ rtl_mdio_write(hw, 0x14, 0x0310);
+ rtl_mdio_write(hw, 0x14, 0xe087);
+ rtl_mdio_write(hw, 0x14, 0xf7ac);
+ rtl_mdio_write(hw, 0x14, 0x2605);
+ rtl_mdio_write(hw, 0x14, 0x0285);
+ rtl_mdio_write(hw, 0x14, 0xc9ae);
+ rtl_mdio_write(hw, 0x14, 0x0d02);
+ rtl_mdio_write(hw, 0x14, 0x8613);
+ rtl_mdio_write(hw, 0x14, 0xae08);
+ rtl_mdio_write(hw, 0x14, 0xe287);
+ rtl_mdio_write(hw, 0x14, 0xf7f6);
+ rtl_mdio_write(hw, 0x14, 0x36e6);
+ rtl_mdio_write(hw, 0x14, 0x87f7);
+ rtl_mdio_write(hw, 0x14, 0xfdef);
+ rtl_mdio_write(hw, 0x14, 0x95fd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfafb);
+ rtl_mdio_write(hw, 0x14, 0xef79);
+ rtl_mdio_write(hw, 0x14, 0xfbbf);
+ rtl_mdio_write(hw, 0x14, 0x876f);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcef);
+ rtl_mdio_write(hw, 0x14, 0x64e2);
+ rtl_mdio_write(hw, 0x14, 0x87e9);
+ rtl_mdio_write(hw, 0x14, 0xe387);
+ rtl_mdio_write(hw, 0x14, 0xea1b);
+ rtl_mdio_write(hw, 0x14, 0x659e);
+ rtl_mdio_write(hw, 0x14, 0x10e4);
+ rtl_mdio_write(hw, 0x14, 0x87e9);
+ rtl_mdio_write(hw, 0x14, 0xe587);
+ rtl_mdio_write(hw, 0x14, 0xeae2);
+ rtl_mdio_write(hw, 0x14, 0x87f7);
+ rtl_mdio_write(hw, 0x14, 0xf636);
+ rtl_mdio_write(hw, 0x14, 0xe687);
+ rtl_mdio_write(hw, 0x14, 0xf7ae);
+ rtl_mdio_write(hw, 0x14, 0x19e2);
+ rtl_mdio_write(hw, 0x14, 0x87f7);
+ rtl_mdio_write(hw, 0x14, 0xf736);
+ rtl_mdio_write(hw, 0x14, 0xe687);
+ rtl_mdio_write(hw, 0x14, 0xf700);
+ rtl_mdio_write(hw, 0x14, 0x00ae);
+ rtl_mdio_write(hw, 0x14, 0x0200);
+ rtl_mdio_write(hw, 0x14, 0x0002);
+ rtl_mdio_write(hw, 0x14, 0x49ca);
+ rtl_mdio_write(hw, 0x14, 0xef57);
+ rtl_mdio_write(hw, 0x14, 0xe687);
+ rtl_mdio_write(hw, 0x14, 0xe7e7);
+ rtl_mdio_write(hw, 0x14, 0x87e8);
+ rtl_mdio_write(hw, 0x14, 0xffef);
+ rtl_mdio_write(hw, 0x14, 0x97ff);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfafb);
+ rtl_mdio_write(hw, 0x14, 0xef79);
+ rtl_mdio_write(hw, 0x14, 0xfbe2);
+ rtl_mdio_write(hw, 0x14, 0x87e7);
+ rtl_mdio_write(hw, 0x14, 0xe387);
+ rtl_mdio_write(hw, 0x14, 0xe8ef);
+ rtl_mdio_write(hw, 0x14, 0x65e2);
+ rtl_mdio_write(hw, 0x14, 0x87fb);
+ rtl_mdio_write(hw, 0x14, 0xe387);
+ rtl_mdio_write(hw, 0x14, 0xfcef);
+ rtl_mdio_write(hw, 0x14, 0x7502);
+ rtl_mdio_write(hw, 0x14, 0x49e5);
+ rtl_mdio_write(hw, 0x14, 0xac50);
+ rtl_mdio_write(hw, 0x14, 0x1abf);
+ rtl_mdio_write(hw, 0x14, 0x876f);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcef);
+ rtl_mdio_write(hw, 0x14, 0x64e2);
+ rtl_mdio_write(hw, 0x14, 0x87e9);
+ rtl_mdio_write(hw, 0x14, 0xe387);
+ rtl_mdio_write(hw, 0x14, 0xea1b);
+ rtl_mdio_write(hw, 0x14, 0x659e);
+ rtl_mdio_write(hw, 0x14, 0x16e4);
+ rtl_mdio_write(hw, 0x14, 0x87e9);
+ rtl_mdio_write(hw, 0x14, 0xe587);
+ rtl_mdio_write(hw, 0x14, 0xeaae);
+ rtl_mdio_write(hw, 0x14, 0x06bf);
+ rtl_mdio_write(hw, 0x14, 0x876c);
+ rtl_mdio_write(hw, 0x14, 0x024a);
+ rtl_mdio_write(hw, 0x14, 0x5fe2);
+ rtl_mdio_write(hw, 0x14, 0x87f7);
+ rtl_mdio_write(hw, 0x14, 0xf636);
+ rtl_mdio_write(hw, 0x14, 0xe687);
+ rtl_mdio_write(hw, 0x14, 0xf7ff);
+ rtl_mdio_write(hw, 0x14, 0xef97);
+ rtl_mdio_write(hw, 0x14, 0xfffe);
+ rtl_mdio_write(hw, 0x14, 0xfdfc);
+ rtl_mdio_write(hw, 0x14, 0x04f8);
+ rtl_mdio_write(hw, 0x14, 0xf9fa);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x6602);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0xad28);
+ rtl_mdio_write(hw, 0x14, 0x29bf);
+ rtl_mdio_write(hw, 0x14, 0x8763);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcef);
+ rtl_mdio_write(hw, 0x14, 0x54bf);
+ rtl_mdio_write(hw, 0x14, 0x8760);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdcac);
+ rtl_mdio_write(hw, 0x14, 0x290d);
+ rtl_mdio_write(hw, 0x14, 0xac28);
+ rtl_mdio_write(hw, 0x14, 0x05a3);
+ rtl_mdio_write(hw, 0x14, 0x020c);
+ rtl_mdio_write(hw, 0x14, 0xae10);
+ rtl_mdio_write(hw, 0x14, 0xa303);
+ rtl_mdio_write(hw, 0x14, 0x07ae);
+ rtl_mdio_write(hw, 0x14, 0x0ba3);
+ rtl_mdio_write(hw, 0x14, 0x0402);
+ rtl_mdio_write(hw, 0x14, 0xae06);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x6c02);
+ rtl_mdio_write(hw, 0x14, 0x4a5f);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8f9);
+ rtl_mdio_write(hw, 0x14, 0xfafb);
+ rtl_mdio_write(hw, 0x14, 0xef69);
+ rtl_mdio_write(hw, 0x14, 0xfae0);
+ rtl_mdio_write(hw, 0x14, 0x8015);
+ rtl_mdio_write(hw, 0x14, 0xad25);
+ rtl_mdio_write(hw, 0x14, 0x41d2);
+ rtl_mdio_write(hw, 0x14, 0x0002);
+ rtl_mdio_write(hw, 0x14, 0x86f3);
+ rtl_mdio_write(hw, 0x14, 0xe087);
+ rtl_mdio_write(hw, 0x14, 0xebe1);
+ rtl_mdio_write(hw, 0x14, 0x87ec);
+ rtl_mdio_write(hw, 0x14, 0x1b46);
+ rtl_mdio_write(hw, 0x14, 0xab26);
+ rtl_mdio_write(hw, 0x14, 0xd40b);
+ rtl_mdio_write(hw, 0x14, 0xff1b);
+ rtl_mdio_write(hw, 0x14, 0x46aa);
+ rtl_mdio_write(hw, 0x14, 0x1fac);
+ rtl_mdio_write(hw, 0x14, 0x3204);
+ rtl_mdio_write(hw, 0x14, 0xef32);
+ rtl_mdio_write(hw, 0x14, 0xae02);
+ rtl_mdio_write(hw, 0x14, 0xd304);
+ rtl_mdio_write(hw, 0x14, 0x0c31);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0xeb1a);
+ rtl_mdio_write(hw, 0x14, 0x93d8);
+ rtl_mdio_write(hw, 0x14, 0x19d9);
+ rtl_mdio_write(hw, 0x14, 0x1b46);
+ rtl_mdio_write(hw, 0x14, 0xab0e);
+ rtl_mdio_write(hw, 0x14, 0x19d8);
+ rtl_mdio_write(hw, 0x14, 0x19d9);
+ rtl_mdio_write(hw, 0x14, 0x1b46);
+ rtl_mdio_write(hw, 0x14, 0xaa06);
+ rtl_mdio_write(hw, 0x14, 0x12a2);
+ rtl_mdio_write(hw, 0x14, 0x08c9);
+ rtl_mdio_write(hw, 0x14, 0xae06);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x6902);
+ rtl_mdio_write(hw, 0x14, 0x4a5f);
+ rtl_mdio_write(hw, 0x14, 0xfeef);
+ rtl_mdio_write(hw, 0x14, 0x96ff);
+ rtl_mdio_write(hw, 0x14, 0xfefd);
+ rtl_mdio_write(hw, 0x14, 0xfc04);
+ rtl_mdio_write(hw, 0x14, 0xf8fb);
+ rtl_mdio_write(hw, 0x14, 0xef79);
+ rtl_mdio_write(hw, 0x14, 0xa200);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x876f);
+ rtl_mdio_write(hw, 0x14, 0xae33);
+ rtl_mdio_write(hw, 0x14, 0xa201);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x8772);
+ rtl_mdio_write(hw, 0x14, 0xae2b);
+ rtl_mdio_write(hw, 0x14, 0xa202);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x8775);
+ rtl_mdio_write(hw, 0x14, 0xae23);
+ rtl_mdio_write(hw, 0x14, 0xa203);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x8778);
+ rtl_mdio_write(hw, 0x14, 0xae1b);
+ rtl_mdio_write(hw, 0x14, 0xa204);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x877b);
+ rtl_mdio_write(hw, 0x14, 0xae13);
+ rtl_mdio_write(hw, 0x14, 0xa205);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x877e);
+ rtl_mdio_write(hw, 0x14, 0xae0b);
+ rtl_mdio_write(hw, 0x14, 0xa206);
+ rtl_mdio_write(hw, 0x14, 0x05bf);
+ rtl_mdio_write(hw, 0x14, 0x8781);
+ rtl_mdio_write(hw, 0x14, 0xae03);
+ rtl_mdio_write(hw, 0x14, 0xbf87);
+ rtl_mdio_write(hw, 0x14, 0x8402);
+ rtl_mdio_write(hw, 0x14, 0x44dc);
+ rtl_mdio_write(hw, 0x14, 0xef64);
+ rtl_mdio_write(hw, 0x14, 0xef97);
+ rtl_mdio_write(hw, 0x14, 0xfffc);
+ rtl_mdio_write(hw, 0x14, 0x04af);
+ rtl_mdio_write(hw, 0x14, 0x00ed);
+ rtl_mdio_write(hw, 0x14, 0x0220);
+ rtl_mdio_write(hw, 0x14, 0xa5f8);
+ rtl_mdio_write(hw, 0x14, 0xfaef);
+ rtl_mdio_write(hw, 0x14, 0x69bf);
+ rtl_mdio_write(hw, 0x14, 0x4554);
+ rtl_mdio_write(hw, 0x14, 0x0244);
+ rtl_mdio_write(hw, 0x14, 0xdce0);
+ rtl_mdio_write(hw, 0x14, 0x87ff);
+ rtl_mdio_write(hw, 0x14, 0x1f01);
+ rtl_mdio_write(hw, 0x14, 0x9e06);
+ rtl_mdio_write(hw, 0x14, 0xe587);
+ rtl_mdio_write(hw, 0x14, 0xff02);
+ rtl_mdio_write(hw, 0x14, 0x4b05);
+ rtl_mdio_write(hw, 0x14, 0xef96);
+ rtl_mdio_write(hw, 0x14, 0xfefc);
+ rtl_mdio_write(hw, 0x14, 0xaf03);
+ rtl_mdio_write(hw, 0x14, 0x8c54);
+ rtl_mdio_write(hw, 0x14, 0xa434);
+ rtl_mdio_write(hw, 0x14, 0x74a6);
+ rtl_mdio_write(hw, 0x14, 0x0022);
+ rtl_mdio_write(hw, 0x14, 0xa434);
+ rtl_mdio_write(hw, 0x14, 0x11b8);
+ rtl_mdio_write(hw, 0x14, 0x4222);
+ rtl_mdio_write(hw, 0x14, 0xb842);
+ rtl_mdio_write(hw, 0x14, 0xf0a2);
+ rtl_mdio_write(hw, 0x14, 0x00f0);
+ rtl_mdio_write(hw, 0x14, 0xa202);
+ rtl_mdio_write(hw, 0x14, 0xf0a2);
+ rtl_mdio_write(hw, 0x14, 0x04f0);
+ rtl_mdio_write(hw, 0x14, 0xa206);
+ rtl_mdio_write(hw, 0x14, 0xf0a2);
+ rtl_mdio_write(hw, 0x14, 0x08f0);
+ rtl_mdio_write(hw, 0x14, 0xa20a);
+ rtl_mdio_write(hw, 0x14, 0xf0a2);
+ rtl_mdio_write(hw, 0x14, 0x0cf0);
+ rtl_mdio_write(hw, 0x14, 0xa20e);
+ rtl_mdio_write(hw, 0x14, 0x55b8);
+ rtl_mdio_write(hw, 0x14, 0x20d9);
+ rtl_mdio_write(hw, 0x14, 0xc608);
+ rtl_mdio_write(hw, 0x14, 0xaac4);
+ rtl_mdio_write(hw, 0x14, 0x3000);
+ rtl_mdio_write(hw, 0x14, 0xc614);
+ rtl_mdio_write(hw, 0x14, 0x33c4);
+ rtl_mdio_write(hw, 0x14, 0x1a88);
+ rtl_mdio_write(hw, 0x14, 0xc42e);
+ rtl_mdio_write(hw, 0x14, 0x22c4);
+ rtl_mdio_write(hw, 0x14, 0x2e54);
+ rtl_mdio_write(hw, 0x14, 0xc41a);
+ rtl_mdio_write(hw, 0x13, 0xb818);
+ rtl_mdio_write(hw, 0x14, 0x1a01);
+ rtl_mdio_write(hw, 0x13, 0xb81a);
+ rtl_mdio_write(hw, 0x14, 0x020b);
+ rtl_mdio_write(hw, 0x13, 0xb81c);
+ rtl_mdio_write(hw, 0x14, 0x03ce);
+ rtl_mdio_write(hw, 0x13, 0xb81e);
+ rtl_mdio_write(hw, 0x14, 0x00e7);
+ rtl_mdio_write(hw, 0x13, 0xb846);
+ rtl_mdio_write(hw, 0x14, 0x0389);
+ rtl_mdio_write(hw, 0x13, 0xb848);
+ rtl_mdio_write(hw, 0x14, 0xffff);
+ rtl_mdio_write(hw, 0x13, 0xb84a);
+ rtl_mdio_write(hw, 0x14, 0xffff);
+ rtl_mdio_write(hw, 0x13, 0xb84c);
+ rtl_mdio_write(hw, 0x14, 0xffff);
+ rtl_mdio_write(hw, 0x13, 0xb832);
+ rtl_mdio_write(hw, 0x14, 0x001f);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x0000);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ gphy_val = rtl_mdio_read(hw, 0x17);
+ gphy_val &= ~BIT_0;
+ rtl_mdio_write(hw, 0x17, gphy_val);
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8042);
+ rtl_mdio_write(hw, 0x14, 0x0000);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
+
+void
+hw_mac_mcu_config_8168h(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_29:
+ rtl8168_set_mac_mcu_8168h_1(hw);
+ break;
+ case CFG_METHOD_30:
+ case CFG_METHOD_37:
+ rtl8168_set_mac_mcu_8168h_2(hw);
+ break;
+ case CFG_METHOD_35:
+ rtl8168_set_mac_mcu_8168h_3(hw);
+ break;
+ case CFG_METHOD_36:
+ rtl8168_set_mac_mcu_8168h_4(hw);
+ break;
+ }
+}
+
+void
+hw_phy_mcu_config_8168h(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_29:
+ rtl8168_set_phy_mcu_8168h_1(hw);
+ break;
+ case CFG_METHOD_30:
+ case CFG_METHOD_37:
+ rtl8168_set_phy_mcu_8168h_2(hw);
+ break;
+ case CFG_METHOD_35:
+ rtl8168_set_phy_mcu_8168h_3(hw);
+ break;
+ case CFG_METHOD_36:
+ break;
+ }
+}
diff --git a/drivers/net/r8169/base/rtl8168m.c b/drivers/net/r8169/base/rtl8168m.c
new file mode 100644
index 0000000000..2b544c9fe8
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8168m.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_compat.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8168h.h"
+
+/* For RTL8168M, CFG_METHOD_37 */
+
+const struct rtl_hw_ops rtl8168m_ops = {
+ .hw_config = hw_config_8168h,
+ .hw_init_rxcfg = hw_init_rxcfg_8168h,
+ .hw_ephy_config = hw_ephy_config_8168h,
+ .hw_phy_config = hw_phy_config_8168h,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8168h,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8168h,
+};
diff --git a/drivers/net/r8169/meson.build b/drivers/net/r8169/meson.build
index d1e65377a3..720d79acff 100644
--- a/drivers/net/r8169/meson.build
+++ b/drivers/net/r8169/meson.build
@@ -18,4 +18,13 @@ sources = files(
'base/rtl8126a.c',
'base/rtl8126a_mcu.c',
'base/rtl8168kb.c',
+ 'base/rtl8168g.c',
+ 'base/rtl8168g_mcu.c',
+ 'base/rtl8168h.c',
+ 'base/rtl8168h_mcu.c',
+ 'base/rtl8168ep.c',
+ 'base/rtl8168ep_mcu.c',
+ 'base/rtl8168fp.c',
+ 'base/rtl8168fp_mcu.c',
+ 'base/rtl8168m.c',
)
\ No newline at end of file
diff --git a/drivers/net/r8169/r8169_compat.h b/drivers/net/r8169/r8169_compat.h
index f5b953b098..631acffb64 100644
--- a/drivers/net/r8169/r8169_compat.h
+++ b/drivers/net/r8169/r8169_compat.h
@@ -355,16 +355,16 @@ enum RTL_register_content {
/* Config3 register */
Isolate_en = (1UL << 12), /* Isolate enable */
MagicPacket = (1UL << 5), /* Wake up when receives a magic packet */
- LinkUp = (1UL << 4), /* This bit is reserved in RTL8125B. */
+ LinkUp = (1UL << 4),
/* Wake up when the cable connection is re-established */
- ECRCEN = (1UL << 3), /* This bit is reserved in RTL8125B. */
- Jumbo_En0 = (1UL << 2), /* This bit is reserved in RTL8125B. */
- RDY_TO_L23 = (1UL << 1), /* This bit is reserved in RTL8125B. */
- Beacon_en = (1UL << 0), /* This bit is reserved in RTL8125B. */
+ ECRCEN = (1UL << 3),
+ Jumbo_En0 = (1UL << 2),
+ RDY_TO_L23 = (1UL << 1),
+ Beacon_en = (1UL << 0),
/* Config4 register */
- Jumbo_En1 = (1UL << 1), /* This bit is reserved in RTL8125B. */
+ Jumbo_En1 = (1UL << 1),
/* Config5 register */
BWF = (1UL << 6), /* Accept broadcast wakeup frame */
@@ -380,8 +380,8 @@ enum RTL_register_content {
Force_halfdup = (1UL << 12),
Force_rxflow_en = (1UL << 11),
Force_txflow_en = (1UL << 10),
- Cxpl_dbg_sel = (1UL << 9), /* This bit is reserved in RTL8125B. */
- ASF = (1UL << 8), /* This bit is reserved in RTL8125C. */
+ Cxpl_dbg_sel = (1UL << 9),
+ ASF = (1UL << 8),
PktCntrDisable = (1UL << 7),
RxVlan = (1UL << 6),
RxChkSum = (1UL << 5),
@@ -508,6 +508,11 @@ enum RTL_chipset_name {
RTL8125BP,
RTL8125D,
RTL8126A,
+ RTL8168EP,
+ RTL8168FP,
+ RTL8168G,
+ RTL8168H,
+ RTL8168M,
UNKNOWN
};
@@ -540,6 +545,8 @@ enum RTL_chipset_name {
#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
#define Rx_Fetch_Number_8 (1 << 30)
#define Rx_Close_Multiple (1 << 21)
+#define RxEarly_off_V2 (1 << 11)
+#define Rx_Single_fetch_V2 (1 << 14)
#define TRUE 1
#define FALSE 0
@@ -567,8 +574,6 @@ enum RTL_chipset_name {
#define ADVERTISE_5000_HALF 0x0100 /* NOT used, just FYI */
#define ADVERTISE_5000_FULL 0x0200
-#define MAC_ADDR_LEN RTE_ETHER_ADDR_LEN
-
#define RTL_MAX_TX_DESC 4096
#define RTL_MAX_RX_DESC 4096
#define RTL_MIN_TX_DESC 64
diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c
index 21684b19eb..c26d7a5280 100644
--- a/drivers/net/r8169/r8169_dash.c
+++ b/drivers/net/r8169/r8169_dash.c
@@ -48,7 +48,7 @@ rtl_get_dash_fw_ver(struct rtl_hw *hw)
{
u32 ver = 0xffffffff;
- if (HW_DASH_SUPPORT_GET_FIRMWARE_VERSION(hw) == FALSE)
+ if (!HW_DASH_SUPPORT_GET_FIRMWARE_VERSION(hw))
goto exit;
ver = rtl_ocp_read(hw, OCP_REG_FIRMWARE_MAJOR_VERSION, 4);
@@ -63,46 +63,165 @@ _rtl_check_dash(struct rtl_hw *hw)
if (!hw->AllowAccessDashOcp)
return 0;
- if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_4(hw)) {
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_3(hw) ||
+ HW_DASH_SUPPORT_TYPE_4(hw)) {
if (rtl_ocp_read(hw, 0x128, 1) & BIT_0)
return 1;
+ else
+ return 0;
+ } else if (HW_DASH_SUPPORT_TYPE_1(hw)) {
+ if (rtl_ocp_read(hw, 0x10, 2) & 0x00008000)
+ return 1;
+ else
+ return 0;
+ } else {
+ return 0;
}
-
- return 0;
}
int
rtl_check_dash(struct rtl_hw *hw)
{
- u32 ver;
+ int dash_enabled;
+ u32 fw_ver;
- if (_rtl_check_dash(hw)) {
- ver = rtl_get_dash_fw_ver(hw);
- if (!(ver == 0 || ver == 0xffffffff))
- return 1;
+ dash_enabled = _rtl_check_dash(hw);
+
+ if (!dash_enabled)
+ goto exit;
+
+ if (!HW_DASH_SUPPORT_GET_FIRMWARE_VERSION(hw))
+ goto exit;
+
+ fw_ver = rtl_get_dash_fw_ver(hw);
+ if (fw_ver == 0 || fw_ver == 0xffffffff)
+ dash_enabled = 0;
+exit:
+ return dash_enabled;
+}
+
+static u32
+rtl8168_csi_to_cmac_r32(struct rtl_hw *hw)
+{
+ u32 cmd;
+ int i;
+ u32 value = 0;
+
+ cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | 0xf9;
+
+ cmd |= 1 << 16;
+
+ RTL_W32(hw, CSIAR, cmd);
+
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
+
+ /* Check if the RTL8168 has completed CSI read */
+ if (RTL_R32(hw, CSIAR) & CSIAR_Flag) {
+ value = RTL_R32(hw, CSIDR);
+ break;
+ }
}
- return 0;
+ rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
+
+ return value;
+}
+
+static u8
+rtl8168_csi_to_cmac_r8(struct rtl_hw *hw, u32 reg)
+{
+ u32 mask, value1 = 0;
+ u8 val_shift, value2 = 0;
+
+ val_shift = reg - 0xf8;
+
+ if (val_shift == 0)
+ mask = 0xFF;
+ else if (val_shift == 1)
+ mask = 0xFF00;
+ else if (val_shift == 2)
+ mask = 0xFF0000;
+ else if (val_shift == 3)
+ mask = 0xFF000000;
+
+ value1 = rtl8168_csi_to_cmac_r32(hw) & mask;
+ value2 = value1 >> (val_shift * 8);
+
+ return value2;
}
static void
-rtl8125_dash2_disable_tx(struct rtl_hw *hw)
+rtl8168_csi_to_cmac_w8(struct rtl_hw *hw, u32 reg, u8 value)
{
- u16 wait_cnt = 0;
- u8 tmp_uchar;
+ int i;
+ u8 val_shift;
+ u32 value32, cmd, mask;
- if (!HW_DASH_SUPPORT_CMAC(hw))
- return;
+ val_shift = reg - 0xf8;
- if (!hw->DASH)
- return;
+ if (val_shift == 0)
+ mask = 0xFF;
+ else if (val_shift == 1)
+ mask = 0xFF00;
+ else if (val_shift == 2)
+ mask = 0xFF0000;
+ else if (val_shift == 3)
+ mask = 0xFF000000;
+
+ value32 = rtl8168_csi_to_cmac_r32(hw) & ~mask;
+ value32 |= value << (val_shift * 8);
+ RTL_W32(hw, CSIDR, value32);
+
+ cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | 0xf9;
+
+ cmd |= 1 << 16;
+
+ RTL_W32(hw, CSIAR, cmd);
+
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
+
+ /* Check if the RTL8168 has completed CSI write */
+ if (!(RTL_R32(hw, CSIAR) & CSIAR_Flag))
+ break;
+ }
+
+ rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
+}
+
+static void
+rtl_cmac_w8(struct rtl_hw *hw, u32 reg, u8 value)
+{
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_4(hw))
+ RTL_CMAC_W8(hw, reg, value);
+ else if (HW_DASH_SUPPORT_TYPE_3(hw))
+ rtl8168_csi_to_cmac_w8(hw, reg, value);
+}
+
+static u8
+rtl_cmac_r8(struct rtl_hw *hw, u32 reg)
+{
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_4(hw))
+ return RTL_CMAC_R8(hw, reg);
+ else if (HW_DASH_SUPPORT_TYPE_3(hw))
+ return rtl8168_csi_to_cmac_r8(hw, reg);
+ else
+ return 0;
+}
+
+static void
+rtl_dash2_disable_tx(struct rtl_hw *hw)
+{
+ u16 wait_cnt = 0;
+ u8 tmp_uchar;
/* Disable oob Tx */
- RTL_CMAC_W8(hw, CMAC_IBCR2, RTL_CMAC_R8(hw, CMAC_IBCR2) & ~BIT_0);
+ rtl_cmac_w8(hw, CMAC_IBCR2, rtl_cmac_r8(hw, CMAC_IBCR2) & ~BIT_0);
/* Wait oob Tx disable */
do {
- tmp_uchar = RTL_CMAC_R8(hw, CMAC_IBISR0);
+ tmp_uchar = rtl_cmac_r8(hw, CMAC_IBISR0);
if (tmp_uchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE)
break;
@@ -111,30 +230,27 @@ rtl8125_dash2_disable_tx(struct rtl_hw *hw)
} while (wait_cnt < 2000);
/* Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE */
- RTL_CMAC_W8(hw, CMAC_IBISR0, RTL_CMAC_R8(hw, CMAC_IBISR0) |
+ rtl_cmac_w8(hw, CMAC_IBISR0, rtl_cmac_r8(hw, CMAC_IBISR0) |
ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
}
static void
-rtl8125_dash2_disable_rx(struct rtl_hw *hw)
+rtl_dash2_disable_rx(struct rtl_hw *hw)
{
- if (!HW_DASH_SUPPORT_CMAC(hw))
- return;
-
- if (!hw->DASH)
- return;
-
- RTL_CMAC_W8(hw, CMAC_IBCR0, RTL_CMAC_R8(hw, CMAC_IBCR0) & ~BIT_0);
+ rtl_cmac_w8(hw, CMAC_IBCR0, rtl_cmac_r8(hw, CMAC_IBCR0) & ~BIT_0);
}
void
-rtl8125_dash2_disable_txrx(struct rtl_hw *hw)
+rtl_dash2_disable_txrx(struct rtl_hw *hw)
{
if (!HW_DASH_SUPPORT_CMAC(hw))
return;
- rtl8125_dash2_disable_tx(hw);
- rtl8125_dash2_disable_rx(hw);
+ if (!hw->DASH)
+ return;
+
+ rtl_dash2_disable_tx(hw);
+ rtl_dash2_disable_rx(hw);
}
static void
@@ -154,7 +270,7 @@ rtl8125_notify_dash_oob_cmac(struct rtl_hw *hw, u32 cmd)
static void
rtl8125_notify_dash_oob_ipc2(struct rtl_hw *hw, u32 cmd)
{
- if (HW_DASH_SUPPORT_TYPE_4(hw) == FALSE)
+ if (!HW_DASH_SUPPORT_TYPE_4(hw))
return;
rtl_ocp_write(hw, IB2SOC_DATA, 4, cmd);
@@ -179,20 +295,36 @@ rtl8125_notify_dash_oob(struct rtl_hw *hw, u32 cmd)
}
static int
-rtl8125_wait_dash_fw_ready(struct rtl_hw *hw)
+rtl_wait_dash_fw_ready(struct rtl_hw *hw)
{
int rc = -1;
int timeout;
+ if (!HW_DASH_SUPPORT_DASH(hw))
+ goto out;
+
if (!hw->DASH)
goto out;
- for (timeout = 0; timeout < 10; timeout++) {
- rte_delay_ms(10);
- if (rtl_ocp_read(hw, 0x124, 1) & BIT_0) {
- rc = 1;
- goto out;
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_3(hw) ||
+ HW_DASH_SUPPORT_TYPE_4(hw)) {
+ for (timeout = 0; timeout < 10; timeout++) {
+ rte_delay_ms(10);
+ if (rtl_ocp_read(hw, 0x124, 1) & BIT_0) {
+ rc = 1;
+ goto out;
+ }
}
+ } else if (HW_DASH_SUPPORT_TYPE_1(hw)) {
+ for (timeout = 0; timeout < 10; timeout++) {
+ rte_delay_ms(10);
+ if (rtl_ocp_read(hw, 0x10, 2) & BIT_11) {
+ rc = 1;
+ goto out;
+ }
+ }
+ } else {
+ goto out;
}
rc = 0;
@@ -201,7 +333,7 @@ rtl8125_wait_dash_fw_ready(struct rtl_hw *hw)
return rc;
}
-void
+static void
rtl8125_driver_start(struct rtl_hw *hw)
{
if (!hw->AllowAccessDashOcp)
@@ -209,19 +341,242 @@ rtl8125_driver_start(struct rtl_hw *hw)
rtl8125_notify_dash_oob(hw, OOB_CMD_DRIVER_START);
- rtl8125_wait_dash_fw_ready(hw);
+ rtl_wait_dash_fw_ready(hw);
+}
+
+static void
+rtl8168_clear_and_set_other_fun_pci_bit(struct rtl_hw *hw, u8 multi_fun_sel_bit,
+ u32 addr, u32 clearmask, u32 setmask)
+{
+ u32 tmp_ulong;
+
+ tmp_ulong = rtl_csi_other_fun_read(hw, multi_fun_sel_bit, addr);
+ tmp_ulong &= ~clearmask;
+ tmp_ulong |= setmask;
+ rtl_csi_other_fun_write(hw, multi_fun_sel_bit, addr, tmp_ulong);
+}
+
+static void
+rtl8168_other_fun_dev_pci_setting(struct rtl_hw *hw, u32 addr, u32 clearmask,
+ u32 setmask, u8 multi_fun_sel_bit)
+{
+ u32 tmp_ulong;
+ u8 i;
+ u8 fun_bit;
+ u8 set_other_fun;
+
+ for (i = 0; i < 8; i++) {
+ fun_bit = (1 << i);
+ if (!(fun_bit & multi_fun_sel_bit))
+ continue;
+
+ set_other_fun = TRUE;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ /*
+ * 0: UMAC, 1: TCR1, 2: TCR2, 3: KCS,
+ * 4: EHCI(Control by EHCI Driver)
+ */
+ if (i < 5) {
+ tmp_ulong = rtl_csi_other_fun_read(hw, i, 0x00);
+ if (tmp_ulong == 0xFFFFFFFF)
+ set_other_fun = TRUE;
+ else
+ set_other_fun = FALSE;
+ }
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ /*
+ * 0: BMC, 1: NIC, 2: TCR, 3: VGA / PCIE_TO_USB,
+ * 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
+ */
+ if (i == 5 || i == 6) {
+ if (hw->DASH) {
+ tmp_ulong = rtl_ocp_read(hw, 0x184, 4);
+ if (tmp_ulong & BIT_26)
+ set_other_fun = FALSE;
+ else
+ set_other_fun = TRUE;
+ }
+ } else { /* Function 0/1/2/3/4/7 */
+ tmp_ulong = rtl_csi_other_fun_read(hw, i, 0x00);
+ if (tmp_ulong == 0xFFFFFFFF)
+ set_other_fun = TRUE;
+ else
+ set_other_fun = FALSE;
+ }
+ break;
+ default:
+ return;
+ }
+
+ if (set_other_fun)
+ rtl8168_clear_and_set_other_fun_pci_bit(hw, i, addr,
+ clearmask, setmask);
+ }
+}
+
+static void
+rtl8168_set_dash_other_fun_dev_state_change(struct rtl_hw *hw, u8 dev_state,
+ u8 multi_fun_sel_bit)
+{
+ u32 clearmask;
+ u32 setmask;
+
+ if (dev_state == 0) {
+ /* Goto D0 */
+ clearmask = (BIT_0 | BIT_1);
+ setmask = 0;
+
+ rtl8168_other_fun_dev_pci_setting(hw, 0x44, clearmask, setmask,
+ multi_fun_sel_bit);
+ } else {
+ /* Goto D3 */
+ clearmask = 0;
+ setmask = (BIT_0 | BIT_1);
+
+ rtl8168_other_fun_dev_pci_setting(hw, 0x44, clearmask, setmask,
+ multi_fun_sel_bit);
+ }
+}
+
+static void
+rtl8168_set_dash_other_fun_dev_aspm_clkreq(struct rtl_hw *hw, u8 aspm_val,
+ u8 clkreq_en, u8 multi_fun_sel_bit)
+{
+ u32 clearmask;
+ u32 setmask;
+
+ aspm_val &= (BIT_0 | BIT_1);
+ clearmask = (BIT_0 | BIT_1 | BIT_8);
+ setmask = aspm_val;
+ if (clkreq_en)
+ setmask |= BIT_8;
+
+ rtl8168_other_fun_dev_pci_setting(hw, 0x80, clearmask, setmask,
+ multi_fun_sel_bit);
+}
+
+static void
+rtl8168_oob_notify(struct rtl_hw *hw, u8 cmd)
+{
+ rtl_eri_write(hw, 0xE8, 1, cmd, ERIAR_ExGMAC);
+
+ rtl_ocp_write(hw, 0x30, 1, 0x01);
+}
+
+static void
+rtl8168_driver_start(struct rtl_hw *hw)
+{
+ u32 tmp_value;
+
+ /* Change other device state to D0. */
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ rtl8168_set_dash_other_fun_dev_aspm_clkreq(hw, 3, 1, 0x1E);
+ rtl8168_set_dash_other_fun_dev_state_change(hw, 3, 0x1E);
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ rtl8168_set_dash_other_fun_dev_aspm_clkreq(hw, 3, 1, 0xFC);
+ rtl8168_set_dash_other_fun_dev_state_change(hw, 3, 0xFC);
+ break;
+ }
+
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_3(hw)) {
+ rtl_ocp_write(hw, 0x180, 1, OOB_CMD_DRIVER_START);
+ tmp_value = rtl_ocp_read(hw, 0x30, 1);
+ tmp_value |= BIT_0;
+ rtl_ocp_write(hw, 0x30, 1, tmp_value);
+ } else {
+ rtl8168_oob_notify(hw, OOB_CMD_DRIVER_START);
+ }
+
+ rtl_wait_dash_fw_ready(hw);
}
void
+rtl_driver_start(struct rtl_hw *hw)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_driver_start(hw);
+ else
+ rtl8168_driver_start(hw);
+}
+
+static void
+rtl8168_driver_stop(struct rtl_hw *hw)
+{
+ u32 tmp_value;
+
+ if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_3(hw)) {
+ rtl_dash2_disable_txrx(hw);
+
+ rtl_ocp_write(hw, 0x180, 1, OOB_CMD_DRIVER_STOP);
+ tmp_value = rtl_ocp_read(hw, 0x30, 1);
+ tmp_value |= BIT_0;
+ rtl_ocp_write(hw, 0x30, 1, tmp_value);
+ } else if (HW_DASH_SUPPORT_TYPE_1(hw)) {
+ rtl8168_oob_notify(hw, OOB_CMD_DRIVER_STOP);
+ }
+
+ rtl_wait_dash_fw_ready(hw);
+
+ /* Change other device state to D3. */
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ rtl8168_set_dash_other_fun_dev_state_change(hw, 3, 0x0E);
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ rtl8168_set_dash_other_fun_dev_state_change(hw, 3, 0xFD);
+ break;
+ }
+}
+
+static void
rtl8125_driver_stop(struct rtl_hw *hw)
{
if (!hw->AllowAccessDashOcp)
return;
if (HW_DASH_SUPPORT_CMAC(hw))
- rtl8125_dash2_disable_txrx(hw);
+ rtl_dash2_disable_txrx(hw);
rtl8125_notify_dash_oob(hw, OOB_CMD_DRIVER_STOP);
- rtl8125_wait_dash_fw_ready(hw);
+ rtl_wait_dash_fw_ready(hw);
+}
+
+void
+rtl_driver_stop(struct rtl_hw *hw)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_driver_stop(hw);
+ else
+ rtl8168_driver_stop(hw);
+}
+
+bool
+rtl8168_check_dash_other_fun_present(struct rtl_hw *hw)
+{
+ /* Check if func 2 exist */
+ if (rtl_csi_other_fun_read(hw, 2, 0x00) != 0xffffffff)
+ return true;
+ else
+ return false;
}
diff --git a/drivers/net/r8169/r8169_dash.h b/drivers/net/r8169/r8169_dash.h
index daa572b456..47c5d6906e 100644
--- a/drivers/net/r8169/r8169_dash.h
+++ b/drivers/net/r8169/r8169_dash.h
@@ -50,8 +50,10 @@ bool rtl_is_allow_access_dash_ocp(struct rtl_hw *hw);
int rtl_check_dash(struct rtl_hw *hw);
-void rtl8125_driver_start(struct rtl_hw *hw);
-void rtl8125_driver_stop(struct rtl_hw *hw);
-void rtl8125_dash2_disable_txrx(struct rtl_hw *hw);
+void rtl_driver_start(struct rtl_hw *hw);
+void rtl_driver_stop(struct rtl_hw *hw);
+void rtl_dash2_disable_txrx(struct rtl_hw *hw);
+
+bool rtl8168_check_dash_other_fun_present(struct rtl_hw *hw);
#endif /* R8169_DASH_H */
diff --git a/drivers/net/r8169/r8169_ethdev.c b/drivers/net/r8169/r8169_ethdev.c
index c0cac6e7d8..e2ea9435fe 100644
--- a/drivers/net/r8169/r8169_ethdev.c
+++ b/drivers/net/r8169/r8169_ethdev.c
@@ -26,12 +26,12 @@
#include "r8169_hw.h"
#include "r8169_dash.h"
-static int rtl_dev_configure(struct rte_eth_dev *dev);
+static int rtl_dev_configure(struct rte_eth_dev *dev __rte_unused);
static int rtl_dev_start(struct rte_eth_dev *dev);
static int rtl_dev_stop(struct rte_eth_dev *dev);
static int rtl_dev_reset(struct rte_eth_dev *dev);
static int rtl_dev_close(struct rte_eth_dev *dev);
-static int rtl_dev_link_update(struct rte_eth_dev *dev, int wait);
+static int rtl_dev_link_update(struct rte_eth_dev *dev, int wait __rte_unused);
static int rtl_dev_set_link_up(struct rte_eth_dev *dev);
static int rtl_dev_set_link_down(struct rte_eth_dev *dev);
static int rtl_dev_infos_get(struct rte_eth_dev *dev,
@@ -55,6 +55,7 @@ static const struct rte_pci_id pci_id_r8169_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8162) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5000) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168) },
{.vendor_id = 0, /* sentinel */ },
};
@@ -116,15 +117,23 @@ static void
rtl_disable_intr(struct rtl_hw *hw)
{
PMD_INIT_FUNC_TRACE();
- RTL_W32(hw, IMR0_8125, 0x0000);
- RTL_W32(hw, ISR0_8125, RTL_R32(hw, ISR0_8125));
+ if (rtl_is_8125(hw)) {
+ RTL_W32(hw, IMR0_8125, 0x0000);
+ RTL_W32(hw, ISR0_8125, RTL_R32(hw, ISR0_8125));
+ } else {
+ RTL_W16(hw, IntrMask, 0x0000);
+ RTL_W16(hw, IntrStatus, RTL_R16(hw, IntrStatus));
+ }
}
static void
rtl_enable_intr(struct rtl_hw *hw)
{
PMD_INIT_FUNC_TRACE();
- RTL_W32(hw, IMR0_8125, LinkChg);
+ if (rtl_is_8125(hw))
+ RTL_W32(hw, IMR0_8125, LinkChg);
+ else
+ RTL_W16(hw, IntrMask, LinkChg);
}
static int
@@ -134,10 +143,35 @@ _rtl_setup_link(struct rte_eth_dev *dev)
struct rtl_hw *hw = &adapter->hw;
u64 adv = 0;
u32 *link_speeds = &dev->data->dev_conf.link_speeds;
+ unsigned int speed_mode;
/* Setup link speed and duplex */
if (*link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) {
- rtl_set_link_option(hw, AUTONEG_ENABLE, SPEED_5000, DUPLEX_FULL, rtl_fc_full);
+ switch (hw->mcfg) {
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ speed_mode = SPEED_2500;
+ break;
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ speed_mode = SPEED_5000;
+ break;
+ default:
+ speed_mode = SPEED_1000;
+ break;
+ }
+
+ rtl_set_link_option(hw, AUTONEG_ENABLE, speed_mode, DUPLEX_FULL,
+ rtl_fc_full);
} else if (*link_speeds != 0) {
if (*link_speeds & ~(RTE_ETH_LINK_SPEED_10M_HD | RTE_ETH_LINK_SPEED_10M |
RTE_ETH_LINK_SPEED_100M_HD | RTE_ETH_LINK_SPEED_100M |
@@ -225,6 +259,18 @@ rtl_setup_link(struct rte_eth_dev *dev)
return 0;
}
+/* Set PCI configuration space offset 0x79 to setting */
+static void
+set_offset79(struct rte_pci_device *pdev, u8 setting)
+{
+ u8 device_control;
+
+ PCI_READ_CONFIG_BYTE(pdev, &device_control, 0x79);
+ device_control &= ~0x70;
+ device_control |= setting;
+ PCI_WRITE_CONFIG_BYTE(pdev, &device_control, 0x79);
+}
+
/*
* Configure device link speed and setup link.
* It returns 0 on success.
@@ -249,6 +295,28 @@ rtl_dev_start(struct rte_eth_dev *dev)
rtl_hw_config(hw);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ set_offset79(pci_dev, 0x40);
+ break;
+ }
+
/* Initialize transmission unit */
rtl_tx_init(dev);
@@ -295,8 +363,19 @@ rtl_dev_stop(struct rte_eth_dev *dev)
rtl_nic_reset(hw);
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mac_ocp_write(hw, 0xE00A, hw->mcu_pme_setting);
break;
}
@@ -333,8 +412,19 @@ rtl_dev_set_link_down(struct rte_eth_dev *dev)
/* mcu pme intr masks */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mac_ocp_write(hw, 0xE00A, hw->mcu_pme_setting & ~(BIT_11 | BIT_14));
break;
}
@@ -515,20 +605,63 @@ rtl_dev_link_update(struct rte_eth_dev *dev, int wait __rte_unused)
if (status & FullDup) {
link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
- if (hw->mcfg == CFG_METHOD_2)
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
RTL_W32(hw, TxConfig, (RTL_R32(hw, TxConfig) |
- (BIT_24 | BIT_25)) & ~BIT_19);
-
+ (BIT_24 | BIT_25)) & ~BIT_19);
+ break;
+ }
} else {
link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
- if (hw->mcfg == CFG_METHOD_2)
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
RTL_W32(hw, TxConfig, (RTL_R32(hw, TxConfig) | BIT_25) &
- ~(BIT_19 | BIT_24));
+ ~(BIT_19 | BIT_24));
+ break;
+ }
}
- if (status & _5000bpsF)
+ /*
+ * The PHYstatus register for the RTL8168 is 8 bits,
+ * while for the RTL8125 and RTL8126, it is 16 bits.
+ */
+ if (status & _5000bpsF && rtl_is_8125(hw))
speed = 5000;
- else if (status & _2500bpsF)
+ else if (status & _2500bpsF && rtl_is_8125(hw))
speed = 2500;
else if (status & _1000bpsF)
speed = 1000;
@@ -556,7 +689,10 @@ rtl_dev_interrupt_handler(void *param)
struct rtl_hw *hw = &adapter->hw;
uint32_t intr;
- intr = RTL_R32(hw, ISR0_8125);
+ if (rtl_is_8125(hw))
+ intr = RTL_R32(hw, ISR0_8125);
+ else
+ intr = RTL_R16(hw, IntrStatus);
/* Clear all cause mask */
rtl_disable_intr(hw);
@@ -586,7 +722,7 @@ rtl_dev_close(struct rte_eth_dev *dev)
return 0;
if (HW_DASH_SUPPORT_DASH(hw))
- rtl8125_driver_stop(hw);
+ rtl_driver_stop(hw);
ret_stp = rtl_dev_stop(dev);
@@ -656,14 +792,15 @@ rtl_dev_init(struct rte_eth_dev *dev)
dev->tx_pkt_burst = &rtl_xmit_pkts;
dev->rx_pkt_burst = &rtl_recv_pkts;
- /* For secondary processes, the primary process has done all the work */
+ /* For secondary processes, the primary process has done all the work. */
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
if (dev->data->scattered_rx)
dev->rx_pkt_burst = &rtl_recv_scattered_pkts;
return 0;
}
- hw->mmio_addr = (u8 *)pci_dev->mem_resource[2].addr; /* RTL8169 uses BAR2 */
+ /* R8169 uses BAR2 */
+ hw->mmio_addr = (u8 *)pci_dev->mem_resource[2].addr;
rtl_get_mac_version(hw, pci_dev);
diff --git a/drivers/net/r8169/r8169_ethdev.h b/drivers/net/r8169/r8169_ethdev.h
index c5fd465ff0..0de91045fa 100644
--- a/drivers/net/r8169/r8169_ethdev.h
+++ b/drivers/net/r8169/r8169_ethdev.h
@@ -15,6 +15,7 @@
struct rtl_hw;
struct rtl_hw_ops {
+ void (*hw_config)(struct rtl_hw *hw);
void (*hw_init_rxcfg)(struct rtl_hw *hw);
void (*hw_ephy_config)(struct rtl_hw *hw);
void (*hw_phy_config)(struct rtl_hw *hw);
@@ -36,13 +37,12 @@ struct rtl_hw {
u8 *mmio_addr;
u8 *cmac_ioaddr; /* cmac memory map physical address */
u8 chipset_name;
- u8 efuse_ver;
u8 HwIcVerUnknown;
u32 mcfg;
u32 mtu;
u8 HwSuppIntMitiVer;
u16 cur_page;
- u8 mac_addr[MAC_ADDR_LEN];
+ u8 mac_addr[RTE_ETHER_ADDR_LEN];
u32 rx_buf_sz;
struct rtl_counters *tally_vaddr;
@@ -53,9 +53,9 @@ struct rtl_hw {
u8 HwSuppMacMcuVer;
u16 MacMcuPageSize;
- u8 NotWrRamCodeToMicroP;
- u8 HwHasWrRamCodeToMicroP;
- u8 HwSuppCheckPhyDisableModeVer;
+ u8 NotWrRamCodeToMicroP;
+ u8 HwHasWrRamCodeToMicroP;
+ u8 HwSuppCheckPhyDisableModeVer;
u16 sw_ram_code_ver;
u16 hw_ram_code_ver;
@@ -68,7 +68,7 @@ struct rtl_hw {
u32 HwSuppMaxPhyLinkSpeed;
- u8 HwSuppNowIsOobVer;
+ u8 HwSuppNowIsOobVer;
u16 mcu_pme_setting;
@@ -86,6 +86,8 @@ struct rtl_hw {
u8 DASH;
u8 HwSuppOcpChannelVer;
u8 AllowAccessDashOcp;
+ u8 HwPkgDet;
+ u8 HwSuppSerDesPhyVer;
};
struct rtl_sw_stats {
@@ -108,6 +110,24 @@ struct rtl_adapter {
#define R8169_LINK_CHECK_TIMEOUT 50 /* 10s */
#define R8169_LINK_CHECK_INTERVAL 200 /* ms */
+#define PCI_READ_CONFIG_BYTE(dev, val, where) \
+ rte_pci_read_config(dev, val, 1, where)
+
+#define PCI_READ_CONFIG_WORD(dev, val, where) \
+ rte_pci_read_config(dev, val, 2, where)
+
+#define PCI_READ_CONFIG_DWORD(dev, val, where) \
+ rte_pci_read_config(dev, val, 4, where)
+
+#define PCI_WRITE_CONFIG_BYTE(dev, val, where) \
+ rte_pci_write_config(dev, val, 1, where)
+
+#define PCI_WRITE_CONFIG_WORD(dev, val, where) \
+ rte_pci_write_config(dev, val, 2, where)
+
+#define PCI_WRITE_CONFIG_DWORD(dev, val, where) \
+ rte_pci_write_config(dev, val, 4, where)
+
int rtl_rx_init(struct rte_eth_dev *dev);
int rtl_tx_init(struct rte_eth_dev *dev);
diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c
index 63a20a733e..21a599dfc6 100644
--- a/drivers/net/r8169/r8169_hw.c
+++ b/drivers/net/r8169/r8169_hw.c
@@ -77,6 +77,12 @@ rtl_eri_read_with_oob_base_address(struct rtl_hw *hw, int addr, int len,
return value2;
}
+u32
+rtl_eri_read(struct rtl_hw *hw, int addr, int len, int type)
+{
+ return rtl_eri_read_with_oob_base_address(hw, addr, len, type, 0);
+}
+
static int
rtl_eri_write_with_oob_base_address(struct rtl_hw *hw, int addr,
int len, u32 value, int type,
@@ -144,6 +150,13 @@ rtl_eri_write_with_oob_base_address(struct rtl_hw *hw, int addr,
return 0;
}
+int
+rtl_eri_write(struct rtl_hw *hw, int addr, int len, u32 value, int type)
+{
+ return rtl_eri_write_with_oob_base_address(hw, addr, len, value, type,
+ NO_BASE_ADDRESS);
+}
+
static u32
rtl_ocp_read_with_oob_base_address(struct rtl_hw *hw, u16 addr, u8 len,
const u32 base_address)
@@ -152,17 +165,122 @@ rtl_ocp_read_with_oob_base_address(struct rtl_hw *hw, u16 addr, u8 len,
base_address);
}
+static u32
+rtl8168_real_ocp_read(struct rtl_hw *hw, u16 addr, u8 len)
+{
+ int i, val_shift, shift = 0;
+ u32 value1, value2, mask;
+
+ value1 = 0;
+ value2 = 0;
+
+ if (len > 4 || len <= 0)
+ return -1;
+
+ while (len > 0) {
+ val_shift = addr % 4;
+ addr = addr & ~0x3;
+
+ RTL_W32(hw, OCPAR, (0x0F << 12) | (addr & 0xFFF));
+
+ for (i = 0; i < 20; i++) {
+ rte_delay_us(100);
+ if (RTL_R32(hw, OCPAR) & OCPAR_Flag)
+ break;
+ }
+
+ if (len == 1)
+ mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else if (len == 2)
+ mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else if (len == 3)
+ mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else
+ mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+ value1 = RTL_R32(hw, OCPDR) & mask;
+ value2 |= (value1 >> val_shift * 8) << shift * 8;
+
+ if (len <= 4 - val_shift) {
+ len = 0;
+ } else {
+ len -= (4 - val_shift);
+ shift = 4 - val_shift;
+ addr += 4;
+ }
+ }
+
+ rte_delay_us(20);
+
+ return value2;
+}
+
+static int
+rtl8168_real_ocp_write(struct rtl_hw *hw, u16 addr, u8 len, u32 value)
+{
+ int i, val_shift, shift = 0;
+ u32 mask, value1 = 0;
+
+ if (len > 4 || len <= 0)
+ return -1;
+
+ while (len > 0) {
+ val_shift = addr % 4;
+ addr = addr & ~0x3;
+
+ if (len == 1)
+ mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else if (len == 2)
+ mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else if (len == 3)
+ mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+ else
+ mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+ value1 = rtl_ocp_read(hw, addr, 4) & ~mask;
+ value1 |= ((value << val_shift * 8) >> shift * 8);
+
+ RTL_W32(hw, OCPDR, value1);
+ RTL_W32(hw, OCPAR, OCPAR_Flag | (0x0F << 12) | (addr & 0xFFF));
+
+ for (i = 0; i < 10; i++) {
+ rte_delay_us(100);
+
+ /* Check if the RTL8168 has completed ERI write */
+ if (!(RTL_R32(hw, OCPAR) & OCPAR_Flag))
+ break;
+ }
+
+ if (len <= 4 - val_shift) {
+ len = 0;
+ } else {
+ len -= (4 - val_shift);
+ shift = 4 - val_shift;
+ addr += 4;
+ }
+ }
+
+ rte_delay_us(20);
+
+ return 0;
+}
+
u32
rtl_ocp_read(struct rtl_hw *hw, u16 addr, u8 len)
{
u32 value = 0;
- if (!hw->AllowAccessDashOcp)
+ if (rtl_is_8125(hw) && !hw->AllowAccessDashOcp)
return 0xffffffff;
if (hw->HwSuppOcpChannelVer == 2)
value = rtl_ocp_read_with_oob_base_address(hw, addr, len,
NO_BASE_ADDRESS);
+ else if (hw->HwSuppOcpChannelVer == 3)
+ value = rtl_ocp_read_with_oob_base_address(hw, addr, len,
+ RTL8168FP_OOBMAC_BASE);
+ else
+ value = rtl8168_real_ocp_read(hw, addr, len);
return value;
}
@@ -171,23 +289,28 @@ static u32
rtl_ocp_write_with_oob_base_address(struct rtl_hw *hw, u16 addr, u8 len,
u32 value, const u32 base_address)
{
- return rtl_eri_write_with_oob_base_address(hw, addr, len, value, ERIAR_OOB,
- base_address);
+ return rtl_eri_write_with_oob_base_address(hw, addr, len, value,
+ ERIAR_OOB, base_address);
}
void
rtl_ocp_write(struct rtl_hw *hw, u16 addr, u8 len, u32 value)
{
- if (!hw->AllowAccessDashOcp)
+ if (rtl_is_8125(hw) && !hw->AllowAccessDashOcp)
return;
if (hw->HwSuppOcpChannelVer == 2)
rtl_ocp_write_with_oob_base_address(hw, addr, len, value,
NO_BASE_ADDRESS);
+ else if (hw->HwSuppOcpChannelVer == 3)
+ rtl_ocp_write_with_oob_base_address(hw, addr, len, value,
+ RTL8168FP_OOBMAC_BASE);
+ else
+ rtl8168_real_ocp_write(hw, addr, len, value);
}
void
-rtl8125_oob_mutex_lock(struct rtl_hw *hw)
+rtl_oob_mutex_lock(struct rtl_hw *hw)
{
u8 reg_16, reg_a0;
u16 ocp_reg_mutex_ib;
@@ -199,6 +322,13 @@ rtl8125_oob_mutex_lock(struct rtl_hw *hw)
return;
switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_52:
@@ -241,7 +371,7 @@ rtl8125_oob_mutex_lock(struct rtl_hw *hw)
}
void
-rtl8125_oob_mutex_unlock(struct rtl_hw *hw)
+rtl_oob_mutex_unlock(struct rtl_hw *hw)
{
u16 ocp_reg_mutex_ib;
u16 ocp_reg_mutex_prio;
@@ -250,6 +380,13 @@ rtl8125_oob_mutex_unlock(struct rtl_hw *hw)
return;
switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_52:
@@ -295,34 +432,62 @@ rtl_mac_ocp_read(struct rtl_hw *hw, u16 addr)
}
u32
-rtl_csi_read(struct rtl_hw *hw, u32 addr)
+rtl_csi_other_fun_read(struct rtl_hw *hw, u8 multi_fun_sel_bit, u32 addr)
{
u32 cmd;
int i;
- u32 value = 0;
+ u32 value = 0xffffffff;
cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift |
(addr & CSIAR_Addr_Mask);
+ if (multi_fun_sel_bit > 7)
+ goto exit;
+
+ cmd |= multi_fun_sel_bit << 16;
+
RTL_W32(hw, CSIAR, cmd);
- for (i = 0; i < 10; i++) {
- rte_delay_us(100);
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
/* Check if the NIC has completed CSI read */
if (RTL_R32(hw, CSIAR) & CSIAR_Flag) {
- value = RTL_R32(hw, CSIDR);
+ value = (u32)RTL_R32(hw, CSIDR);
break;
}
}
- rte_delay_us(20);
+ rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
+exit:
return value;
}
+u32
+rtl_csi_read(struct rtl_hw *hw, u32 addr)
+{
+ u8 multi_fun_sel_bit;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_26:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ multi_fun_sel_bit = 1;
+ break;
+ default:
+ multi_fun_sel_bit = 0;
+ break;
+ }
+
+ return rtl_csi_other_fun_read(hw, multi_fun_sel_bit, addr);
+}
+
void
-rtl_csi_write(struct rtl_hw *hw, u32 addr, u32 value)
+rtl_csi_other_fun_write(struct rtl_hw *hw, u8 multi_fun_sel_bit, u32 addr,
+ u32 value)
{
u32 cmd;
int i;
@@ -331,6 +496,11 @@ rtl_csi_write(struct rtl_hw *hw, u32 addr, u32 value)
cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift |
(addr & CSIAR_Addr_Mask);
+ if (multi_fun_sel_bit > 7)
+ return;
+
+ cmd |= multi_fun_sel_bit << 16;
+
RTL_W32(hw, CSIAR, cmd);
for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
@@ -344,14 +514,88 @@ rtl_csi_write(struct rtl_hw *hw, u32 addr, u32 value)
rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
}
+void
+rtl_csi_write(struct rtl_hw *hw, u32 addr, u32 value)
+{
+ u8 multi_fun_sel_bit;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_26:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ multi_fun_sel_bit = 1;
+ break;
+ default:
+ multi_fun_sel_bit = 0;
+ break;
+ }
+
+ rtl_csi_other_fun_write(hw, multi_fun_sel_bit, addr, value);
+}
+
+void
+rtl8168_clear_and_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 clearmask,
+ u16 setmask)
+{
+ u16 reg_value;
+
+ reg_value = rtl_mac_ocp_read(hw, addr);
+ reg_value &= ~clearmask;
+ reg_value |= setmask;
+ rtl_mac_ocp_write(hw, addr, reg_value);
+}
+
+void
+rtl8168_clear_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
+{
+ rtl8168_clear_and_set_mcu_ocp_bit(hw, addr, mask, 0);
+}
+
+void
+rtl8168_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
+{
+ rtl8168_clear_and_set_mcu_ocp_bit(hw, addr, 0, mask);
+}
+
static void
rtl_enable_rxdvgate(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) | BIT_3);
rte_delay_ms(2);
+ break;
}
}
@@ -359,15 +603,44 @@ void
rtl_disable_rxdvgate(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_3);
rte_delay_ms(2);
+ break;
}
}
static void
-rtl_stop_all_request(struct rtl_hw *hw)
+rtl8125_stop_all_request(struct rtl_hw *hw)
{
int i;
@@ -392,14 +665,95 @@ rtl_stop_all_request(struct rtl_hw *hw)
RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) & (CmdTxEnb | CmdRxEnb));
}
+static void
+rtl8168_stop_all_request(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rte_delay_ms(2);
+ break;
+ default:
+ rte_delay_ms(10);
+ break;
+ }
+}
+
+static void
+rtl_stop_all_request(struct rtl_hw *hw)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_stop_all_request(hw);
+ else
+ rtl8168_stop_all_request(hw);
+}
+
static void
rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
{
int i;
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ for (i = 0; i < 10; i++) {
+ rte_delay_us(100);
+ if (RTL_R32(hw, TxConfig) & BIT_11)
+ break;
+ }
+
+ for (i = 0; i < 10; i++) {
+ rte_delay_us(100);
+ if ((RTL_R8(hw, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) ==
+ (Txfifo_empty | Rxfifo_empty))
+ break;
+ }
+
+ rte_delay_ms(1);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
for (i = 0; i < 3000; i++) {
rte_delay_us(50);
if ((RTL_R8(hw, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) ==
@@ -412,8 +766,14 @@ rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
switch (hw->mcfg) {
case CFG_METHOD_50:
case CFG_METHOD_51:
- case CFG_METHOD_53 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
for (i = 0; i < 3000; i++) {
rte_delay_us(50);
if ((RTL_R16(hw, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) ==
@@ -473,19 +833,86 @@ rtl_disable_cfg9346_write(struct rtl_hw *hw)
static void
rtl_enable_force_clkreq(struct rtl_hw *hw, bool enable)
{
- if (enable)
- RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) | BIT_7);
- else
- RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) & ~BIT_7);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ if (enable)
+ RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) | BIT_7);
+ else
+ RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) & ~BIT_7);
+ break;
+ }
}
static void
rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ if (enable) {
+ RTL_W8(hw, Config2, RTL_R8(hw, Config2) | BIT_7);
+ RTL_W8(hw, Config5, RTL_R8(hw, Config5) | BIT_0);
+ } else {
+ RTL_W8(hw, Config2, RTL_R8(hw, Config2) & ~BIT_7);
+ RTL_W8(hw, Config5, RTL_R8(hw, Config5) & ~BIT_0);
+ }
+ rte_delay_us(10);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
case CFG_METHOD_69:
- rtl_enable_cfg9346_write(hw);
if (enable) {
RTL_W8(hw, Config2, RTL_R8(hw, Config2) | BIT_7);
RTL_W8(hw, Config5, RTL_R8(hw, Config5) | BIT_0);
@@ -493,11 +920,9 @@ rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
RTL_W8(hw, Config2, RTL_R8(hw, Config2) & ~BIT_7);
RTL_W8(hw, Config5, RTL_R8(hw, Config5) & ~BIT_0);
}
- rtl_disable_cfg9346_write(hw);
break;
case CFG_METHOD_70:
case CFG_METHOD_71:
- rtl_enable_cfg9346_write(hw);
if (enable) {
RTL_W8(hw, INT_CFG0_8125, RTL_R8(hw, INT_CFG0_8125) | BIT_3);
RTL_W8(hw, Config5, RTL_R8(hw, Config5) | BIT_0);
@@ -505,26 +930,35 @@ rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
RTL_W8(hw, INT_CFG0_8125, RTL_R8(hw, INT_CFG0_8125) & ~BIT_3);
RTL_W8(hw, Config5, RTL_R8(hw, Config5) & ~BIT_0);
}
- rtl_disable_cfg9346_write(hw);
break;
}
}
static void
-rtl_disable_l1_timeout(struct rtl_hw *hw)
+rtl8126_disable_l1_timeout(struct rtl_hw *hw)
{
rtl_csi_write(hw, 0x890, rtl_csi_read(hw, 0x890) & ~BIT_0);
}
static void
-rtl_disable_eee_plus(struct rtl_hw *hw)
+rtl8125_disable_eee_plus(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mac_ocp_write(hw, 0xE080, rtl_mac_ocp_read(hw, 0xE080) & ~BIT_1);
break;
-
default:
/* Not support EEEPlus */
break;
@@ -535,8 +969,41 @@ static void
rtl_hw_clear_timer_int(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ RTL_W32(hw, TimeInt0, 0x0000);
+ RTL_W32(hw, TimeInt1, 0x0000);
+ RTL_W32(hw, TimeInt2, 0x0000);
+ RTL_W32(hw, TimeInt3, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
RTL_W32(hw, TIMER_INT0_8125, 0x0000);
RTL_W32(hw, TIMER_INT1_8125, 0x0000);
RTL_W32(hw, TIMER_INT2_8125, 0x0000);
@@ -546,7 +1013,7 @@ rtl_hw_clear_timer_int(struct rtl_hw *hw)
}
static void
-rtl_hw_clear_int_miti(struct rtl_hw *hw)
+rtl8125_hw_clear_int_miti(struct rtl_hw *hw)
{
int i;
@@ -577,8 +1044,8 @@ rtl_hw_clear_int_miti(struct rtl_hw *hw)
}
}
-void
-rtl_hw_config(struct rtl_hw *hw)
+static void
+rtl8125_hw_config(struct rtl_hw *hw)
{
u32 mac_ocp_data;
@@ -590,18 +1057,24 @@ rtl_hw_config(struct rtl_hw *hw)
rtl_enable_cfg9346_write(hw);
/* Disable aspm clkreq internal */
- switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- rtl_enable_force_clkreq(hw, 0);
- rtl_enable_aspm_clkreq_lock(hw, 0);
- break;
- }
+ rtl_enable_force_clkreq(hw, 0);
+ rtl_enable_aspm_clkreq_lock(hw, 0);
/* Disable magic packet */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
mac_ocp_data = 0;
rtl_mac_ocp_write(hw, 0xC0B6, mac_ocp_data);
break;
@@ -616,21 +1089,38 @@ rtl_hw_config(struct rtl_hw *hw)
/* TCAM */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_53:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
RTL_W16(hw, 0x382, 0x221B);
break;
}
switch (hw->mcfg) {
- case CFG_METHOD_69 ... CFG_METHOD_71:
- rtl_disable_l1_timeout(hw);
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl8126_disable_l1_timeout(hw);
break;
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
-
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
/* RSS_control_0 */
RTL_W32(hw, RSS_CTRL_8125, 0x00);
@@ -644,33 +1134,17 @@ rtl_hw_config(struct rtl_hw *hw)
rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
- /* New TX desc format */
+ /* Disable new TX desc format */
mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB58);
if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
mac_ocp_data &= ~(BIT_0 | BIT_1);
- mac_ocp_data |= BIT_0;
+ else
+ mac_ocp_data &= ~BIT_0;
rtl_mac_ocp_write(hw, 0xEB58, mac_ocp_data);
if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
RTL_W8(hw, 0xD8, RTL_R8(hw, 0xD8) & ~BIT_1);
- /*
- * MTPS
- * 15-8 maximum tx use credit number
- * 7-0 reserved for pcie product line
- */
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xE614);
- mac_ocp_data &= ~(BIT_10 | BIT_9 | BIT_8);
- if (hw->mcfg == CFG_METHOD_50 || hw->mcfg == CFG_METHOD_51 ||
- hw->mcfg == CFG_METHOD_53)
- mac_ocp_data |= ((2 & 0x07) << 8);
- else if (hw->mcfg == CFG_METHOD_69 || hw->mcfg == CFG_METHOD_70 ||
- hw->mcfg == CFG_METHOD_71)
- mac_ocp_data |= ((4 & 0x07) << 8);
- else
- mac_ocp_data |= ((3 & 0x07) << 8);
- rtl_mac_ocp_write(hw, 0xE614, mac_ocp_data);
-
mac_ocp_data = rtl_mac_ocp_read(hw, 0xE63E);
mac_ocp_data &= ~(BIT_5 | BIT_4);
if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
@@ -724,7 +1198,7 @@ rtl_hw_config(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
- rtl8125_oob_mutex_lock(hw);
+ rtl_oob_mutex_lock(hw);
break;
}
@@ -740,7 +1214,7 @@ rtl_hw_config(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
- rtl8125_oob_mutex_unlock(hw);
+ rtl_oob_mutex_unlock(hw);
break;
}
@@ -766,7 +1240,7 @@ rtl_hw_config(struct rtl_hw *hw)
hw->mcfg == CFG_METHOD_52)
RTL_W8(hw, MCUCmd_reg, RTL_R8(hw, MCUCmd_reg) | BIT_0);
- rtl_disable_eee_plus(hw);
+ rtl8125_disable_eee_plus(hw);
mac_ocp_data = rtl_mac_ocp_read(hw, 0xEA1C);
mac_ocp_data &= ~BIT_2;
@@ -782,7 +1256,10 @@ rtl_hw_config(struct rtl_hw *hw)
RTL_W16(hw, 0x1880, RTL_R16(hw, 0x1880) & ~(BIT_4 | BIT_5));
switch (hw->mcfg) {
- case CFG_METHOD_54 ... CFG_METHOD_57:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
RTL_W8(hw, 0xd8, RTL_R8(hw, 0xd8) & ~EnableRxDescV4_0);
break;
}
@@ -791,24 +1268,223 @@ rtl_hw_config(struct rtl_hw *hw)
/* Other hw parameters */
rtl_hw_clear_timer_int(hw);
- rtl_hw_clear_int_miti(hw);
+ rtl8125_hw_clear_int_miti(hw);
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_mac_ocp_write(hw, 0xE098, 0xC302);
+ break;
+ }
+
+ rtl_disable_cfg9346_write(hw);
+
+ rte_delay_us(10);
+}
+
+static void
+rtl8168_hw_config(struct rtl_hw *hw)
+{
+ u32 csi_tmp;
+ int timeout;
+
+ rtl_nic_reset(hw);
+
+ rtl_enable_cfg9346_write(hw);
+
+ /* Disable aspm clkreq internal */
+ rtl_enable_force_clkreq(hw, 0);
+ rtl_enable_aspm_clkreq_lock(hw, 0);
+
+ /* Clear io_rdy_l23 */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~BIT_1);
+ break;
+ }
+
+ /* Keep magic packet only */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_eri_read(hw, 0xDE, 1, ERIAR_ExGMAC);
+ csi_tmp &= BIT_0;
+ rtl_eri_write(hw, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+ break;
+ }
+
+ /* Set TxConfig to default */
+ RTL_W32(hw, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
+ (InterFrameGap << TxInterFrameGapShift));
+
+ hw->hw_ops.hw_config(hw);
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ rtl_eri_write(hw, 0x2F8, 2, 0x1D8F, ERIAR_ExGMAC);
+ break;
+ }
+
+ rtl_hw_clear_timer_int(hw);
+
+ /* Clkreq exit masks */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_eri_read(hw, 0xD4, 4, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+ rtl_eri_write(hw, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+ break;
+ }
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_25:
+ rtl_mac_ocp_write(hw, 0xD3C0, 0x0B00);
+ rtl_mac_ocp_write(hw, 0xD3C2, 0x0000);
+ break;
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mac_ocp_write(hw, 0xE098, 0x0AA2);
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
rtl_mac_ocp_write(hw, 0xE098, 0xC302);
break;
}
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ for (timeout = 0; timeout < 10; timeout++) {
+ if ((rtl_eri_read(hw, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13) == 0)
+ break;
+ rte_delay_ms(1);
+ }
+ break;
+ }
+
rtl_disable_cfg9346_write(hw);
rte_delay_us(10);
}
+void
+rtl_hw_config(struct rtl_hw *hw)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_hw_config(hw);
+ else
+ rtl8168_hw_config(hw);
+}
+
int
rtl_set_hw_ops(struct rtl_hw *hw)
{
switch (hw->mcfg) {
+ /* 8168G */
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ /* 8168GU */
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ hw->hw_ops = rtl8168g_ops;
+ return 0;
+ /* 8168EP */
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ hw->hw_ops = rtl8168ep_ops;
+ return 0;
+ /* 8168H */
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ hw->hw_ops = rtl8168h_ops;
+ return 0;
+ /* 8168FP */
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ hw->hw_ops = rtl8168fp_ops;
+ return 0;
+ /* 8168M */
+ case CFG_METHOD_37:
+ hw->hw_ops = rtl8168m_ops;
+ return 0;
/* 8125A */
case CFG_METHOD_48:
case CFG_METHOD_49:
@@ -835,7 +1511,9 @@ rtl_set_hw_ops(struct rtl_hw *hw)
hw->hw_ops = rtl8125d_ops;
return 0;
/* 8126A */
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->hw_ops = rtl8126a_ops;
return 0;
default:
@@ -848,23 +1526,80 @@ rtl_hw_disable_mac_mcu_bps(struct rtl_hw *hw)
{
u16 reg_addr;
+ rtl_enable_cfg9346_write(hw);
rtl_enable_aspm_clkreq_lock(hw, 0);
+ rtl_disable_cfg9346_write(hw);
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mac_ocp_write(hw, 0xFC48, 0x0000);
break;
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- for (reg_addr = 0xFC28; reg_addr < 0xFC48; reg_addr += 2)
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ for (reg_addr = 0xFC28; reg_addr < 0xFC38; reg_addr += 2)
rtl_mac_ocp_write(hw, reg_addr, 0x0000);
rte_delay_ms(3);
+ rtl_mac_ocp_write(hw, 0xFC26, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ for (reg_addr = 0xFC28; reg_addr < 0xFC48; reg_addr += 2)
+ rtl_mac_ocp_write(hw, reg_addr, 0x0000);
+ rte_delay_ms(3);
rtl_mac_ocp_write(hw, 0xFC26, 0x0000);
break;
}
@@ -973,7 +1708,7 @@ rtl_set_link_option(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex,
u64 adv;
if (!rtl_is_speed_mode_valid(speed))
- speed = SPEED_5000;
+ speed = SPEED_1000;
if (!rtl_is_duplex_mode_valid(duplex))
duplex = DUPLEX_FULL;
@@ -1009,12 +1744,46 @@ static void
rtl_init_software_variable(struct rtl_hw *hw)
{
int tx_no_close_enable = 1;
- unsigned int speed_mode = SPEED_5000;
+ unsigned int speed_mode;
unsigned int duplex_mode = DUPLEX_FULL;
unsigned int autoneg_mode = AUTONEG_ENABLE;
- u8 tmp;
+ u32 tmp;
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ speed_mode = SPEED_2500;
+ break;
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ speed_mode = SPEED_5000;
+ break;
+ default:
+ speed_mode = SPEED_1000;
+ break;
+ }
switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ hw->HwSuppDashVer = 2;
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ hw->HwSuppDashVer = 3;
+ break;
case CFG_METHOD_48:
case CFG_METHOD_49:
tmp = (u8)rtl_mac_ocp_read(hw, 0xD006);
@@ -1031,6 +1800,41 @@ rtl_init_software_variable(struct rtl_hw *hw)
}
switch (hw->mcfg) {
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ tmp = rtl_mac_ocp_read(hw, 0xDC00);
+ hw->HwPkgDet = (tmp >> 3) & 0x0F;
+ break;
+ }
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ if (hw->HwPkgDet == 0x06) {
+ tmp = rtl_eri_read(hw, 0xE6, 1, ERIAR_ExGMAC);
+ if (tmp == 0x02)
+ hw->HwSuppSerDesPhyVer = 1;
+ else if (tmp == 0x00)
+ hw->HwSuppSerDesPhyVer = 2;
+ }
+ break;
+ }
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ hw->HwSuppOcpChannelVer = 2;
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ hw->HwSuppOcpChannelVer = 3;
+ break;
case CFG_METHOD_48:
case CFG_METHOD_49:
if (HW_DASH_SUPPORT_DASH(hw))
@@ -1040,9 +1844,13 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
hw->HwSuppOcpChannelVer = 2;
break;
+ default:
+ hw->HwSuppOcpChannelVer = 0;
+ break;
}
- hw->AllowAccessDashOcp = rtl_is_allow_access_dash_ocp(hw);
+ if (rtl_is_8125(hw))
+ hw->AllowAccessDashOcp = rtl_is_allow_access_dash_ocp(hw);
if (HW_DASH_SUPPORT_DASH(hw) && rtl_check_dash(hw))
hw->DASH = 1;
@@ -1053,6 +1861,32 @@ rtl_init_software_variable(struct rtl_hw *hw)
hw->cmac_ioaddr = hw->mmio_addr;
switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ hw->chipset_name = RTL8168G;
+ break;
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ hw->chipset_name = RTL8168EP;
+ break;
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ hw->chipset_name = RTL8168H;
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ hw->chipset_name = RTL8168FP;
+ break;
+ case CFG_METHOD_37:
+ hw->chipset_name = RTL8168M;
+ break;
case CFG_METHOD_48:
case CFG_METHOD_49:
hw->chipset_name = RTL8125A;
@@ -1073,7 +1907,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_57:
hw->chipset_name = RTL8125D;
break;
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->chipset_name = RTL8126A;
break;
default:
@@ -1082,23 +1918,91 @@ rtl_init_software_variable(struct rtl_hw *hw)
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->HwSuppNowIsOobVer = 1;
+ break;
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ hw->HwSuppCheckPhyDisableModeVer = 2;
+ break;
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->HwSuppCheckPhyDisableModeVer = 3;
+ break;
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_51:
- case CFG_METHOD_54 ... CFG_METHOD_57:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
hw->HwSuppMaxPhyLinkSpeed = SPEED_2500;
break;
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->HwSuppMaxPhyLinkSpeed = SPEED_5000;
break;
default:
@@ -1107,10 +2011,18 @@ rtl_init_software_variable(struct rtl_hw *hw)
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_53:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
hw->HwSuppTxNoCloseVer = 3;
break;
- case CFG_METHOD_54 ... CFG_METHOD_57:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
hw->HwSuppTxNoCloseVer = 6;
break;
case CFG_METHOD_69:
@@ -1158,6 +2070,41 @@ rtl_init_software_variable(struct rtl_hw *hw)
}
switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_21;
+ break;
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_23;
+ break;
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_24;
+ break;
+ case CFG_METHOD_26:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_26;
+ break;
+ case CFG_METHOD_28:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_28;
+ break;
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_37:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_29;
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
+ break;
+ case CFG_METHOD_35:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35;
+ break;
+ case CFG_METHOD_36:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_36;
+ break;
case CFG_METHOD_48:
hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_48;
break;
@@ -1201,15 +2148,37 @@ rtl_init_software_variable(struct rtl_hw *hw)
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->HwSuppMacMcuVer = 2;
break;
}
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->MacMcuPageSize = RTL_MAC_MCU_PAGE_SIZE;
break;
}
@@ -1235,7 +2204,10 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_69:
hw->HwSuppIntMitiVer = 4;
break;
- case CFG_METHOD_54 ... CFG_METHOD_57:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
hw->HwSuppIntMitiVer = 6;
break;
case CFG_METHOD_70:
@@ -1247,8 +2219,19 @@ rtl_init_software_variable(struct rtl_hw *hw)
rtl_set_link_option(hw, autoneg_mode, speed_mode, duplex_mode, rtl_fc_full);
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
hw->mcu_pme_setting = rtl_mac_ocp_read(hw, 0xE00A);
break;
}
@@ -1259,13 +2242,69 @@ rtl_init_software_variable(struct rtl_hw *hw)
static void
rtl_exit_realwow(struct rtl_hw *hw)
{
+ u32 csi_tmp;
+
/* Disable realwow function */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ RTL_W32(hw, MACOCP, 0x605E0000);
+ RTL_W32(hw, MACOCP, (0xE05E << 16) |
+ (RTL_R32(hw, MACOCP) & 0xFFFE));
+ RTL_W32(hw, MACOCP, 0xE9720000);
+ RTL_W32(hw, MACOCP, 0xF2140010);
+ break;
+ case CFG_METHOD_26:
+ RTL_W32(hw, MACOCP, 0xE05E00FF);
+ RTL_W32(hw, MACOCP, 0xE9720000);
+ rtl_mac_ocp_write(hw, 0xE428, 0x0010);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mac_ocp_write(hw, 0xC0BC, 0x00FF);
break;
}
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ rtl_eri_write(hw, 0x174, 2, 0x0000, ERIAR_ExGMAC);
+ rtl_mac_ocp_write(hw, 0xE428, 0x0010);
+ break;
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ rtl_eri_write(hw, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
+ rtl_mac_ocp_write(hw, 0xE428, 0x0010);
+ break;
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_eri_read(hw, 0x174, 2, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_8;
+ csi_tmp |= BIT_15;
+ rtl_eri_write(hw, 0x174, 2, csi_tmp, ERIAR_ExGMAC);
+ rtl_mac_ocp_write(hw, 0xE428, 0x0010);
+ break;
+ }
}
static void
@@ -1287,6 +2326,20 @@ rtl_wait_ll_share_fifo_ready(struct rtl_hw *hw)
}
}
+static void
+rtl8168_switch_to_sgmii_mode(struct rtl_hw *hw)
+{
+ if (!HW_SUPP_SERDES_PHY(hw))
+ return;
+
+ switch (hw->HwSuppSerDesPhyVer) {
+ case 1:
+ rtl_mac_ocp_write(hw, 0xEB00, 0x2);
+ rtl8168_set_mcu_ocp_bit(hw, 0xEB16, BIT_1);
+ break;
+ }
+}
+
static void
rtl_exit_oob(struct rtl_hw *hw)
{
@@ -1294,9 +2347,14 @@ rtl_exit_oob(struct rtl_hw *hw)
rtl_disable_rx_packet_filter(hw);
+ if (HW_SUPP_SERDES_PHY(hw)) {
+ if (hw->HwSuppSerDesPhyVer == 1)
+ rtl8168_switch_to_sgmii_mode(hw);
+ }
+
if (HW_DASH_SUPPORT_DASH(hw)) {
- rtl8125_driver_start(hw);
- rtl8125_dash2_disable_txrx(hw);
+ rtl_driver_start(hw);
+ rtl_dash2_disable_txrx(hw);
}
rtl_exit_realwow(hw);
@@ -1304,8 +2362,47 @@ rtl_exit_oob(struct rtl_hw *hw)
rtl_nic_reset(hw);
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_disable_now_is_oob(hw);
+
+ data16 = rtl_mac_ocp_read(hw, 0xE8DE) & ~BIT_14;
+ rtl_mac_ocp_write(hw, 0xE8DE, data16);
+ rtl_wait_ll_share_fifo_ready(hw);
+
+ data16 = rtl_mac_ocp_read(hw, 0xE8DE) | BIT_15;
+ rtl_mac_ocp_write(hw, 0xE8DE, data16);
+
+ rtl_wait_ll_share_fifo_ready(hw);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_disable_now_is_oob(hw);
data16 = rtl_mac_ocp_read(hw, 0xE8DE) & ~BIT_14;
@@ -1327,20 +2424,66 @@ static void
rtl_disable_ups(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- rtl_mac_ocp_write(hw, 0xD40A, rtl_mac_ocp_read(hw, 0xD40A) & ~BIT_4);
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ rtl_mac_ocp_write(hw, 0xD400,
+ rtl_mac_ocp_read(hw, 0xD400) & ~BIT_0);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_mac_ocp_write(hw, 0xD40A,
+ rtl_mac_ocp_read(hw, 0xD40A) & ~BIT_4);
break;
}
}
static void
-rtl8125_disable_ocp_phy_power_saving(struct rtl_hw *hw)
+rtl_disable_ocp_phy_power_saving(struct rtl_hw *hw)
{
u16 val;
- if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
- hw->mcfg == CFG_METHOD_52) {
+ switch (hw->mcfg) {
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ val = rtl_mdio_real_read_phy_ocp(hw, 0x0C41, 0x13);
+ if (val != 0x0500) {
+ rtl_set_phy_mcu_patch_request(hw);
+ rtl_mdio_real_write_phy_ocp(hw, 0x0C41, 0x13, 0x0000);
+ rtl_mdio_real_write_phy_ocp(hw, 0x0C41, 0x13, 0x0500);
+ rtl_clear_phy_mcu_patch_request(hw);
+ }
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_52:
val = rtl_mdio_direct_read_phy_ocp(hw, 0xC416);
if (val != 0x0050) {
rtl_set_phy_mcu_patch_request(hw);
@@ -1348,26 +2491,108 @@ rtl8125_disable_ocp_phy_power_saving(struct rtl_hw *hw)
rtl_mdio_direct_write_phy_ocp(hw, 0xC416, 0x0500);
rtl_clear_phy_mcu_patch_request(hw);
}
+ break;
}
}
static void
-rtl_hw_init(struct rtl_hw *hw)
+rtl8168_disable_dma_agg(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- rtl_enable_aspm_clkreq_lock(hw, 0);
- rtl_enable_force_clkreq(hw, 0);
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mac_ocp_write(hw, 0xE63E, rtl_mac_ocp_read(hw, 0xE63E) &
+ ~(BIT_3 | BIT_2 | BIT_1));
+ rtl_mac_ocp_write(hw, 0xE63E,
+ rtl_mac_ocp_read(hw, 0xE63E) | (BIT_0));
+ rtl_mac_ocp_write(hw, 0xE63E,
+ rtl_mac_ocp_read(hw, 0xE63E) & ~(BIT_0));
+ rtl_mac_ocp_write(hw, 0xC094, 0x0);
+ rtl_mac_ocp_write(hw, 0xC09E, 0x0);
break;
}
+}
+
+static void
+rtl_hw_init(struct rtl_hw *hw)
+{
+ u32 csi_tmp;
+
+ /* Disable aspm clkreq internal */
+ rtl_enable_force_clkreq(hw, 0);
+ rtl_enable_cfg9346_write(hw);
+ rtl_enable_aspm_clkreq_lock(hw, 0);
+ rtl_disable_cfg9346_write(hw);
rtl_disable_ups(hw);
+ /* Disable DMA aggregation */
+ rtl8168_disable_dma_agg(hw);
+
hw->hw_ops.hw_mac_mcu_config(hw);
/* Disable ocp phy power saving */
- rtl8125_disable_ocp_phy_power_saving(hw);
+ rtl_disable_ocp_phy_power_saving(hw);
+
+ /* Set PCIE uncorrectable error status mask pcie 0x108 */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_csi_read(hw, 0x108);
+ csi_tmp |= BIT_20;
+ rtl_csi_write(hw, 0x108, csi_tmp);
+ break;
+ }
+
+ /* MCU PME setting */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ csi_tmp = rtl_eri_read(hw, 0x1AB, 1, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7);
+ rtl_eri_write(hw, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+ break;
+ case CFG_METHOD_25:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_eri_read(hw, 0x1AB, 1, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_3 | BIT_6);
+ rtl_eri_write(hw, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+ break;
+ }
}
void
@@ -1393,33 +2618,200 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
ic_version_id = val32 & 0x00700000;
switch (reg) {
+ case 0x30000000:
+ hw->mcfg = CFG_METHOD_1;
+ break;
+ case 0x38000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_2;
+ } else if (ic_version_id == 0x00500000) {
+ hw->mcfg = CFG_METHOD_3;
+ } else {
+ hw->mcfg = CFG_METHOD_3;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x3C000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_4;
+ } else if (ic_version_id == 0x00200000) {
+ hw->mcfg = CFG_METHOD_5;
+ } else if (ic_version_id == 0x00400000) {
+ hw->mcfg = CFG_METHOD_6;
+ } else {
+ hw->mcfg = CFG_METHOD_6;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x3C800000:
+ if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_7;
+ } else if (ic_version_id == 0x00300000) {
+ hw->mcfg = CFG_METHOD_8;
+ } else {
+ hw->mcfg = CFG_METHOD_8;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x28000000:
+ if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_9;
+ } else if (ic_version_id == 0x00300000) {
+ hw->mcfg = CFG_METHOD_10;
+ } else {
+ hw->mcfg = CFG_METHOD_10;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x28800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_11;
+ } else if (ic_version_id == 0x00200000) {
+ hw->mcfg = CFG_METHOD_12;
+ RTL_W32(hw, 0xD0, RTL_R32(hw, 0xD0) | 0x00020000);
+ } else if (ic_version_id == 0x00300000) {
+ hw->mcfg = CFG_METHOD_13;
+ } else {
+ hw->mcfg = CFG_METHOD_13;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x2C000000:
+ if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_14;
+ } else if (ic_version_id == 0x00200000) {
+ hw->mcfg = CFG_METHOD_15;
+ } else {
+ hw->mcfg = CFG_METHOD_15;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x2C800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_16;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_17;
+ } else {
+ hw->mcfg = CFG_METHOD_17;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x48000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_18;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_19;
+ } else {
+ hw->mcfg = CFG_METHOD_19;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x48800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_20;
+ } else {
+ hw->mcfg = CFG_METHOD_20;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x4C000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_21;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_22;
+ } else {
+ hw->mcfg = CFG_METHOD_22;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x50000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_23;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_27;
+ } else if (ic_version_id == 0x00200000) {
+ hw->mcfg = CFG_METHOD_28;
+ } else {
+ hw->mcfg = CFG_METHOD_28;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x50800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_24;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_25;
+ } else {
+ hw->mcfg = CFG_METHOD_25;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x5C800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_26;
+ } else {
+ hw->mcfg = CFG_METHOD_26;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x54000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_29;
+ } else if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_30;
+ } else {
+ hw->mcfg = CFG_METHOD_30;
+ hw->HwIcVerUnknown = TRUE;
+ }
+
+ if (hw->mcfg == CFG_METHOD_30) {
+ if ((rtl_mac_ocp_read(hw, 0xD006) & 0xFF00) == 0x0100)
+ hw->mcfg = CFG_METHOD_35;
+ else if ((rtl_mac_ocp_read(hw, 0xD006) & 0xFF00) == 0x0300)
+ hw->mcfg = CFG_METHOD_36;
+ }
+ break;
+ case 0x6C000000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_37;
+ } else {
+ hw->mcfg = CFG_METHOD_37;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
+ case 0x54800000:
+ if (ic_version_id == 0x00100000) {
+ hw->mcfg = CFG_METHOD_31;
+ } else if (ic_version_id == 0x00200000) {
+ hw->mcfg = CFG_METHOD_32;
+ } else if (ic_version_id == 0x00300000) {
+ hw->mcfg = CFG_METHOD_33;
+ } else if (ic_version_id == 0x00400000) {
+ hw->mcfg = CFG_METHOD_34;
+ } else {
+ hw->mcfg = CFG_METHOD_34;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
case 0x60800000:
if (ic_version_id == 0x00000000) {
hw->mcfg = CFG_METHOD_48;
-
} else if (ic_version_id == 0x100000) {
hw->mcfg = CFG_METHOD_49;
-
} else {
hw->mcfg = CFG_METHOD_49;
hw->HwIcVerUnknown = TRUE;
}
-
- hw->efuse_ver = EFUSE_SUPPORT_V4;
break;
case 0x64000000:
if (ic_version_id == 0x00000000) {
hw->mcfg = CFG_METHOD_50;
-
} else if (ic_version_id == 0x100000) {
hw->mcfg = CFG_METHOD_51;
-
} else {
hw->mcfg = CFG_METHOD_51;
hw->HwIcVerUnknown = TRUE;
}
-
- hw->efuse_ver = EFUSE_SUPPORT_V4;
break;
case 0x68000000:
if (ic_version_id == 0x00000000) {
@@ -1430,8 +2822,6 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
hw->mcfg = CFG_METHOD_55;
hw->HwIcVerUnknown = TRUE;
}
-
- hw->efuse_ver = EFUSE_SUPPORT_V4;
break;
case 0x68800000:
if (ic_version_id == 0x00000000) {
@@ -1442,8 +2832,6 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
hw->mcfg = CFG_METHOD_57;
hw->HwIcVerUnknown = TRUE;
}
-
- hw->efuse_ver = EFUSE_SUPPORT_V4;
break;
case 0x64800000:
if (ic_version_id == 0x00000000) {
@@ -1456,14 +2844,11 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
hw->mcfg = CFG_METHOD_71;
hw->HwIcVerUnknown = TRUE;
}
-
- hw->efuse_ver = EFUSE_SUPPORT_V4;
break;
default:
PMD_INIT_LOG(NOTICE, "unknown chip version (%x)", reg);
hw->mcfg = CFG_METHOD_DEFAULT;
hw->HwIcVerUnknown = TRUE;
- hw->efuse_ver = EFUSE_NOT_SUPPORT;
break;
}
@@ -1478,11 +2863,42 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
int
rtl_get_mac_address(struct rtl_hw *hw, struct rte_ether_addr *ea)
{
- u8 mac_addr[MAC_ADDR_LEN] = {0};
+ u8 mac_addr[RTE_ETHER_ADDR_LEN] = {0};
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ *(u32 *)&mac_addr[0] = rtl_eri_read(hw, 0xE0, 4, ERIAR_ExGMAC);
+ *(u16 *)&mac_addr[4] = rtl_eri_read(hw, 0xE4, 2, ERIAR_ExGMAC);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
*(u32 *)&mac_addr[0] = RTL_R32(hw, BACKUP_ADDR0_8125);
*(u16 *)&mac_addr[4] = RTL_R16(hw, BACKUP_ADDR1_8125);
break;
@@ -1495,6 +2911,7 @@ rtl_get_mac_address(struct rtl_hw *hw, struct rte_ether_addr *ea)
return 0;
}
+/* Puts an ethernet address into a receive address register. */
void
rtl_rar_set(struct rtl_hw *hw, uint8_t *addr)
{
@@ -1593,3 +3010,9 @@ rtl_tally_free(struct rte_eth_dev *dev)
{
rte_eth_dma_zone_free(dev, "tally_counters", 0);
}
+
+bool
+rtl_is_8125(struct rtl_hw *hw)
+{
+ return hw->mcfg >= CFG_METHOD_48;
+}
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index e7c4bf1abc..7cc4ee527f 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -30,8 +30,8 @@ void rtl_nic_reset(struct rtl_hw *hw);
void rtl_enable_cfg9346_write(struct rtl_hw *hw);
void rtl_disable_cfg9346_write(struct rtl_hw *hw);
-void rtl8125_oob_mutex_lock(struct rtl_hw *hw);
-void rtl8125_oob_mutex_unlock(struct rtl_hw *hw);
+void rtl_oob_mutex_lock(struct rtl_hw *hw);
+void rtl_oob_mutex_unlock(struct rtl_hw *hw);
void rtl_disable_rxdvgate(struct rtl_hw *hw);
@@ -60,6 +60,24 @@ void rtl_clear_tally_stats(struct rtl_hw *hw);
int rtl_tally_init(struct rte_eth_dev *dev);
void rtl_tally_free(struct rte_eth_dev *dev);
+bool rtl_is_8125(struct rtl_hw *hw);
+
+u32 rtl_eri_read(struct rtl_hw *hw, int addr, int len, int type);
+int rtl_eri_write(struct rtl_hw *hw, int addr, int len, u32 value, int type);
+
+u32 rtl_csi_other_fun_read(struct rtl_hw *hw, u8 multi_fun_sel_bit, u32 addr);
+void rtl_csi_other_fun_write(struct rtl_hw *hw, u8 multi_fun_sel_bit, u32 addr,
+ u32 value);
+void rtl8168_clear_and_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr,
+ u16 clearmask, u16 setmask);
+void rtl8168_clear_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
+void rtl8168_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
+
+extern const struct rtl_hw_ops rtl8168g_ops;
+extern const struct rtl_hw_ops rtl8168h_ops;
+extern const struct rtl_hw_ops rtl8168ep_ops;
+extern const struct rtl_hw_ops rtl8168fp_ops;
+extern const struct rtl_hw_ops rtl8168m_ops;
extern const struct rtl_hw_ops rtl8125a_ops;
extern const struct rtl_hw_ops rtl8125b_ops;
extern const struct rtl_hw_ops rtl8125bp_ops;
@@ -67,7 +85,8 @@ extern const struct rtl_hw_ops rtl8125d_ops;
extern const struct rtl_hw_ops rtl8126a_ops;
extern const struct rtl_hw_ops rtl8168kb_ops;
-#define NO_BASE_ADDRESS 0x00000000
+#define NO_BASE_ADDRESS 0x00000000
+#define RTL8168FP_OOBMAC_BASE 0xBAF70000
/* Channel wait count */
#define RTL_CHANNEL_WAIT_COUNT 20000
@@ -80,15 +99,24 @@ extern const struct rtl_hw_ops rtl8168kb_ops;
#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) ((_M)->HwHasWrRamCodeToMicroP ? 1 : 0)
/* Tx NO CLOSE */
-#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000
-#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2 0xFFFF
-#define MAX_TX_NO_CLOSE_DESC_PTR_V3 0x100000000
-#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3 0xFFFFFFFF
-#define MAX_TX_NO_CLOSE_DESC_PTR_V4 0x80000000
-#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V4 0x7FFFFFFF
-#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF
+#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000
+#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2 0xFFFF
+#define MAX_TX_NO_CLOSE_DESC_PTR_V3 0x100000000
+#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3 0xFFFFFFFF
+#define MAX_TX_NO_CLOSE_DESC_PTR_V4 0x80000000
+#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V4 0x7FFFFFFF
+#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF
/* Ram code version */
+#define NIC_RAMCODE_VERSION_CFG_METHOD_21 (0x0042)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_24 (0x0001)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_23 (0x0015)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_26 (0x0012)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0083)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0027)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_36 (0x0000)
#define NIC_RAMCODE_VERSION_CFG_METHOD_48 (0x0b11)
#define NIC_RAMCODE_VERSION_CFG_METHOD_49 (0x0b33)
#define NIC_RAMCODE_VERSION_CFG_METHOD_50 (0x0b17)
@@ -104,12 +132,4 @@ extern const struct rtl_hw_ops rtl8168kb_ops;
#define RTL_MAC_MCU_PAGE_SIZE 256
#define RTL_DEFAULT_MTU 1500
-enum effuse {
- EFUSE_NOT_SUPPORT = 0,
- EFUSE_SUPPORT_V1,
- EFUSE_SUPPORT_V2,
- EFUSE_SUPPORT_V3,
- EFUSE_SUPPORT_V4,
-};
-
#endif /* R8169_HW_H */
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index cc8efe80f2..ce16ab3242 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -13,6 +13,7 @@
#include "r8169_hw.h"
#include "r8169_phy.h"
#include "r8169_logs.h"
+#include "r8169_dash.h"
static void
rtl_clear_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 clearmask,
@@ -68,7 +69,7 @@ rtl_map_phy_ocp_addr(u16 PageNum, u8 RegNum)
}
static u32
-rtl_mdio_real_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr)
+rtl_mdio_real_direct_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr)
{
u32 data32;
int i, value = 0;
@@ -77,8 +78,8 @@ rtl_mdio_real_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr)
data32 <<= OCPR_Addr_Reg_shift;
RTL_W32(hw, PHYOCP, data32);
- for (i = 0; i < 100; i++) {
- rte_delay_us(1);
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
if (RTL_R32(hw, PHYOCP) & OCPR_Flag)
break;
@@ -91,27 +92,33 @@ rtl_mdio_real_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr)
u32
rtl_mdio_direct_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr)
{
- return rtl_mdio_real_read_phy_ocp(hw, RegAddr);
+ return rtl_mdio_real_direct_read_phy_ocp(hw, RegAddr);
}
-static u32
-rtl_mdio_read_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr)
+u32
+rtl_mdio_real_read_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr)
{
u16 ocp_addr;
ocp_addr = rtl_map_phy_ocp_addr(PageNum, RegAddr);
- return rtl_mdio_direct_read_phy_ocp(hw, ocp_addr);
+ return rtl_mdio_real_direct_read_phy_ocp(hw, ocp_addr);
}
static u32
rtl_mdio_real_read(struct rtl_hw *hw, u32 RegAddr)
{
- return rtl_mdio_read_phy_ocp(hw, hw->cur_page, RegAddr);
+ return rtl_mdio_real_read_phy_ocp(hw, hw->cur_page, RegAddr);
+}
+
+u32
+rtl_mdio_read(struct rtl_hw *hw, u32 RegAddr)
+{
+ return rtl_mdio_real_read(hw, RegAddr);
}
static void
-rtl_mdio_real_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value)
+rtl_mdio_real_direct_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value)
{
u32 data32;
int i;
@@ -121,8 +128,8 @@ rtl_mdio_real_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value)
data32 |= OCPR_Write | value;
RTL_W32(hw, PHYOCP, data32);
- for (i = 0; i < 100; i++) {
- rte_delay_us(1);
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
if (!(RTL_R32(hw, PHYOCP) & OCPR_Flag))
break;
@@ -132,11 +139,11 @@ rtl_mdio_real_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value)
void
rtl_mdio_direct_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value)
{
- rtl_mdio_real_write_phy_ocp(hw, RegAddr, value);
+ rtl_mdio_real_direct_write_phy_ocp(hw, RegAddr, value);
}
-static void
-rtl_mdio_write_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr, u32 value)
+void
+rtl_mdio_real_write_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr, u32 value)
{
u16 ocp_addr;
@@ -148,15 +155,11 @@ rtl_mdio_write_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr, u32 value)
static void
rtl_mdio_real_write(struct rtl_hw *hw, u32 RegAddr, u32 value)
{
- if (RegAddr == 0x1F)
+ if (RegAddr == 0x1F) {
hw->cur_page = value;
- rtl_mdio_write_phy_ocp(hw, hw->cur_page, RegAddr, value);
-}
-
-u32
-rtl_mdio_read(struct rtl_hw *hw, u32 RegAddr)
-{
- return rtl_mdio_real_read(hw, RegAddr);
+ return;
+ }
+ rtl_mdio_real_write_phy_ocp(hw, hw->cur_page, RegAddr, value);
}
void
@@ -189,37 +192,67 @@ rtl_set_eth_phy_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
rtl_clear_and_set_eth_phy_ocp_bit(hw, addr, 0, mask);
}
+static u8
+rtl8168_check_ephy_addr(struct rtl_hw *hw, int addr)
+{
+ if (hw->mcfg != CFG_METHOD_35 && hw->mcfg != CFG_METHOD_36)
+ goto exit;
+
+ if (addr & (BIT_6 | BIT_5))
+ rtl8168_clear_and_set_mcu_ocp_bit(hw, 0xDE28, (BIT_1 | BIT_0),
+ (addr >> 5) & (BIT_1 | BIT_0));
+
+ addr &= 0x1F;
+
+exit:
+ return addr;
+}
+
void
rtl_ephy_write(struct rtl_hw *hw, int addr, int value)
{
int i;
+ unsigned int mask;
- RTL_W32(hw, EPHYAR, EPHYAR_Write |
- (addr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift |
+ if (rtl_is_8125(hw)) {
+ mask = EPHYAR_Reg_Mask_v2;
+ } else {
+ mask = EPHYAR_Reg_Mask;
+ addr = rtl8168_check_ephy_addr(hw, addr);
+ }
+
+ RTL_W32(hw, EPHYAR, EPHYAR_Write | (addr & mask) << EPHYAR_Reg_shift |
(value & EPHYAR_Data_Mask));
- for (i = 0; i < 10; i++) {
- rte_delay_us(100);
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
/* Check if the NIC has completed EPHY write */
if (!(RTL_R32(hw, EPHYAR) & EPHYAR_Flag))
break;
}
- rte_delay_us(20);
+ rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
}
-static u16
+u16
rtl_ephy_read(struct rtl_hw *hw, int addr)
{
int i;
u16 value = 0xffff;
+ unsigned int mask;
+
+ if (rtl_is_8125(hw)) {
+ mask = EPHYAR_Reg_Mask_v2;
+ } else {
+ mask = EPHYAR_Reg_Mask;
+ addr = rtl8168_check_ephy_addr(hw, addr);
+ }
- RTL_W32(hw, EPHYAR, EPHYAR_Read | (addr & EPHYAR_Reg_Mask_v2) <<
- EPHYAR_Reg_shift);
+ RTL_W32(hw, EPHYAR, EPHYAR_Read | (addr & mask) << EPHYAR_Reg_shift);
- for (i = 0; i < 10; i++) {
- rte_delay_us(100);
+ for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
+ rte_delay_us(RTL_CHANNEL_WAIT_TIME);
/* Check if the NIC has completed EPHY read */
if (RTL_R32(hw, EPHYAR) & EPHYAR_Flag) {
@@ -228,7 +261,7 @@ rtl_ephy_read(struct rtl_hw *hw, int addr)
}
}
- rte_delay_us(20);
+ rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
return value;
}
@@ -264,18 +297,66 @@ rtl_set_phy_mcu_patch_request(struct rtl_hw *hw)
u16 wait_cnt;
bool bool_success = TRUE;
- rtl_set_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ rtl_set_eth_phy_bit(hw, 0x10, BIT_4);
+
+ rtl_mdio_write(hw, 0x1f, 0x0B80);
+ wait_cnt = 0;
+ do {
+ gphy_val = rtl_mdio_read(hw, 0x10);
+ rte_delay_us(100);
+ wait_cnt++;
+ } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
- wait_cnt = 0;
- do {
- gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
- rte_delay_us(100);
- wait_cnt++;
- } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
+ if (!(gphy_val & BIT_6) && wait_cnt == 1000)
+ bool_success = FALSE;
- if (!(gphy_val & BIT_6) && wait_cnt == 1000)
- bool_success = FALSE;
+ rtl_mdio_write(hw, 0x1f, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_set_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
+
+ wait_cnt = 0;
+ do {
+ gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
+ rte_delay_us(100);
+ wait_cnt++;
+ } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
+ if (!(gphy_val & BIT_6) && wait_cnt == 1000)
+ bool_success = FALSE;
+ break;
+ }
if (!bool_success)
PMD_INIT_LOG(NOTICE, "%s fail.", __func__);
@@ -289,17 +370,66 @@ rtl_clear_phy_mcu_patch_request(struct rtl_hw *hw)
u16 wait_cnt;
bool bool_success = TRUE;
- rtl_clear_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ rtl_clear_eth_phy_bit(hw, 0x10, BIT_4);
+
+ rtl_mdio_write(hw, 0x1f, 0x0B80);
+ wait_cnt = 0;
+ do {
+ gphy_val = rtl_mdio_read(hw, 0x10);
+ rte_delay_us(100);
+ wait_cnt++;
+ } while ((gphy_val & BIT_6) && (wait_cnt < 1000));
+
+ if ((gphy_val & BIT_6) && wait_cnt == 1000)
+ bool_success = FALSE;
- wait_cnt = 0;
- do {
- gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
- rte_delay_us(100);
- wait_cnt++;
- } while ((gphy_val & BIT_6) && (wait_cnt < 1000));
+ rtl_mdio_write(hw, 0x1f, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
+
+ wait_cnt = 0;
+ do {
+ gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
+ rte_delay_us(100);
+ wait_cnt++;
+ } while ((gphy_val & BIT_6) && (wait_cnt < 1000));
- if ((gphy_val & BIT_6) && wait_cnt == 1000)
- bool_success = FALSE;
+ if ((gphy_val & BIT_6) && wait_cnt == 1000)
+ bool_success = FALSE;
+ break;
+ }
if (!bool_success)
PMD_INIT_LOG(NOTICE, "%s fail.", __func__);
@@ -335,6 +465,11 @@ rtl_is_phy_disable_mode_enabled(struct rtl_hw *hw)
u8 phy_disable_mode_enabled = FALSE;
switch (hw->HwSuppCheckPhyDisableModeVer) {
+ case 1:
+ if (rtl_mac_ocp_read(hw, 0xDC20) & BIT_1)
+ phy_disable_mode_enabled = TRUE;
+ break;
+ case 2:
case 3:
if (RTL_R8(hw, 0xF2) & BIT_5)
phy_disable_mode_enabled = TRUE;
@@ -350,6 +485,11 @@ rtl_is_gpio_low(struct rtl_hw *hw)
u8 gpio_low = FALSE;
switch (hw->HwSuppCheckPhyDisableModeVer) {
+ case 1:
+ case 2:
+ if (!(rtl_mac_ocp_read(hw, 0xDC04) & BIT_9))
+ gpio_low = TRUE;
+ break;
case 3:
if (!(rtl_mac_ocp_read(hw, 0xDC04) & BIT_13))
gpio_low = TRUE;
@@ -377,14 +517,41 @@ rtl_wait_phy_ups_resume(struct rtl_hw *hw, u16 PhyState)
int i = 0;
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ do {
+ tmp_phy_state = rtl_mdio_real_read_phy_ocp(hw, 0x0A42, 0x10);
+ tmp_phy_state &= 0x7;
+ rte_delay_ms(1);
+ i++;
+ } while ((i < 100) && (tmp_phy_state != PhyState));
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
do {
tmp_phy_state = rtl_mdio_direct_read_phy_ocp(hw, 0xA420);
tmp_phy_state &= 0x7;
rte_delay_ms(1);
i++;
} while ((i < 100) && (tmp_phy_state != PhyState));
+ break;
}
}
@@ -395,13 +562,43 @@ rtl_phy_power_up(struct rtl_hw *hw)
return;
rtl_mdio_write(hw, 0x1F, 0x0000);
+
rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE);
+ /* Wait mdc/mdio ready */
+ switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ rte_delay_ms(10);
+ break;
+ }
+
/* Wait ups resume (phy state 3) */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_wait_phy_ups_resume(hw, 3);
+ break;
}
}
@@ -409,9 +606,36 @@ void
rtl_powerup_pll(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) | BIT_7 | BIT_6);
+ break;
}
rtl_phy_power_up(hw);
@@ -420,8 +644,67 @@ rtl_powerup_pll(struct rtl_hw *hw)
static void
rtl_phy_power_down(struct rtl_hw *hw)
{
+ u32 csi_tmp;
+
+ /* MCU PME intr masks */
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ csi_tmp = rtl_eri_read(hw, 0x1AB, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~(BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7);
+ rtl_eri_write(hw, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+ break;
+ case CFG_METHOD_25:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ csi_tmp = rtl_eri_read(hw, 0x1AB, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~(BIT_3 | BIT_6);
+ rtl_eri_write(hw, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+ break;
+ }
+
rtl_mdio_write(hw, 0x1F, 0x0000);
- rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
+ break;
+ default:
+ rtl_mdio_write(hw, MII_BMCR, BMCR_PDOWN);
+ break;
+ }
}
void
@@ -432,10 +715,75 @@ rtl_powerdown_pll(struct rtl_hw *hw)
rtl_phy_power_down(hw);
+ if (!hw->HwIcVerUnknown) {
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) & ~BIT_7);
+ break;
+ }
+ }
+
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) & ~BIT_7);
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) & ~BIT_6);
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_6);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_6);
break;
}
}
@@ -470,12 +818,16 @@ rtl_xmii_reset_enable(struct rtl_hw *hw)
rtl_mdio_write(hw, 0x1F, 0x0000);
rtl_mdio_write(hw, MII_ADVERTISE, rtl_mdio_read(hw, MII_ADVERTISE) &
- ~(ADVERTISE_10HALF | ADVERTISE_10FULL | ADVERTISE_100HALF |
- ADVERTISE_100FULL));
+ ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
+ ADVERTISE_100HALF | ADVERTISE_100FULL));
rtl_mdio_write(hw, MII_CTRL1000, rtl_mdio_read(hw, MII_CTRL1000) &
~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
- rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4, rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4) &
- ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL));
+
+ if (rtl_is_8125(hw))
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4,
+ rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4) &
+ ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL));
+
rtl_mdio_write(hw, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
if (rtl_wait_phy_reset_complete(hw) == 0)
@@ -488,7 +840,7 @@ rtl8125_set_hw_phy_before_init_phy_mcu(struct rtl_hw *hw)
u16 phy_reg_value;
switch (hw->mcfg) {
- case CFG_METHOD_4:
+ case CFG_METHOD_50:
rtl_mdio_direct_write_phy_ocp(hw, 0xBF86, 0x9000);
rtl_set_eth_phy_ocp_bit(hw, 0xC402, BIT_10);
@@ -516,8 +868,41 @@ rtl_get_hw_phy_mcu_code_ver(struct rtl_hw *hw)
u16 hw_ram_code_ver = ~0;
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x801E);
+ hw_ram_code_ver = rtl_mdio_read(hw, 0x14);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
hw_ram_code_ver = rtl_mdio_direct_read_phy_ocp(hw, 0xA438);
break;
@@ -547,8 +932,42 @@ static void
rtl_write_hw_phy_mcu_code_ver(struct rtl_hw *hw)
{
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x801E);
+ rtl_mdio_write(hw, 0x14, hw->sw_ram_code_ver);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ hw->hw_ram_code_ver = hw->sw_ram_code_ver;
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
rtl_mdio_direct_write_phy_ocp(hw, 0xA438, hw->sw_ram_code_ver);
hw->hw_ram_code_ver = hw->sw_ram_code_ver;
@@ -560,6 +979,11 @@ static void
rtl_enable_phy_disable_mode(struct rtl_hw *hw)
{
switch (hw->HwSuppCheckPhyDisableModeVer) {
+ case 1:
+ rtl_mac_ocp_write(hw, 0xDC20, rtl_mac_ocp_read(hw, 0xDC20) |
+ BIT_1);
+ break;
+ case 2:
case 3:
RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) | BIT_5);
break;
@@ -570,6 +994,11 @@ static void
rtl_disable_phy_disable_mode(struct rtl_hw *hw)
{
switch (hw->HwSuppCheckPhyDisableModeVer) {
+ case 1:
+ rtl_mac_ocp_write(hw, 0xDC20, rtl_mac_ocp_read(hw, 0xDC20) &
+ ~BIT_1);
+ break;
+ case 2:
case 3:
RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_5);
break;
@@ -578,6 +1007,107 @@ rtl_disable_phy_disable_mode(struct rtl_hw *hw)
rte_delay_ms(1);
}
+static int
+rtl8168_phy_ram_code_check(struct rtl_hw *hw)
+{
+ u16 phy_reg_value;
+ int retval = TRUE;
+
+ if (hw->mcfg == CFG_METHOD_21) {
+ rtl_mdio_write(hw, 0x1f, 0x0A40);
+ phy_reg_value = rtl_mdio_read(hw, 0x10);
+ phy_reg_value &= ~BIT_11;
+ rtl_mdio_write(hw, 0x10, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A00);
+ phy_reg_value = rtl_mdio_read(hw, 0x10);
+ phy_reg_value &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15);
+ rtl_mdio_write(hw, 0x10, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8010);
+ phy_reg_value = rtl_mdio_read(hw, 0x14);
+ phy_reg_value &= ~BIT_11;
+ rtl_mdio_write(hw, 0x14, phy_reg_value);
+
+ retval = rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A40);
+ rtl_mdio_write(hw, 0x10, 0x0140);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A4A);
+ phy_reg_value = rtl_mdio_read(hw, 0x13);
+ phy_reg_value &= ~BIT_6;
+ phy_reg_value |= BIT_7;
+ rtl_mdio_write(hw, 0x13, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A44);
+ phy_reg_value = rtl_mdio_read(hw, 0x14);
+ phy_reg_value |= BIT_2;
+ rtl_mdio_write(hw, 0x14, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A50);
+ phy_reg_value = rtl_mdio_read(hw, 0x11);
+ phy_reg_value |= (BIT_11 | BIT_12);
+ rtl_mdio_write(hw, 0x11, phy_reg_value);
+
+ retval = rtl_clear_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A40);
+ rtl_mdio_write(hw, 0x10, 0x1040);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A4A);
+ phy_reg_value = rtl_mdio_read(hw, 0x13);
+ phy_reg_value &= ~(BIT_6 | BIT_7);
+ rtl_mdio_write(hw, 0x13, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A44);
+ phy_reg_value = rtl_mdio_read(hw, 0x14);
+ phy_reg_value &= ~BIT_2;
+ rtl_mdio_write(hw, 0x14, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A50);
+ phy_reg_value = rtl_mdio_read(hw, 0x11);
+ phy_reg_value &= ~(BIT_11 | BIT_12);
+ rtl_mdio_write(hw, 0x11, phy_reg_value);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A43);
+ rtl_mdio_write(hw, 0x13, 0x8010);
+ phy_reg_value = rtl_mdio_read(hw, 0x14);
+ phy_reg_value |= BIT_11;
+ rtl_mdio_write(hw, 0x14, phy_reg_value);
+
+ retval = rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_mdio_write(hw, 0x1f, 0x0A20);
+ phy_reg_value = rtl_mdio_read(hw, 0x13);
+ if (phy_reg_value & BIT_11) {
+ if (phy_reg_value & BIT_10)
+ retval = FALSE;
+ }
+
+ retval = rtl_clear_phy_mcu_patch_request(hw);
+
+ rte_delay_ms(2);
+ }
+
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+
+ return retval;
+}
+
+static void
+rtl8168_set_phy_ram_code_check_fail_flag(struct rtl_hw *hw)
+{
+ u16 tmp_ushort;
+
+ if (hw->mcfg == CFG_METHOD_21) {
+ tmp_ushort = rtl_mac_ocp_read(hw, 0xD3C0);
+ tmp_ushort |= BIT_0;
+ rtl_mac_ocp_write(hw, 0xD3C0, tmp_ushort);
+ }
+}
+
static void
rtl_init_hw_phy_mcu(struct rtl_hw *hw)
{
@@ -589,6 +1119,11 @@ rtl_init_hw_phy_mcu(struct rtl_hw *hw)
if (rtl_check_hw_phy_mcu_code_ver(hw))
return;
+ if (!rtl_is_8125(hw) && !rtl8168_phy_ram_code_check(hw)) {
+ rtl8168_set_phy_ram_code_check_fail_flag(hw);
+ return;
+ }
+
if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(hw) && rtl_is_in_phy_disable_mode(hw))
require_disable_phy_disable_mode = TRUE;
@@ -611,44 +1146,107 @@ static void
rtl_disable_aldps(struct rtl_hw *hw)
{
u16 tmp_ushort;
- u32 timeout, wait_cnt;
-
- tmp_ushort = rtl_mdio_real_read_phy_ocp(hw, 0xA430);
- if (tmp_ushort & BIT_2) {
- timeout = 0;
- wait_cnt = 200;
- rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
+ u32 timeout = 0;
+ u32 wait_cnt = 200;
- do {
- rte_delay_us(100);
-
- tmp_ushort = rtl_mac_ocp_read(hw, 0xE908);
-
- timeout++;
- } while (!(tmp_ushort & BIT_7) && timeout < wait_cnt);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ tmp_ushort = rtl_mdio_real_direct_read_phy_ocp(hw, 0xA430);
+ if (tmp_ushort & BIT_2)
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ tmp_ushort = rtl_mdio_real_direct_read_phy_ocp(hw, 0xA430);
+ if (tmp_ushort & BIT_2) {
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
+
+ do {
+ rte_delay_us(100);
+ tmp_ushort = rtl_mac_ocp_read(hw, 0xE908);
+ timeout++;
+ } while (!(tmp_ushort & BIT_7) && timeout < wait_cnt);
+ }
+ break;
}
}
static bool
rtl_is_adv_eee_enabled(struct rtl_hw *hw)
{
+ bool enabled = false;
+
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_55:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ if (rtl_mdio_read(hw, 0x10) & BIT_15)
+ enabled = true;
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
if (rtl_mdio_direct_read_phy_ocp(hw, 0xA430) & BIT_15)
- return true;
+ enabled = true;
break;
default:
break;
}
- return false;
+ return enabled;
}
static void
_rtl_disable_adv_eee(struct rtl_hw *hw)
{
bool lock;
+ u16 data;
if (rtl_is_adv_eee_enabled(hw))
lock = true;
@@ -658,9 +1256,70 @@ _rtl_disable_adv_eee(struct rtl_hw *hw)
if (lock)
rtl_set_phy_mcu_patch_request(hw);
- rtl_clear_mac_ocp_bit(hw, 0xE052, BIT_0);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA442, (BIT_12 | BIT_13));
- rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_15);
+ switch (hw->mcfg) {
+ case CFG_METHOD_25:
+ rtl_eri_write(hw, 0x1EA, 1, 0x00, ERIAR_ExGMAC);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ data = rtl_mdio_read(hw, 0x16);
+ data &= ~BIT_1;
+ rtl_mdio_write(hw, 0x16, data);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_26:
+ data = rtl_mac_ocp_read(hw, 0xE052);
+ data &= ~BIT_0;
+ rtl_mac_ocp_write(hw, 0xE052, data);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ data = rtl_mdio_read(hw, 0x16);
+ data &= ~BIT_1;
+ rtl_mdio_write(hw, 0x16, data);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ data = rtl_mac_ocp_read(hw, 0xE052);
+ data &= ~BIT_0;
+ rtl_mac_ocp_write(hw, 0xE052, data);
+ break;
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ data = rtl_mac_ocp_read(hw, 0xE052);
+ data &= ~BIT_0;
+ rtl_mac_ocp_write(hw, 0xE052, data);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ data = rtl_mdio_read(hw, 0x10) & ~(BIT_15);
+ rtl_mdio_write(hw, 0x10, data);
+
+ rtl_mdio_write(hw, 0x1F, 0x0A44);
+ data = rtl_mdio_read(hw, 0x11) & ~(BIT_12 | BIT_13 | BIT_14);
+ rtl_mdio_write(hw, 0x11, data);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_clear_mac_ocp_bit(hw, 0xE052, BIT_0);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA442, (BIT_12 | BIT_13));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_15);
+ break;
+ }
if (lock)
rtl_clear_phy_mcu_patch_request(hw);
@@ -669,25 +1328,42 @@ _rtl_disable_adv_eee(struct rtl_hw *hw)
static void
rtl_disable_adv_eee(struct rtl_hw *hw)
{
+ if (hw->mcfg < CFG_METHOD_25 || hw->mcfg == CFG_METHOD_37)
+ return;
+
switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
- rtl8125_oob_mutex_lock(hw);
+ rtl_oob_mutex_lock(hw);
break;
}
_rtl_disable_adv_eee(hw);
switch (hw->mcfg) {
+ case CFG_METHOD_23:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
- rtl8125_oob_mutex_unlock(hw);
+ rtl_oob_mutex_unlock(hw);
break;
}
}
@@ -695,7 +1371,39 @@ rtl_disable_adv_eee(struct rtl_hw *hw)
static void
rtl_disable_eee(struct rtl_hw *hw)
{
+ u16 data;
+ u32 csi_tmp;
+
switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ csi_tmp = rtl_eri_read(hw, 0x1B0, 4, ERIAR_ExGMAC);
+ csi_tmp &= ~(BIT_1 | BIT_0);
+ rtl_eri_write(hw, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+ rtl_mdio_write(hw, 0x1F, 0x0A43);
+ data = rtl_mdio_read(hw, 0x11);
+ if (hw->mcfg == CFG_METHOD_36)
+ rtl_mdio_write(hw, 0x11, data | BIT_4);
+ else
+ rtl_mdio_write(hw, 0x11, data & ~BIT_4);
+ rtl_mdio_write(hw, 0x1F, 0x0A5D);
+ rtl_mdio_write(hw, 0x10, 0x0000);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_52:
@@ -712,7 +1420,11 @@ rtl_disable_eee(struct rtl_hw *hw)
break;
case CFG_METHOD_50:
case CFG_METHOD_51:
- case CFG_METHOD_53 ... CFG_METHOD_57:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
rtl_clear_mac_ocp_bit(hw, 0xE040, (BIT_1 | BIT_0));
rtl_set_eth_phy_ocp_bit(hw, 0xA432, BIT_4);
@@ -723,7 +1435,9 @@ rtl_disable_eee(struct rtl_hw *hw)
rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_7);
rtl_clear_eth_phy_ocp_bit(hw, 0xA4A2, BIT_9);
break;
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_clear_mac_ocp_bit(hw, 0xE040, (BIT_1 | BIT_0));
rtl_clear_eth_phy_ocp_bit(hw, 0xA5D0, (MDIO_EEE_100TX | MDIO_EEE_1000T));
@@ -740,6 +1454,19 @@ rtl_disable_eee(struct rtl_hw *hw)
break;
}
+ switch (hw->mcfg) {
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ rtl_clear_eth_phy_bit(hw, 0x14, BIT_7);
+ rtl_mdio_write(hw, 0x1F, 0x0A4A);
+ rtl_clear_eth_phy_bit(hw, 0x11, BIT_9);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ }
+
/* Advanced EEE */
rtl_disable_adv_eee(hw);
}
@@ -749,24 +1476,32 @@ rtl_hw_phy_config(struct rtl_hw *hw)
{
rtl_xmii_reset_enable(hw);
+ if (HW_DASH_SUPPORT_TYPE_3(hw) && hw->HwPkgDet == 0x06)
+ return;
+
rtl8125_set_hw_phy_before_init_phy_mcu(hw);
rtl_init_hw_phy_mcu(hw);
hw->hw_ops.hw_phy_config(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- rtl_disable_aldps(hw);
- break;
- }
+ rtl_disable_aldps(hw);
/* Legacy force mode (chap 22) */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
- default:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
rtl_clear_eth_phy_ocp_bit(hw, 0xA5B4, BIT_15);
break;
}
@@ -784,7 +1519,11 @@ rtl_phy_restart_nway(struct rtl_hw *hw)
return;
rtl_mdio_write(hw, 0x1F, 0x0000);
- rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
+ if (rtl_is_8125(hw))
+ rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
+ else
+ rtl_mdio_write(hw, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
+ BMCR_ANRESTART);
}
static void
@@ -819,11 +1558,45 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
int rc = -EINVAL;
/* Disable giga lite */
- rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_9);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_0);
+ switch (hw->mcfg) {
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ rtl_clear_eth_phy_bit(hw, 0x14, BIT_9);
+ rtl_mdio_write(hw, 0x1F, 0x0A40);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ rtl_mdio_write(hw, 0x1F, 0x0A42);
+ rtl_clear_eth_phy_bit(hw, 0x14, BIT_9 | BIT_7);
+ rtl_mdio_write(hw, 0x1F, 0x0A40);
+ rtl_mdio_write(hw, 0x1F, 0x0000);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_9);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_0);
- if (HW_SUPP_PHY_LINK_SPEED_5000M(hw))
- rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_1);
+ if (HW_SUPP_PHY_LINK_SPEED_5000M(hw))
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_1);
+ break;
+ }
if (!rtl_is_speed_mode_valid(speed)) {
speed = hw->HwSuppMaxPhyLinkSpeed;
@@ -833,8 +1606,10 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
giga_ctrl = rtl_mdio_read(hw, MII_CTRL1000);
giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
- ctrl_2500 = rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4);
- ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL);
+ if (rtl_is_8125(hw)) {
+ ctrl_2500 = rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4);
+ ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL);
+ }
if (autoneg == AUTONEG_ENABLE) {
/* N-way force */
@@ -867,7 +1642,8 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
rtl_mdio_write(hw, 0x1f, 0x0000);
rtl_mdio_write(hw, MII_ADVERTISE, auto_nego);
rtl_mdio_write(hw, MII_CTRL1000, giga_ctrl);
- rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4, ctrl_2500);
+ if (rtl_is_8125(hw))
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4, ctrl_2500);
rtl_phy_restart_nway(hw);
rte_delay_ms(20);
} else {
@@ -897,3 +1673,27 @@ rtl_set_speed(struct rtl_hw *hw)
return ret;
}
+
+void
+rtl_clear_and_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
+ u16 setmask)
+{
+ u16 phy_reg_value;
+
+ phy_reg_value = rtl_mdio_read(hw, addr);
+ phy_reg_value &= ~clearmask;
+ phy_reg_value |= setmask;
+ rtl_mdio_write(hw, addr, phy_reg_value);
+}
+
+void
+rtl_clear_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask)
+{
+ rtl_clear_and_set_eth_phy_bit(hw, addr, mask, 0);
+}
+
+void
+rtl_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask)
+{
+ rtl_clear_and_set_eth_phy_bit(hw, addr, 0, mask);
+}
diff --git a/drivers/net/r8169/r8169_phy.h b/drivers/net/r8169/r8169_phy.h
index 4d553f9712..ea1facba5b 100644
--- a/drivers/net/r8169/r8169_phy.h
+++ b/drivers/net/r8169/r8169_phy.h
@@ -109,6 +109,8 @@
#define MDIO_EEE_2_5GT 0x0001
#define MDIO_EEE_5GT 0x0002
+#define HW_SUPP_SERDES_PHY(_M) ((_M)->HwSuppSerDesPhyVer > 0)
+
void rtl_clear_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
void rtl_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
@@ -124,6 +126,7 @@ void rtl_clear_eth_phy_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
void rtl_set_eth_phy_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
void rtl_ephy_write(struct rtl_hw *hw, int addr, int value);
+u16 rtl_ephy_read(struct rtl_hw *hw, int addr);
void rtl_clear_and_set_pcie_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
u16 setmask);
@@ -144,4 +147,12 @@ void rtl_hw_phy_config(struct rtl_hw *hw);
int rtl_set_speed(struct rtl_hw *hw);
+u32 rtl_mdio_real_read_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr);
+void rtl_mdio_real_write_phy_ocp(struct rtl_hw *hw, u16 PageNum, u32 RegAddr,
+ u32 value);
+void rtl_clear_and_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
+ u16 setmask);
+void rtl_clear_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask);
+void rtl_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask);
+
#endif /* R8169_PHY_H */
diff --git a/drivers/net/r8169/r8169_rxtx.c b/drivers/net/r8169/r8169_rxtx.c
index 57b97338d4..eee91a639e 100644
--- a/drivers/net/r8169/r8169_rxtx.c
+++ b/drivers/net/r8169/r8169_rxtx.c
@@ -41,10 +41,6 @@ struct rtl_tx_desc {
RTE_ATOMIC(u32) opts1;
u32 opts2;
u64 addr;
- u32 reserved0;
- u32 reserved1;
- u32 reserved2;
- u32 reserved3;
};
/* Struct RxDesc in kernel r8169 */
@@ -187,6 +183,9 @@ enum _DescStatusBit {
#define LSOPKTSIZE_MAX 0xffffU
#define MSS_MAX 0x07ffu /* MSS value */
+typedef void (*rtl_clear_rdu_func)(struct rtl_hw *);
+static rtl_clear_rdu_func rtl_clear_rdu;
+
/* ---------------------------------RX---------------------------------- */
static void
@@ -384,8 +383,8 @@ rtl_alloc_rx_queue_mbufs(struct rtl_rx_queue *rxq)
return 0;
}
-static int
-rtl_hw_set_features(struct rtl_hw *hw, uint64_t offloads)
+static void
+rtl8125_hw_set_features(struct rtl_hw *hw, uint64_t offloads)
{
u16 cp_cmd;
u32 rx_config;
@@ -406,8 +405,35 @@ rtl_hw_set_features(struct rtl_hw *hw, uint64_t offloads)
cp_cmd &= ~RxChkSum;
RTL_W16(hw, CPlusCmd, cp_cmd);
+}
- return 0;
+static void
+rtl8168_hw_set_features(struct rtl_hw *hw, uint64_t offloads)
+{
+ u16 cp_cmd;
+
+ cp_cmd = RTL_R16(hw, CPlusCmd);
+
+ if (offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM)
+ cp_cmd |= RxChkSum;
+ else
+ cp_cmd &= ~RxChkSum;
+
+ if (offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
+ cp_cmd |= RxVlan;
+ else
+ cp_cmd &= ~RxVlan;
+
+ RTL_W16(hw, CPlusCmd, cp_cmd);
+}
+
+static void
+rtl_hw_set_features(struct rtl_hw *hw, uint64_t offloads)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_hw_set_features(hw, offloads);
+ else
+ rtl8168_hw_set_features(hw, offloads);
}
static void
@@ -421,6 +447,18 @@ rtl_hw_set_rx_packet_filter(struct rtl_hw *hw)
RTL_W32(hw, RxConfig, rx_mode | (RTL_R32(hw, RxConfig)));
}
+static void
+rtl8125_clear_rdu(struct rtl_hw *hw)
+{
+ RTL_W32(hw, ISR0_8125, (RxOK | RxErr | RxDescUnavail));
+}
+
+static void
+rtl8168_clear_rdu(struct rtl_hw *hw)
+{
+ RTL_W16(hw, IntrStatus, (RxOK | RxErr | RxDescUnavail));
+}
+
int
rtl_rx_init(struct rte_eth_dev *dev)
{
@@ -428,7 +466,7 @@ rtl_rx_init(struct rte_eth_dev *dev)
struct rtl_hw *hw = &adapter->hw;
struct rtl_rx_queue *rxq;
int ret;
- u32 max_rx_pkt_size;
+ u32 csi_tmp, max_rx_pkt_size;
rxq = dev->data->rx_queues[0];
@@ -463,6 +501,37 @@ rtl_rx_init(struct rte_eth_dev *dev)
rtl_enable_cfg9346_write(hw);
+ switch (hw->mcfg) {
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ /* RX ftr mcu enable */
+ csi_tmp = rtl_eri_read(hw, 0xDC, 1, ERIAR_ExGMAC);
+ csi_tmp &= ~BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+ csi_tmp |= BIT_0;
+ rtl_eri_write(hw, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+ /* RSS disable */
+ rtl_eri_write(hw, 0xC0, 2, 0x0000, ERIAR_ExGMAC); /* queue num = 1 */
+ rtl_eri_write(hw, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+ break;
+ }
+
/* RX accept type and csum vlan offload */
rtl_hw_set_features(hw, rxq->offloads);
@@ -477,6 +546,11 @@ rtl_rx_init(struct rte_eth_dev *dev)
dev->data->rx_queue_state[0] = RTE_ETH_QUEUE_STATE_STARTED;
+ if (rtl_is_8125(hw))
+ rtl_clear_rdu = rtl8125_clear_rdu;
+ else
+ rtl_clear_rdu = rtl8168_clear_rdu;
+
return 0;
}
@@ -527,10 +601,10 @@ rtl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
uint16_t nb_rx = 0;
uint16_t nb_hold = 0;
uint16_t tail = rxq->rx_tail;
+ uint16_t pkt_len = 0;
const uint16_t nb_rx_desc = rxq->nb_rx_desc;
uint32_t opts1;
uint32_t opts2;
- uint16_t pkt_len = 0;
uint64_t dma_addr;
hw_ring = rxq->hw_ring;
@@ -632,7 +706,7 @@ rtl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
rte_wmb();
/* Clear RDU */
- RTL_W32(hw, ISR0_8125, (RxOK | RxErr | RxDescUnavail));
+ rtl_clear_rdu(hw);
nb_hold = 0;
}
@@ -829,7 +903,7 @@ rtl_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
rte_wmb();
/* Clear RDU */
- RTL_W32(hw, ISR0_8125, (RxOK | RxErr | RxDescUnavail));
+ rtl_clear_rdu(hw);
nb_hold = 0;
}
@@ -941,7 +1015,7 @@ rtl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
txq = rte_zmalloc_socket("r8169 TX queue", sizeof(struct rtl_tx_queue),
RTE_CACHE_LINE_SIZE, socket_id);
- if (txq == NULL) {
+ if (!txq) {
PMD_INIT_LOG(ERR, "Cannot allocate Tx queue structure");
return -ENOMEM;
}
@@ -995,6 +1069,44 @@ rtl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
return 0;
}
+static void
+rtl8125_set_tx_tag_num(struct rtl_hw *hw)
+{
+ u32 mac_ocp_data;
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE614);
+ mac_ocp_data &= ~(BIT_10 | BIT_9 | BIT_8);
+ switch (hw->mcfg) {
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_53:
+ mac_ocp_data |= (2 << 8);
+ break;
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ if (hw->EnableTxNoClose)
+ mac_ocp_data |= (4 << 8);
+ else
+ mac_ocp_data |= (3 << 8);
+ break;
+ default:
+ mac_ocp_data |= (3 << 8);
+ break;
+ }
+ rtl_mac_ocp_write(hw, 0xE614, mac_ocp_data);
+}
+
+/* Set MTPS: Max Tx Pkt Size */
+static void
+rtl8168_set_mtps(struct rtl_hw *hw)
+{
+ if (hw->mtu > RTE_ETHER_MTU)
+ RTL_W8(hw, MTPS, 0x27);
+ else
+ RTL_W8(hw, MTPS, 0x3F);
+}
+
int
rtl_tx_init(struct rte_eth_dev *dev)
{
@@ -1010,10 +1122,45 @@ rtl_tx_init(struct rte_eth_dev *dev)
rtl_enable_cfg9346_write(hw);
+ if (rtl_is_8125(hw))
+ rtl8125_set_tx_tag_num(hw);
+ else
+ rtl8168_set_mtps(hw);
+
/* Set TDFNR: TX Desc Fetch NumbeR */
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_57:
- case CFG_METHOD_69 ... CFG_METHOD_71:
+ case CFG_METHOD_21:
+ case CFG_METHOD_22:
+ case CFG_METHOD_23:
+ case CFG_METHOD_24:
+ case CFG_METHOD_25:
+ case CFG_METHOD_26:
+ case CFG_METHOD_27:
+ case CFG_METHOD_28:
+ case CFG_METHOD_29:
+ case CFG_METHOD_30:
+ case CFG_METHOD_31:
+ case CFG_METHOD_32:
+ case CFG_METHOD_33:
+ case CFG_METHOD_34:
+ case CFG_METHOD_35:
+ case CFG_METHOD_36:
+ case CFG_METHOD_37:
+ RTL_W8(hw, TDFNR, 0x4);
+ break;
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
RTL_W8(hw, TDFNR, 0x10);
break;
}
@@ -1187,7 +1334,12 @@ rtl_xmit_pkt(struct rtl_hw *hw, struct rtl_tx_queue *txq,
rtl_setup_csum_offload(tx_pkt, tx_ol_flags, opts);
switch (hw->mcfg) {
- case CFG_METHOD_48 ... CFG_METHOD_53:
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_50:
+ case CFG_METHOD_51:
+ case CFG_METHOD_52:
+ case CFG_METHOD_53:
rtl8125_ptp_patch(tx_pkt);
break;
}
@@ -1270,7 +1422,7 @@ rtl_get_opts1(struct rtl_tx_desc *txd)
}
static void
-rtl_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
+rtl8125_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
{
struct rtl_tx_entry *sw_ring = txq->sw_ring;
struct rtl_tx_entry *txe;
@@ -1282,7 +1434,7 @@ rtl_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
uint32_t tx_left;
uint32_t tx_desc_closed, next_hw_desc_clo_ptr0;
- if (txq == NULL)
+ if (!txq)
return;
if (enable_tx_no_close) {
@@ -1319,8 +1471,54 @@ rtl_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
txq->tx_head = head;
}
-int
-rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
+static void
+rtl8168_tx_clean(struct rtl_hw *hw __rte_unused, struct rtl_tx_queue *txq)
+{
+ struct rtl_tx_entry *sw_ring = txq->sw_ring;
+ struct rtl_tx_entry *txe;
+ struct rtl_tx_desc *txd;
+ const uint16_t nb_tx_desc = txq->nb_tx_desc;
+ const int tx_tail = txq->tx_tail % nb_tx_desc;
+ int head = txq->tx_head;
+ uint16_t desc_freed = 0;
+
+ if (!txq)
+ return;
+
+ while (1) {
+ txd = &txq->hw_ring[head];
+
+ if (rtl_get_opts1(txd) & DescOwn)
+ break;
+
+ txe = &sw_ring[head];
+ if (txe->mbuf) {
+ rte_pktmbuf_free_seg(txe->mbuf);
+ txe->mbuf = NULL;
+ }
+
+ head = (head + 1) % nb_tx_desc;
+ desc_freed++;
+
+ if (head == tx_tail)
+ break;
+ }
+
+ txq->tx_free += desc_freed;
+ txq->tx_head = head;
+}
+
+static void
+rtl_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_tx_clean(hw, txq);
+ else
+ rtl8168_tx_clean(hw, txq);
+}
+
+static int
+rtl8125_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
{
struct rtl_tx_queue *txq = tx_queue;
struct rtl_hw *hw = txq->hw;
@@ -1336,7 +1534,7 @@ rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
uint32_t status;
uint32_t tx_desc_closed, next_hw_desc_clo_ptr0;
- if (txq == NULL)
+ if (!txq)
return -ENODEV;
if (enable_tx_no_close) {
@@ -1385,8 +1583,70 @@ rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
return count;
}
+static int
+rtl8168_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
+{
+ struct rtl_tx_queue *txq = tx_queue;
+ struct rtl_tx_entry *sw_ring = txq->sw_ring;
+ struct rtl_tx_entry *txe;
+ struct rtl_tx_desc *txd;
+ const uint16_t nb_tx_desc = txq->nb_tx_desc;
+ const int tx_tail = txq->tx_tail % nb_tx_desc;
+ int head = txq->tx_head;
+ uint16_t desc_freed = 0;
+ int count = 0;
+ uint32_t status;
+
+ if (!txq)
+ return -ENODEV;
+
+ while (1) {
+ txd = &txq->hw_ring[head];
+
+ status = rtl_get_opts1(txd);
+
+ if (status & DescOwn)
+ break;
+
+ txe = &sw_ring[head];
+ if (txe->mbuf) {
+ rte_pktmbuf_free_seg(txe->mbuf);
+ txe->mbuf = NULL;
+ }
+
+ head = (head + 1) % nb_tx_desc;
+ desc_freed++;
+
+ if (status & LastFrag) {
+ count++;
+ if ((uint32_t)count == free_cnt)
+ break;
+ }
+
+ if (head == tx_tail)
+ break;
+ }
+
+ txq->tx_free += desc_freed;
+ txq->tx_head = head;
+
+ return count;
+}
+
+int
+rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
+{
+ struct rtl_tx_queue *txq = tx_queue;
+ struct rtl_hw *hw = txq->hw;
+
+ if (rtl_is_8125(hw))
+ return rtl8125_tx_done_cleanup(tx_queue, free_cnt);
+ else
+ return rtl8168_tx_done_cleanup(tx_queue, free_cnt);
+}
+
static void
-rtl_doorbell(struct rtl_hw *hw, struct rtl_tx_queue *txq)
+rtl8125_doorbell(struct rtl_hw *hw, struct rtl_tx_queue *txq)
{
if (hw->EnableTxNoClose)
if (hw->HwSuppTxNoCloseVer > 3)
@@ -1397,6 +1657,21 @@ rtl_doorbell(struct rtl_hw *hw, struct rtl_tx_queue *txq)
RTL_W16(hw, TPPOLL_8125, BIT_0);
}
+static void
+rtl8168_doorbell(struct rtl_hw *hw)
+{
+ RTL_W8(hw, TxPoll, NPQ);
+}
+
+static void
+rtl_doorbell(struct rtl_hw *hw, struct rtl_tx_queue *txq)
+{
+ if (rtl_is_8125(hw))
+ rtl8125_doorbell(hw, txq);
+ else
+ rtl8168_doorbell(hw);
+}
+
/* PMD transmit function */
uint16_t
rtl_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/8] net/r8169: update HW configurations for 8125 and 8126
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 3/8] net/r8169: add support for RTL8127 Howard Wang
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/base/rtl8125b.c | 4 +
drivers/net/r8169/base/rtl8125bp_mcu.c | 172 +--
drivers/net/r8169/base/rtl8125d.c | 99 +-
drivers/net/r8169/base/rtl8125d_mcu.c | 1471 ++++++++++++++++++------
drivers/net/r8169/base/rtl8125d_mcu.h | 1 +
drivers/net/r8169/base/rtl8126a.c | 8 +-
drivers/net/r8169/base/rtl8126a_mcu.c | 888 ++++++++------
drivers/net/r8169/r8169_hw.h | 6 +-
8 files changed, 1791 insertions(+), 858 deletions(-)
diff --git a/drivers/net/r8169/base/rtl8125b.c b/drivers/net/r8169/base/rtl8125b.c
index 353b3a2466..06cd125bcf 100644
--- a/drivers/net/r8169/base/rtl8125b.c
+++ b/drivers/net/r8169/base/rtl8125b.c
@@ -336,6 +336,10 @@ rtl_hw_phy_config_8125b_2(struct rtl_hw *hw)
(BIT_13 | BIT_10 | BIT_9 | BIT_8),
(BIT_15 | BIT_14 | BIT_12 | BIT_11));
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8015);
+ rtl_set_eth_phy_ocp_bit(hw, 0xB87E, BIT_8);
+ rtl_mdio_direct_read_phy_ocp(hw, 0xB906);
+
rtl_set_eth_phy_ocp_bit(hw, 0xA424, BIT_3);
}
diff --git a/drivers/net/r8169/base/rtl8125bp_mcu.c b/drivers/net/r8169/base/rtl8125bp_mcu.c
index 69ec072d5a..05e04dbf84 100644
--- a/drivers/net/r8169/base/rtl8125bp_mcu.c
+++ b/drivers/net/r8169/base/rtl8125bp_mcu.c
@@ -15,63 +15,20 @@ void
rtl_set_mac_mcu_8125bp_1(struct rtl_hw *hw)
{
static const u16 mcu_patch_code_8125bp_1[] = {
- 0xE003, 0xE007, 0xE01A, 0x1BC8, 0x46EB, 0xC302, 0xBB00, 0x0F14, 0xC211,
- 0x400A, 0xF00A, 0xC20F, 0x400A, 0xF007, 0x73A4, 0xC20C, 0x400A, 0xF102,
- 0x48B0, 0x9B20, 0x1B00, 0x9BA0, 0xC602, 0xBE00, 0x4364, 0xE6E0, 0xE6E2,
- 0xC01C, 0xB406, 0x1000, 0xF016, 0xC61F, 0x400E, 0xF012, 0x218E, 0x25BE,
- 0x1300, 0xF007, 0x7340, 0xC618, 0x400E, 0xF102, 0x48B0, 0x8320, 0xB400,
- 0x2402, 0x1000, 0xF003, 0x7342, 0x8322, 0xB000, 0xE007, 0x7322, 0x9B42,
- 0x7320, 0x9B40, 0x0300, 0x0300, 0xB006, 0xC302, 0xBB00, 0x413E, 0xE6E0,
- 0xC01C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x1171, 0x0B17, 0x0816, 0x1108
+ 0xE010, 0xE014, 0xE027, 0xE04A, 0xE04D, 0xE050, 0xE052, 0xE054, 0xE056,
+ 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xE064, 0x1BC8, 0x46EB,
+ 0xC302, 0xBB00, 0x0F14, 0xC211, 0x400A, 0xF00A, 0xC20F, 0x400A, 0xF007,
+ 0x73A4, 0xC20C, 0x400A, 0xF102, 0x48B0, 0x9B20, 0x1B00, 0x9BA0, 0xC602,
+ 0xBE00, 0x4364, 0xE6E0, 0xE6E2, 0xC01C, 0xB406, 0x1000, 0xF016, 0xC61F,
+ 0x400E, 0xF012, 0x218E, 0x25BE, 0x1300, 0xF007, 0x7340, 0xC618, 0x400E,
+ 0xF102, 0x48B0, 0x8320, 0xB400, 0x2402, 0x1000, 0xF003, 0x7342, 0x8322,
+ 0xB000, 0xE007, 0x7322, 0x9B42, 0x7320, 0x9B40, 0x0300, 0x0300, 0xB006,
+ 0xC302, 0xBB00, 0x413E, 0xE6E0, 0xC01C, 0x49D1, 0xC602, 0xBE00, 0x3F94,
+ 0x49D1, 0xC602, 0xBE00, 0x4030, 0xC602, 0xBE00, 0x3FDA, 0xC102, 0xB900,
+ 0x401A, 0xC102, 0xB900, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0x6936, 0x0A18, 0x0C02, 0x0D21
};
rtl_hw_disable_mac_mcu_bps(hw);
@@ -84,109 +41,46 @@ rtl_set_mac_mcu_8125bp_1(struct rtl_hw *hw)
rtl_mac_ocp_write(hw, 0xFC28, 0x0f10);
rtl_mac_ocp_write(hw, 0xFC2A, 0x435c);
rtl_mac_ocp_write(hw, 0xFC2C, 0x4112);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x3F92);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x402E);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x3FD6);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x4018);
- rtl_mac_ocp_write(hw, 0xFC48, 0x0007);
+ rtl_mac_ocp_write(hw, 0xFC48, 0x007F);
}
void
rtl_set_mac_mcu_8125bp_2(struct rtl_hw *hw)
{
static const u16 mcu_patch_code_8125bp_2[] = {
- 0xE010, 0xE033, 0xE046, 0xE04A, 0xE04C, 0xE04E, 0xE050, 0xE052, 0xE054,
- 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB406, 0x1000,
+ 0xE010, 0xE033, 0xE046, 0xE04A, 0xE04D, 0xE050, 0xE052, 0xE054, 0xE056,
+ 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xE064, 0xB406, 0x1000,
0xF016, 0xC61F, 0x400E, 0xF012, 0x218E, 0x25BE, 0x1300, 0xF007, 0x7340,
0xC618, 0x400E, 0xF102, 0x48B0, 0x8320, 0xB400, 0x2402, 0x1000, 0xF003,
0x7342, 0x8322, 0xB000, 0xE007, 0x7322, 0x9B42, 0x7320, 0x9B40, 0x0300,
0x0300, 0xB006, 0xC302, 0xBB00, 0x4168, 0xE6E0, 0xC01C, 0xC211, 0x400A,
0xF00A, 0xC20F, 0x400A, 0xF007, 0x73A4, 0xC20C, 0x400A, 0xF102, 0x48B0,
0x9B20, 0x1B00, 0x9BA0, 0xC602, 0xBE00, 0x4392, 0xE6E0, 0xE6E2, 0xC01C,
- 0x4166, 0x9CF6, 0xC002, 0xB800, 0x143C, 0xC602, 0xBE00, 0x0000, 0xC602,
- 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC102,
- 0xB900, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
- 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
- 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1171,
- 0x0B18, 0x030D, 0x0A2A
+ 0x4166, 0x9CF6, 0xC002, 0xB800, 0x143C, 0x49D1, 0xC602, 0xBE00, 0x3FC4,
+ 0x49D1, 0xC602, 0xBE00, 0x405A, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC102, 0xB900, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0x6936, 0x0B18, 0x0C02, 0x0D22
};
rtl_hw_disable_mac_mcu_bps(hw);
rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125bp_2,
ARRAY_SIZE(mcu_patch_code_8125bp_2));
+
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
rtl_mac_ocp_write(hw, 0xFC28, 0x413C);
rtl_mac_ocp_write(hw, 0xFC2A, 0x438A);
rtl_mac_ocp_write(hw, 0xFC2C, 0x143A);
- rtl_mac_ocp_write(hw, 0xFC48, 0x0007);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x3FC2);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x4058);
+
+ rtl_mac_ocp_write(hw, 0xFC48, 0x001F);
}
/* ------------------------------------PHY 8125BP--------------------------------------- */
diff --git a/drivers/net/r8169/base/rtl8125d.c b/drivers/net/r8169/base/rtl8125d.c
index 5a00733498..3d4b60abc9 100644
--- a/drivers/net/r8169/base/rtl8125d.c
+++ b/drivers/net/r8169/base/rtl8125d.c
@@ -39,17 +39,22 @@ rtl_hw_phy_config_8125d_1(struct rtl_hw *hw)
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBF8E, 0x3C00, 0x2800);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x4000);
- rtl_set_eth_phy_ocp_bit(hw, 0xBCD8, (BIT_15 | BIT_14));
+ rtl_set_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x4000);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC80, 0x001F, 0x0004);
- rtl_set_eth_phy_ocp_bit(hw, 0xBC82, (BIT_15 | BIT_14 | BIT_13));
- rtl_set_eth_phy_ocp_bit(hw, 0xBC82, (BIT_12 | BIT_11 | BIT_10));
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_15 | BIT_14 | BIT_13);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_12 | BIT_11 | BIT_10);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC80, 0x001F, 0x0005);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC82, 0x00E0, 0x0040);
- rtl_set_eth_phy_ocp_bit(hw, 0xBC82, (BIT_4 | BIT_3 | BIT_2));
- rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, (BIT_15 | BIT_14));
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_4 | BIT_3 | BIT_2);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x8000);
- rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, (BIT_15 | BIT_14));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBD70, BIT_8);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA466, BIT_1);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x836a);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, 0xFF00);
rtl_clear_phy_mcu_patch_request(hw);
@@ -72,7 +77,17 @@ rtl_hw_phy_config_8125d_1(struct rtl_hw *hw)
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0600);
}
- rtl_clear_eth_phy_ocp_bit(hw, 0xAD40, (BIT_5 | BIT_4));
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAC7E, 0x01FC, 0x00B4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8105);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x7A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8117);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x3A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8103);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x7400);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8115);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x3400);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xAD40, BIT_5 | BIT_4);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAD66, 0x000F, 0x0007);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAD68, 0xF000, 0x8000);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAD68, 0x0F00, 0x0500);
@@ -136,25 +151,25 @@ rtl_hw_phy_config_8125d_1(struct rtl_hw *hw)
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC3A, 0x000F, 0x0006);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8064);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8067);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x806A);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x806D);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8070);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8073);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8076);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8079);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x807C);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x807F);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA438, (BIT_10 | BIT_9 | BIT_8));
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_10 | BIT_9 | BIT_8);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBFA0, 0xFF70, 0x5500);
rtl_mdio_direct_write_phy_ocp(hw, 0xBFA2, 0x9D00);
@@ -183,6 +198,11 @@ rtl_hw_phy_config_8125d_1(struct rtl_hw *hw)
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x1700);
}
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA4E0, BIT_15);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5D4, BIT_5);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA654, BIT_11);
+
rtl_set_eth_phy_ocp_bit(hw, 0xA430, BIT_12 | BIT_0);
rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_7);
}
@@ -191,6 +211,49 @@ static void
rtl_hw_phy_config_8125d_2(struct rtl_hw *hw)
{
rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x4000);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x4000);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC80, 0x001F, 0x0004);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_15 | BIT_14 | BIT_13);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_12 | BIT_11 | BIT_10);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC80, 0x001F, 0x0005);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBC82, 0x00E0, 0x0040);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBC82, BIT_4 | BIT_3 | BIT_2);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBCD8, 0xC000, 0x8000);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBCD8, BIT_15 | BIT_14);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAC7E, 0x01FC, 0x00B4);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8105);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x7A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8117);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x3A00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8103);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x7400);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8115);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x3400);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FEB);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0500);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FEA);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0700);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x80D6);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0xEF00);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5D4, BIT_5);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA654, BIT_11);
+
+ rtl_set_eth_phy_ocp_bit(hw, 0xA430, BIT_12 | BIT_0);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_7);
}
static void
@@ -230,7 +293,7 @@ hw_phy_mcu_config_8125d(struct rtl_hw *hw)
rtl_set_phy_mcu_8125d_1(hw);
break;
case CFG_METHOD_57:
- /* Nothing to do */
+ rtl_set_phy_mcu_8125d_2(hw);
break;
}
}
diff --git a/drivers/net/r8169/base/rtl8125d_mcu.c b/drivers/net/r8169/base/rtl8125d_mcu.c
index 2081eb34e8..8f01b5414e 100644
--- a/drivers/net/r8169/base/rtl8125d_mcu.c
+++ b/drivers/net/r8169/base/rtl8125d_mcu.c
@@ -124,8 +124,8 @@ static const u16 phy_mcu_ram_code_8125d_1_1[] = {
0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
0xa438, 0x1800, 0xa438, 0x8018, 0xa438, 0x1800, 0xa438, 0x8021,
0xa438, 0x1800, 0xa438, 0x8029, 0xa438, 0x1800, 0xa438, 0x8031,
- 0xa438, 0x1800, 0xa438, 0x8035, 0xa438, 0x1800, 0xa438, 0x8035,
- 0xa438, 0x1800, 0xa438, 0x8035, 0xa438, 0xd711, 0xa438, 0x6081,
+ 0xa438, 0x1800, 0xa438, 0x8035, 0xa438, 0x1800, 0xa438, 0x819c,
+ 0xa438, 0x1800, 0xa438, 0x81e9, 0xa438, 0xd711, 0xa438, 0x6081,
0xa438, 0x8904, 0xa438, 0x1800, 0xa438, 0x2021, 0xa438, 0xa904,
0xa438, 0x1800, 0xa438, 0x2021, 0xa438, 0xd75f, 0xa438, 0x4083,
0xa438, 0xd503, 0xa438, 0xa908, 0xa438, 0x87f0, 0xa438, 0x1000,
@@ -134,363 +134,593 @@ static const u16 phy_mcu_ram_code_8125d_1_1[] = {
0xa438, 0x1434, 0xa438, 0x1800, 0xa438, 0x14a5, 0xa438, 0xc504,
0xa438, 0xce20, 0xa438, 0xcf01, 0xa438, 0xd70a, 0xa438, 0x4005,
0xa438, 0xcf02, 0xa438, 0x1800, 0xa438, 0x1c50, 0xa438, 0xa980,
- 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x14f3, 0xa436, 0xA026,
- 0xa438, 0xffff, 0xa436, 0xA024, 0xa438, 0xffff, 0xa436, 0xA022,
- 0xa438, 0xffff, 0xa436, 0xA020, 0xa438, 0x14f2, 0xa436, 0xA006,
+ 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x14f3, 0xa438, 0xd75e,
+ 0xa438, 0x67b1, 0xa438, 0xd504, 0xa438, 0xd71e, 0xa438, 0x65bb,
+ 0xa438, 0x63da, 0xa438, 0x61f9, 0xa438, 0x0cf0, 0xa438, 0x0c10,
+ 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0808, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0x0cf0, 0xa438, 0x0470, 0xa438, 0x0cf0,
+ 0xa438, 0x0430, 0xa438, 0x0cf0, 0xa438, 0x0410, 0xa438, 0xf02a,
+ 0xa438, 0x0cf0, 0xa438, 0x0c20, 0xa438, 0xd505, 0xa438, 0x0c0f,
+ 0xa438, 0x0804, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0x0cf0,
+ 0xa438, 0x0470, 0xa438, 0x0cf0, 0xa438, 0x0430, 0xa438, 0x0cf0,
+ 0xa438, 0x0420, 0xa438, 0xf01c, 0xa438, 0x0cf0, 0xa438, 0x0c40,
+ 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0802, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0x0cf0, 0xa438, 0x0470, 0xa438, 0x0cf0,
+ 0xa438, 0x0450, 0xa438, 0x0cf0, 0xa438, 0x0440, 0xa438, 0xf00e,
+ 0xa438, 0x0cf0, 0xa438, 0x0c80, 0xa438, 0xd505, 0xa438, 0x0c0f,
+ 0xa438, 0x0801, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0x0cf0,
+ 0xa438, 0x04b0, 0xa438, 0x0cf0, 0xa438, 0x0490, 0xa438, 0x0cf0,
+ 0xa438, 0x0480, 0xa438, 0xd501, 0xa438, 0xce00, 0xa438, 0xd500,
+ 0xa438, 0xc48e, 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd718,
+ 0xa438, 0x5faf, 0xa438, 0xd504, 0xa438, 0x8e01, 0xa438, 0x8c0f,
+ 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x17e0, 0xa438, 0xd504,
+ 0xa438, 0xd718, 0xa438, 0x4074, 0xa438, 0x6195, 0xa438, 0xf005,
+ 0xa438, 0x60f5, 0xa438, 0x0c03, 0xa438, 0x0d00, 0xa438, 0xf009,
+ 0xa438, 0x0c03, 0xa438, 0x0d01, 0xa438, 0xf006, 0xa438, 0x0c03,
+ 0xa438, 0x0d02, 0xa438, 0xf003, 0xa438, 0x0c03, 0xa438, 0x0d03,
+ 0xa438, 0xd500, 0xa438, 0xd706, 0xa438, 0x2529, 0xa438, 0x809c,
+ 0xa438, 0xd718, 0xa438, 0x607b, 0xa438, 0x40da, 0xa438, 0xf00f,
+ 0xa438, 0x431a, 0xa438, 0xf021, 0xa438, 0xd718, 0xa438, 0x617b,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0x1000, 0xa438, 0x1ad1,
+ 0xa438, 0xd718, 0xa438, 0x608e, 0xa438, 0xd73e, 0xa438, 0x5f34,
+ 0xa438, 0xf020, 0xa438, 0xf053, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0x1000, 0xa438, 0x1ad1, 0xa438, 0xd718, 0xa438, 0x608e,
+ 0xa438, 0xd73e, 0xa438, 0x5f34, 0xa438, 0xf023, 0xa438, 0xf067,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0x1000, 0xa438, 0x1ad1,
+ 0xa438, 0xd718, 0xa438, 0x608e, 0xa438, 0xd73e, 0xa438, 0x5f34,
+ 0xa438, 0xf026, 0xa438, 0xf07b, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0x1000, 0xa438, 0x1ad1, 0xa438, 0xd718, 0xa438, 0x608e,
+ 0xa438, 0xd73e, 0xa438, 0x5f34, 0xa438, 0xf029, 0xa438, 0xf08f,
+ 0xa438, 0x1000, 0xa438, 0x8173, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0xd73e, 0xa438, 0x7fb4, 0xa438, 0x1000, 0xa438, 0x8188,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd718, 0xa438, 0x5fae,
+ 0xa438, 0xf028, 0xa438, 0x1000, 0xa438, 0x8173, 0xa438, 0x1000,
+ 0xa438, 0x1a41, 0xa438, 0xd73e, 0xa438, 0x7fb4, 0xa438, 0x1000,
+ 0xa438, 0x8188, 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd718,
+ 0xa438, 0x5fae, 0xa438, 0xf039, 0xa438, 0x1000, 0xa438, 0x8173,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd73e, 0xa438, 0x7fb4,
+ 0xa438, 0x1000, 0xa438, 0x8188, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0xd718, 0xa438, 0x5fae, 0xa438, 0xf04a, 0xa438, 0x1000,
+ 0xa438, 0x8173, 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd73e,
+ 0xa438, 0x7fb4, 0xa438, 0x1000, 0xa438, 0x8188, 0xa438, 0x1000,
+ 0xa438, 0x1a41, 0xa438, 0xd718, 0xa438, 0x5fae, 0xa438, 0xf05b,
+ 0xa438, 0xd719, 0xa438, 0x4119, 0xa438, 0xd504, 0xa438, 0xac01,
+ 0xa438, 0xae01, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a2f,
+ 0xa438, 0xf00a, 0xa438, 0xd719, 0xa438, 0x4118, 0xa438, 0xd504,
+ 0xa438, 0xac11, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa410,
+ 0xa438, 0xce00, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0xd718, 0xa438, 0x5fb0, 0xa438, 0xd505, 0xa438, 0xd719,
+ 0xa438, 0x4079, 0xa438, 0xa80f, 0xa438, 0xf05d, 0xa438, 0x4b98,
+ 0xa438, 0xa808, 0xa438, 0xf05a, 0xa438, 0xd719, 0xa438, 0x4119,
+ 0xa438, 0xd504, 0xa438, 0xac02, 0xa438, 0xae01, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a2f, 0xa438, 0xf00a, 0xa438, 0xd719,
+ 0xa438, 0x4118, 0xa438, 0xd504, 0xa438, 0xac22, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0xa420, 0xa438, 0xce00, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd718, 0xa438, 0x5fb0,
+ 0xa438, 0xd505, 0xa438, 0xd719, 0xa438, 0x4079, 0xa438, 0xa80f,
+ 0xa438, 0xf03f, 0xa438, 0x47d8, 0xa438, 0xa804, 0xa438, 0xf03c,
+ 0xa438, 0xd719, 0xa438, 0x4119, 0xa438, 0xd504, 0xa438, 0xac04,
+ 0xa438, 0xae01, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a2f,
+ 0xa438, 0xf00a, 0xa438, 0xd719, 0xa438, 0x4118, 0xa438, 0xd504,
+ 0xa438, 0xac44, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa440,
+ 0xa438, 0xce00, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a41,
+ 0xa438, 0xd718, 0xa438, 0x5fb0, 0xa438, 0xd505, 0xa438, 0xd719,
+ 0xa438, 0x4079, 0xa438, 0xa80f, 0xa438, 0xf021, 0xa438, 0x4418,
+ 0xa438, 0xa802, 0xa438, 0xf01e, 0xa438, 0xd719, 0xa438, 0x4119,
+ 0xa438, 0xd504, 0xa438, 0xac08, 0xa438, 0xae01, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a2f, 0xa438, 0xf00a, 0xa438, 0xd719,
+ 0xa438, 0x4118, 0xa438, 0xd504, 0xa438, 0xac88, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0xa480, 0xa438, 0xce00, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a41, 0xa438, 0xd718, 0xa438, 0x5fb0,
+ 0xa438, 0xd505, 0xa438, 0xd719, 0xa438, 0x4079, 0xa438, 0xa80f,
+ 0xa438, 0xf003, 0xa438, 0x4058, 0xa438, 0xa801, 0xa438, 0x1800,
+ 0xa438, 0x16ed, 0xa438, 0xd73e, 0xa438, 0xd505, 0xa438, 0x3088,
+ 0xa438, 0x817a, 0xa438, 0x6193, 0xa438, 0x6132, 0xa438, 0x60d1,
+ 0xa438, 0x3298, 0xa438, 0x8185, 0xa438, 0xf00a, 0xa438, 0xa808,
+ 0xa438, 0xf008, 0xa438, 0xa804, 0xa438, 0xf006, 0xa438, 0xa802,
+ 0xa438, 0xf004, 0xa438, 0xa801, 0xa438, 0xf002, 0xa438, 0xa80f,
+ 0xa438, 0xd500, 0xa438, 0x0800, 0xa438, 0xd505, 0xa438, 0xd75e,
+ 0xa438, 0x6211, 0xa438, 0xd71e, 0xa438, 0x619b, 0xa438, 0x611a,
+ 0xa438, 0x6099, 0xa438, 0x0c0f, 0xa438, 0x0808, 0xa438, 0xf009,
+ 0xa438, 0x0c0f, 0xa438, 0x0804, 0xa438, 0xf006, 0xa438, 0x0c0f,
+ 0xa438, 0x0802, 0xa438, 0xf003, 0xa438, 0x0c0f, 0xa438, 0x0801,
+ 0xa438, 0xd500, 0xa438, 0x0800, 0xa438, 0xd500, 0xa438, 0xc48d,
+ 0xa438, 0xd504, 0xa438, 0x8d03, 0xa438, 0xd701, 0xa438, 0x4045,
+ 0xa438, 0xad02, 0xa438, 0xd504, 0xa438, 0xd706, 0xa438, 0x2529,
+ 0xa438, 0x81ad, 0xa438, 0xd718, 0xa438, 0x607b, 0xa438, 0x40da,
+ 0xa438, 0xf013, 0xa438, 0x441a, 0xa438, 0xf02d, 0xa438, 0xd718,
+ 0xa438, 0x61fb, 0xa438, 0xbb01, 0xa438, 0xd75e, 0xa438, 0x6171,
+ 0xa438, 0x0cf0, 0xa438, 0x0c10, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0x0cf0, 0xa438, 0x0410, 0xa438, 0xce00, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0808, 0xa438, 0xf02a, 0xa438, 0xbb02,
+ 0xa438, 0xd75e, 0xa438, 0x6171, 0xa438, 0x0cf0, 0xa438, 0x0c20,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0x0cf0, 0xa438, 0x0420,
+ 0xa438, 0xce00, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0804,
+ 0xa438, 0xf01c, 0xa438, 0xbb04, 0xa438, 0xd75e, 0xa438, 0x6171,
+ 0xa438, 0x0cf0, 0xa438, 0x0c40, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0x0cf0, 0xa438, 0x0440, 0xa438, 0xce00, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0802, 0xa438, 0xf00e, 0xa438, 0xbb08,
+ 0xa438, 0xd75e, 0xa438, 0x6171, 0xa438, 0x0cf0, 0xa438, 0x0c80,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0x0cf0, 0xa438, 0x0480,
+ 0xa438, 0xce00, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0801,
+ 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x1616, 0xa436, 0xA026,
+ 0xa438, 0xffff, 0xa436, 0xA024, 0xa438, 0x15d8, 0xa436, 0xA022,
+ 0xa438, 0x161f, 0xa436, 0xA020, 0xa438, 0x14f2, 0xa436, 0xA006,
0xa438, 0x1c4f, 0xa436, 0xA004, 0xa438, 0x1433, 0xa436, 0xA002,
0xa438, 0x13c1, 0xa436, 0xA000, 0xa438, 0x2020, 0xa436, 0xA008,
- 0xa438, 0x1f00, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x7f00, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
0xa438, 0x07f8, 0xa436, 0xA014, 0xa438, 0xd04d, 0xa438, 0x8904,
- 0xa438, 0x813C, 0xa438, 0xA13D, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x813C, 0xa438, 0xA13D, 0xa438, 0xcc01, 0xa438, 0x0000,
0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA152, 0xa438, 0x1384,
0xa436, 0xA154, 0xa438, 0x1fa8, 0xa436, 0xA156, 0xa438, 0x218B,
- 0xa436, 0xA158, 0xa438, 0x21B8, 0xa436, 0xA15A, 0xa438, 0x3fff,
+ 0xa436, 0xA158, 0xa438, 0x21B8, 0xa436, 0xA15A, 0xa438, 0x021c,
0xa436, 0xA15C, 0xa438, 0x3fff, 0xa436, 0xA15E, 0xa438, 0x3fff,
- 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150, 0xa438, 0x000f,
- 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x1ff8,
- 0xa436, 0xA014, 0xa438, 0x001c, 0xa438, 0xce15, 0xa438, 0xd105,
- 0xa438, 0xa410, 0xa438, 0x8320, 0xa438, 0xFFD7, 0xa438, 0x0000,
- 0xa438, 0x0000, 0xa436, 0xA164, 0xa438, 0x0260, 0xa436, 0xA166,
- 0xa438, 0x0add, 0xa436, 0xA168, 0xa438, 0x05CC, 0xa436, 0xA16A,
- 0xa438, 0x05C5, 0xa436, 0xA16C, 0xa438, 0x0429, 0xa436, 0xA16E,
- 0xa438, 0x07B6, 0xa436, 0xA170, 0xa438, 0x0259, 0xa436, 0xA172,
- 0xa438, 0x3fff, 0xa436, 0xA162, 0xa438, 0x003f, 0xa436, 0xA016,
- 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014,
- 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x8023,
- 0xa438, 0x1800, 0xa438, 0x80e6, 0xa438, 0x1800, 0xa438, 0x80f0,
- 0xa438, 0x1800, 0xa438, 0x80f8, 0xa438, 0x1800, 0xa438, 0x816c,
- 0xa438, 0x1800, 0xa438, 0x817d, 0xa438, 0x1800, 0xa438, 0x818b,
- 0xa438, 0xa801, 0xa438, 0x9308, 0xa438, 0xb201, 0xa438, 0xb301,
+ 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150, 0xa438, 0x001f,
+ 0xa436, 0xA016, 0xa438, 0x0010, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x8013, 0xa438, 0x1800, 0xa438, 0x803a, 0xa438, 0x1800,
+ 0xa438, 0x8045, 0xa438, 0x1800, 0xa438, 0x8049, 0xa438, 0x1800,
+ 0xa438, 0x804d, 0xa438, 0x1800, 0xa438, 0x8059, 0xa438, 0x1800,
+ 0xa438, 0x805d, 0xa438, 0xc2ff, 0xa438, 0x1800, 0xa438, 0x0042,
+ 0xa438, 0x1000, 0xa438, 0x02e5, 0xa438, 0x1000, 0xa438, 0x02b4,
+ 0xa438, 0xd701, 0xa438, 0x40e3, 0xa438, 0xd700, 0xa438, 0x5f6c,
+ 0xa438, 0x1000, 0xa438, 0x8021, 0xa438, 0x1800, 0xa438, 0x0073,
+ 0xa438, 0x1800, 0xa438, 0x0084, 0xa438, 0xd701, 0xa438, 0x4061,
+ 0xa438, 0xba0f, 0xa438, 0xf004, 0xa438, 0x4060, 0xa438, 0x1000,
+ 0xa438, 0x802a, 0xa438, 0xba10, 0xa438, 0x0800, 0xa438, 0xd700,
+ 0xa438, 0x60bb, 0xa438, 0x611c, 0xa438, 0x0c0f, 0xa438, 0x1a01,
+ 0xa438, 0xf00a, 0xa438, 0x60fc, 0xa438, 0x0c0f, 0xa438, 0x1a02,
+ 0xa438, 0xf006, 0xa438, 0x0c0f, 0xa438, 0x1a04, 0xa438, 0xf003,
+ 0xa438, 0x0c0f, 0xa438, 0x1a08, 0xa438, 0x0800, 0xa438, 0x0c0f,
+ 0xa438, 0x0504, 0xa438, 0xad02, 0xa438, 0x1000, 0xa438, 0x02c0,
+ 0xa438, 0xd700, 0xa438, 0x5fac, 0xa438, 0x1000, 0xa438, 0x8021,
+ 0xa438, 0x1800, 0xa438, 0x0139, 0xa438, 0x9a1f, 0xa438, 0x8bf0,
+ 0xa438, 0x1800, 0xa438, 0x02df, 0xa438, 0x9a1f, 0xa438, 0x9910,
+ 0xa438, 0x1800, 0xa438, 0x02d7, 0xa438, 0xad02, 0xa438, 0x8d01,
+ 0xa438, 0x9a1f, 0xa438, 0x9910, 0xa438, 0x9860, 0xa438, 0xcb00,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0x85f0, 0xa438, 0xd500,
+ 0xa438, 0x1800, 0xa438, 0x015c, 0xa438, 0x8580, 0xa438, 0x8d02,
+ 0xa438, 0x1800, 0xa438, 0x018f, 0xa438, 0x0c0f, 0xa438, 0x0503,
+ 0xa438, 0xad02, 0xa438, 0x1800, 0xa438, 0x00dd, 0xa436, 0xA08E,
+ 0xa438, 0x00db, 0xa436, 0xA08C, 0xa438, 0x018e, 0xa436, 0xA08A,
+ 0xa438, 0x015a, 0xa436, 0xA088, 0xa438, 0x02d6, 0xa436, 0xA086,
+ 0xa438, 0x02de, 0xa436, 0xA084, 0xa438, 0x0137, 0xa436, 0xA082,
+ 0xa438, 0x0071, 0xa436, 0xA080, 0xa438, 0x0041, 0xa436, 0xA090,
+ 0xa438, 0x00ff, 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012,
+ 0xa438, 0x1ff8, 0xa436, 0xA014, 0xa438, 0x001c, 0xa438, 0xce15,
+ 0xa438, 0xd105, 0xa438, 0xa410, 0xa438, 0x8320, 0xa438, 0xFFD7,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA164, 0xa438, 0x0260,
+ 0xa436, 0xA166, 0xa438, 0x0add, 0xa436, 0xA168, 0xa438, 0x05CC,
+ 0xa436, 0xA16A, 0xa438, 0x05C5, 0xa436, 0xA16C, 0xa438, 0x0429,
+ 0xa436, 0xA16E, 0xa438, 0x07B6, 0xa436, 0xA170, 0xa438, 0x0259,
+ 0xa436, 0xA172, 0xa438, 0x3fff, 0xa436, 0xA162, 0xa438, 0x003f,
+ 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x8023, 0xa438, 0x1800, 0xa438, 0x814c, 0xa438, 0x1800,
+ 0xa438, 0x8156, 0xa438, 0x1800, 0xa438, 0x815e, 0xa438, 0x1800,
+ 0xa438, 0x8210, 0xa438, 0x1800, 0xa438, 0x8221, 0xa438, 0x1800,
+ 0xa438, 0x822f, 0xa438, 0xa801, 0xa438, 0x9308, 0xa438, 0xb201,
+ 0xa438, 0xb301, 0xa438, 0xd701, 0xa438, 0x4000, 0xa438, 0xd2ff,
+ 0xa438, 0xb302, 0xa438, 0xd200, 0xa438, 0xb201, 0xa438, 0xb309,
0xa438, 0xd701, 0xa438, 0x4000, 0xa438, 0xd2ff, 0xa438, 0xb302,
- 0xa438, 0xd200, 0xa438, 0xb201, 0xa438, 0xb309, 0xa438, 0xd701,
- 0xa438, 0x4000, 0xa438, 0xd2ff, 0xa438, 0xb302, 0xa438, 0xd200,
- 0xa438, 0xa800, 0xa438, 0x1800, 0xa438, 0x0031, 0xa438, 0xd700,
- 0xa438, 0x4543, 0xa438, 0xd71f, 0xa438, 0x40fe, 0xa438, 0xd1b7,
- 0xa438, 0xd049, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd700,
- 0xa438, 0x5fbb, 0xa438, 0xa220, 0xa438, 0x8501, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0x0c70, 0xa438, 0x0b00, 0xa438, 0x0c07,
- 0xa438, 0x0604, 0xa438, 0x9503, 0xa438, 0xa510, 0xa438, 0xce49,
- 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x8520, 0xa438, 0xa520,
- 0xa438, 0xa501, 0xa438, 0xd105, 0xa438, 0xd047, 0xa438, 0x1000,
- 0xa438, 0x109e, 0xa438, 0xd707, 0xa438, 0x6087, 0xa438, 0xd700,
- 0xa438, 0x5f7b, 0xa438, 0xffe9, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0x8501, 0xa438, 0xd707, 0xa438, 0x5e08, 0xa438, 0x8530,
- 0xa438, 0xba20, 0xa438, 0xf00c, 0xa438, 0xd700, 0xa438, 0x4098,
- 0xa438, 0xd1ef, 0xa438, 0xd047, 0xa438, 0xf003, 0xa438, 0xd1db,
- 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd700,
- 0xa438, 0x5fbb, 0xa438, 0x8980, 0xa438, 0xd704, 0xa438, 0x40a3,
- 0xa438, 0xd702, 0xa438, 0x4060, 0xa438, 0x8410, 0xa438, 0xf002,
- 0xa438, 0xa410, 0xa438, 0xce02, 0xa438, 0x1000, 0xa438, 0x10be,
- 0xa438, 0xcd81, 0xa438, 0xd412, 0xa438, 0x1000, 0xa438, 0x1069,
- 0xa438, 0xcd82, 0xa438, 0xd40e, 0xa438, 0x1000, 0xa438, 0x1069,
- 0xa438, 0xcd83, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd71f,
- 0xa438, 0x5fb4, 0xa438, 0xa00a, 0xa438, 0xa340, 0xa438, 0x0c06,
- 0xa438, 0x0102, 0xa438, 0xa240, 0xa438, 0xa290, 0xa438, 0xa324,
- 0xa438, 0xab02, 0xa438, 0xd13e, 0xa438, 0xd05a, 0xa438, 0xd13e,
- 0xa438, 0xd06b, 0xa438, 0xcd84, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0xd706, 0xa438, 0x6079, 0xa438, 0xd700, 0xa438, 0x5f5c,
- 0xa438, 0xcd8a, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706,
- 0xa438, 0x6079, 0xa438, 0xd700, 0xa438, 0x5f5d, 0xa438, 0xcd8b,
- 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xcd8c, 0xa438, 0xd700,
- 0xa438, 0x6050, 0xa438, 0xab04, 0xa438, 0xd700, 0xa438, 0x4083,
- 0xa438, 0xd160, 0xa438, 0xd04b, 0xa438, 0xf003, 0xa438, 0xd193,
- 0xa438, 0xd047, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd700,
- 0xa438, 0x5fbb, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x8410,
- 0xa438, 0xd71f, 0xa438, 0x5f94, 0xa438, 0xb920, 0xa438, 0x1000,
- 0xa438, 0x109e, 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920,
- 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd71f, 0xa438, 0x6105,
- 0xa438, 0x6054, 0xa438, 0xfffb, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0xd706, 0xa438, 0x5fb9, 0xa438, 0xfff0, 0xa438, 0xa410,
- 0xa438, 0xb820, 0xa438, 0xcd85, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xbb20,
- 0xa438, 0xd105, 0xa438, 0xd042, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0xd706, 0xa438, 0x5fbb, 0xa438, 0x5f85, 0xa438, 0xd700,
- 0xa438, 0x5f5b, 0xa438, 0xd700, 0xa438, 0x6090, 0xa438, 0xd700,
- 0xa438, 0x4043, 0xa438, 0xaa20, 0xa438, 0xcd86, 0xa438, 0xd700,
- 0xa438, 0x6083, 0xa438, 0xd1c7, 0xa438, 0xd045, 0xa438, 0xf003,
- 0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0xd700, 0xa438, 0x5fbb, 0xa438, 0x0c18, 0xa438, 0x0108,
- 0xa438, 0x0c3f, 0xa438, 0x0609, 0xa438, 0x0cfb, 0xa438, 0x0729,
- 0xa438, 0xa308, 0xa438, 0x8320, 0xa438, 0xd105, 0xa438, 0xd042,
+ 0xa438, 0xd200, 0xa438, 0xa800, 0xa438, 0x1800, 0xa438, 0x0031,
+ 0xa438, 0xd700, 0xa438, 0x4543, 0xa438, 0xd71f, 0xa438, 0x40fe,
+ 0xa438, 0xd1b7, 0xa438, 0xd049, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd700, 0xa438, 0x5fbb, 0xa438, 0xa220, 0xa438, 0x8501,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c70, 0xa438, 0x0b00,
+ 0xa438, 0x0c07, 0xa438, 0x0604, 0xa438, 0x9503, 0xa438, 0xa510,
+ 0xa438, 0xce49, 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x8520,
+ 0xa438, 0xa520, 0xa438, 0xa501, 0xa438, 0xd105, 0xa438, 0xd047,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd707, 0xa438, 0x6087,
+ 0xa438, 0xd700, 0xa438, 0x5f7b, 0xa438, 0xffe9, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0x8501, 0xa438, 0xd707, 0xa438, 0x5e08,
+ 0xa438, 0x8530, 0xa438, 0xba20, 0xa438, 0xf00c, 0xa438, 0xd700,
+ 0xa438, 0x4098, 0xa438, 0xd1ef, 0xa438, 0xd047, 0xa438, 0xf003,
+ 0xa438, 0xd1db, 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd700, 0xa438, 0x5fbb, 0xa438, 0x8980, 0xa438, 0xd702,
+ 0xa438, 0x6126, 0xa438, 0xd704, 0xa438, 0x4063, 0xa438, 0xd702,
+ 0xa438, 0x6060, 0xa438, 0xd702, 0xa438, 0x6077, 0xa438, 0x8410,
+ 0xa438, 0xf002, 0xa438, 0xa410, 0xa438, 0xce02, 0xa438, 0x1000,
+ 0xa438, 0x10be, 0xa438, 0xcd81, 0xa438, 0xd412, 0xa438, 0x1000,
+ 0xa438, 0x1069, 0xa438, 0xcd82, 0xa438, 0xd40e, 0xa438, 0x1000,
+ 0xa438, 0x1069, 0xa438, 0xcd83, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd71f, 0xa438, 0x5fb4, 0xa438, 0xd702, 0xa438, 0x6c26,
+ 0xa438, 0xd704, 0xa438, 0x4063, 0xa438, 0xd702, 0xa438, 0x6060,
+ 0xa438, 0xd702, 0xa438, 0x6b77, 0xa438, 0xa340, 0xa438, 0x0c06,
+ 0xa438, 0x0102, 0xa438, 0xce01, 0xa438, 0x1000, 0xa438, 0x10be,
+ 0xa438, 0xa240, 0xa438, 0xa902, 0xa438, 0xa204, 0xa438, 0xa280,
+ 0xa438, 0xa364, 0xa438, 0xab02, 0xa438, 0x8380, 0xa438, 0xa00a,
+ 0xa438, 0xcd8d, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706,
+ 0xa438, 0x5fb5, 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0xd71f, 0xa438, 0x6065, 0xa438, 0x7c74,
+ 0xa438, 0xfffb, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xa410,
+ 0xa438, 0x8902, 0xa438, 0xa120, 0xa438, 0xa380, 0xa438, 0xce02,
+ 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x8280, 0xa438, 0xa324,
+ 0xa438, 0xab02, 0xa438, 0xa00a, 0xa438, 0x8118, 0xa438, 0x863f,
+ 0xa438, 0x87fb, 0xa438, 0xcd8e, 0xa438, 0xd193, 0xa438, 0xd047,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x10a3,
+ 0xa438, 0xd700, 0xa438, 0x5f7b, 0xa438, 0xa280, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x10a3, 0xa438, 0xd706,
+ 0xa438, 0x5f78, 0xa438, 0xa210, 0xa438, 0xd700, 0xa438, 0x6083,
+ 0xa438, 0xd101, 0xa438, 0xd047, 0xa438, 0xf003, 0xa438, 0xd160,
+ 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x1000,
+ 0xa438, 0x10a3, 0xa438, 0xd700, 0xa438, 0x5f7b, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x10a3, 0xa438, 0xd706,
+ 0xa438, 0x5f79, 0xa438, 0x8120, 0xa438, 0xbb20, 0xa438, 0xf04c,
+ 0xa438, 0xa00a, 0xa438, 0xa340, 0xa438, 0x0c06, 0xa438, 0x0102,
+ 0xa438, 0xa240, 0xa438, 0xa290, 0xa438, 0xa324, 0xa438, 0xab02,
+ 0xa438, 0xd13e, 0xa438, 0xd05a, 0xa438, 0xd13e, 0xa438, 0xd06b,
+ 0xa438, 0xcd84, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706,
+ 0xa438, 0x6079, 0xa438, 0xd700, 0xa438, 0x5f5c, 0xa438, 0xcd8a,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706, 0xa438, 0x6079,
+ 0xa438, 0xd700, 0xa438, 0x5f5d, 0xa438, 0xcd8b, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0xcd8c, 0xa438, 0xd700, 0xa438, 0x6050,
+ 0xa438, 0xab04, 0xa438, 0xd700, 0xa438, 0x4083, 0xa438, 0xd160,
+ 0xa438, 0xd04b, 0xa438, 0xf003, 0xa438, 0xd193, 0xa438, 0xd047,
0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd700, 0xa438, 0x5fbb,
- 0xa438, 0x1800, 0xa438, 0x08f7, 0xa438, 0x1000, 0xa438, 0x109e,
- 0xa438, 0x1000, 0xa438, 0x10a3, 0xa438, 0xd700, 0xa438, 0x607b,
- 0xa438, 0xd700, 0xa438, 0x5f2b, 0xa438, 0x1800, 0xa438, 0x0a81,
- 0xa438, 0xd700, 0xa438, 0x40bd, 0xa438, 0xd707, 0xa438, 0x4065,
- 0xa438, 0x1800, 0xa438, 0x1121, 0xa438, 0x1800, 0xa438, 0x1124,
- 0xa438, 0xd705, 0xa438, 0x627d, 0xa438, 0xd704, 0xa438, 0x6192,
- 0xa438, 0xa00a, 0xa438, 0xd704, 0xa438, 0x41c7, 0xa438, 0xd700,
- 0xa438, 0x3691, 0xa438, 0x810c, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa570, 0xa438, 0x9503, 0xa438, 0xf006, 0xa438, 0x800a,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x8410, 0xa438, 0xd71f,
+ 0xa438, 0x5f94, 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x109e,
+ 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0xd71f, 0xa438, 0x6105, 0xa438, 0x6054,
+ 0xa438, 0xfffb, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706,
+ 0xa438, 0x5fb9, 0xa438, 0xfff0, 0xa438, 0xa410, 0xa438, 0xb820,
+ 0xa438, 0xcd85, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd71f,
+ 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xbb20, 0xa438, 0xd105,
+ 0xa438, 0xd042, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd706,
+ 0xa438, 0x5fbb, 0xa438, 0x5f85, 0xa438, 0xd700, 0xa438, 0x5f5b,
+ 0xa438, 0xd700, 0xa438, 0x6090, 0xa438, 0xd700, 0xa438, 0x4043,
+ 0xa438, 0xaa20, 0xa438, 0xcd86, 0xa438, 0xd700, 0xa438, 0x6083,
+ 0xa438, 0xd1c7, 0xa438, 0xd045, 0xa438, 0xf003, 0xa438, 0xd17a,
+ 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd700,
+ 0xa438, 0x5fbb, 0xa438, 0x0c18, 0xa438, 0x0108, 0xa438, 0x0c3f,
+ 0xa438, 0x0609, 0xa438, 0x0cfb, 0xa438, 0x0729, 0xa438, 0xa308,
+ 0xa438, 0x8320, 0xa438, 0xd105, 0xa438, 0xd042, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0xd700, 0xa438, 0x5fbb, 0xa438, 0x1800,
+ 0xa438, 0x08f7, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x1000,
+ 0xa438, 0x10a3, 0xa438, 0xd700, 0xa438, 0x607b, 0xa438, 0xd700,
+ 0xa438, 0x5f2b, 0xa438, 0x1800, 0xa438, 0x0a81, 0xa438, 0xd700,
+ 0xa438, 0x40bd, 0xa438, 0xd707, 0xa438, 0x4065, 0xa438, 0x1800,
+ 0xa438, 0x1121, 0xa438, 0x1800, 0xa438, 0x1124, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8f80, 0xa438, 0x9503, 0xa438, 0xd705,
+ 0xa438, 0x641d, 0xa438, 0xd704, 0xa438, 0x62b2, 0xa438, 0xd702,
+ 0xa438, 0x4116, 0xa438, 0xce15, 0xa438, 0x1000, 0xa438, 0x10be,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f40, 0xa438, 0x9503,
+ 0xa438, 0xa00a, 0xa438, 0xd704, 0xa438, 0x4247, 0xa438, 0xd700,
+ 0xa438, 0x3691, 0xa438, 0x8183, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xa570, 0xa438, 0x9503, 0xa438, 0xf00a, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xaf40, 0xa438, 0x9503, 0xa438, 0x800a,
0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8570, 0xa438, 0x9503,
0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x1108,
- 0xa438, 0xcd64, 0xa438, 0xd704, 0xa438, 0x3398, 0xa438, 0x8166,
+ 0xa438, 0xcd64, 0xa438, 0xd704, 0xa438, 0x3398, 0xa438, 0x8203,
0xa438, 0xd71f, 0xa438, 0x620e, 0xa438, 0xd704, 0xa438, 0x6096,
0xa438, 0xd705, 0xa438, 0x6051, 0xa438, 0xf004, 0xa438, 0xd705,
0xa438, 0x605d, 0xa438, 0xf008, 0xa438, 0xd706, 0xa438, 0x609d,
0xa438, 0xd705, 0xa438, 0x405f, 0xa438, 0xf003, 0xa438, 0xd700,
- 0xa438, 0x5a9b, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc7aa,
- 0xa438, 0x9503, 0xa438, 0xd71f, 0xa438, 0x674e, 0xa438, 0xd704,
+ 0xa438, 0x58fb, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc7aa,
+ 0xa438, 0x9503, 0xa438, 0xd71f, 0xa438, 0x6d2e, 0xa438, 0xd704,
0xa438, 0x6096, 0xa438, 0xd705, 0xa438, 0x6051, 0xa438, 0xf005,
0xa438, 0xd705, 0xa438, 0x607d, 0xa438, 0x1800, 0xa438, 0x0cc7,
0xa438, 0xd706, 0xa438, 0x60bd, 0xa438, 0xd705, 0xa438, 0x407f,
- 0xa438, 0x1800, 0xa438, 0x0e42, 0xa438, 0xce04, 0xa438, 0x1000,
- 0xa438, 0x10be, 0xa438, 0xd702, 0xa438, 0x40a4, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0x8e20, 0xa438, 0x9503, 0xa438, 0xd702,
- 0xa438, 0x40a5, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8e40,
- 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x11a4, 0xa438, 0x1000,
+ 0xa438, 0x1800, 0xa438, 0x0e42, 0xa438, 0xd702, 0xa438, 0x40a4,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8e20, 0xa438, 0x9503,
+ 0xa438, 0xd702, 0xa438, 0x40a5, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8e40, 0xa438, 0x9503, 0xa438, 0xd705, 0xa438, 0x659d,
+ 0xa438, 0xd704, 0xa438, 0x62b2, 0xa438, 0xd702, 0xa438, 0x4116,
+ 0xa438, 0xce15, 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8f40, 0xa438, 0x9503, 0xa438, 0xa00a,
+ 0xa438, 0xd704, 0xa438, 0x4247, 0xa438, 0xd700, 0xa438, 0x3691,
+ 0xa438, 0x81de, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa570,
+ 0xa438, 0x9503, 0xa438, 0xf00a, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xaf40, 0xa438, 0x9503, 0xa438, 0x800a, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8570, 0xa438, 0x9503, 0xa438, 0xd706,
+ 0xa438, 0x60e4, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0cf0,
+ 0xa438, 0x07a0, 0xa438, 0x9503, 0xa438, 0xf005, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x87f0, 0xa438, 0x9503, 0xa438, 0x1000,
0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x1108, 0xa438, 0xcd61,
- 0xa438, 0xd704, 0xa438, 0x3398, 0xa438, 0x8166, 0xa438, 0xd704,
+ 0xa438, 0xd704, 0xa438, 0x3398, 0xa438, 0x8203, 0xa438, 0xd704,
0xa438, 0x6096, 0xa438, 0xd705, 0xa438, 0x6051, 0xa438, 0xf005,
0xa438, 0xd705, 0xa438, 0x607d, 0xa438, 0x1800, 0xa438, 0x0cc7,
- 0xa438, 0xd71f, 0xa438, 0x60ee, 0xa438, 0xd706, 0xa438, 0x7bdd,
- 0xa438, 0xd705, 0xa438, 0x5b9f, 0xa438, 0x1800, 0xa438, 0x0e42,
- 0xa438, 0x1800, 0xa438, 0x0b5f, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xd71f, 0xa438, 0x61ce, 0xa438, 0xd706, 0xa438, 0x767d,
+ 0xa438, 0xd705, 0xa438, 0x563f, 0xa438, 0x1800, 0xa438, 0x0e42,
+ 0xa438, 0x800a, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xae40,
+ 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0c47, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xaf80, 0xa438, 0x9503, 0xa438, 0x1800,
+ 0xa438, 0x0b5f, 0xa438, 0x607c, 0xa438, 0x1800, 0xa438, 0x027a,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xae01, 0xa438, 0x9503,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd702, 0xa438, 0x5fa3,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8e01, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x027d, 0xa438, 0x1000, 0xa438, 0x10be,
+ 0xa438, 0xd702, 0xa438, 0x40a5, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8e40, 0xa438, 0x9503, 0xa438, 0xd73e, 0xa438, 0x6065,
+ 0xa438, 0x1800, 0xa438, 0x0cea, 0xa438, 0x1800, 0xa438, 0x0cf4,
+ 0xa438, 0xd701, 0xa438, 0x6fd1, 0xa438, 0xd71f, 0xa438, 0x6eee,
+ 0xa438, 0xd707, 0xa438, 0x4d0f, 0xa438, 0xd73e, 0xa438, 0x4cc5,
+ 0xa438, 0xd705, 0xa438, 0x4c99, 0xa438, 0xd704, 0xa438, 0x6c57,
+ 0xa438, 0xd702, 0xa438, 0x6c11, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8c20, 0xa438, 0xa608, 0xa438, 0x9503, 0xa438, 0xa201,
+ 0xa438, 0xa804, 0xa438, 0xd704, 0xa438, 0x40a7, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa620, 0xa438, 0x9503, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xac40, 0xa438, 0x9503, 0xa438, 0x800a,
+ 0xa438, 0x8290, 0xa438, 0x8306, 0xa438, 0x8b02, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8570, 0xa438, 0x9503, 0xa438, 0xce00,
+ 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0xcd99, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0x1000, 0xa438, 0x10cc, 0xa438, 0xd701,
+ 0xa438, 0x69f1, 0xa438, 0xd71f, 0xa438, 0x690e, 0xa438, 0xd73e,
+ 0xa438, 0x5ee6, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x87f0,
+ 0xa438, 0x9503, 0xa438, 0xce46, 0xa438, 0x1000, 0xa438, 0x10be,
+ 0xa438, 0xa00a, 0xa438, 0xd704, 0xa438, 0x40a7, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa570, 0xa438, 0x9503, 0xa438, 0xcd9a,
+ 0xa438, 0xd700, 0xa438, 0x6078, 0xa438, 0xd700, 0xa438, 0x609a,
+ 0xa438, 0xd109, 0xa438, 0xd074, 0xa438, 0xf003, 0xa438, 0xd109,
+ 0xa438, 0xd075, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0x1000,
+ 0xa438, 0x10cc, 0xa438, 0xd701, 0xa438, 0x65b1, 0xa438, 0xd71f,
+ 0xa438, 0x64ce, 0xa438, 0xd700, 0xa438, 0x5efe, 0xa438, 0xce00,
+ 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8608, 0xa438, 0x8c40, 0xa438, 0x9503, 0xa438, 0x8201,
+ 0xa438, 0x800a, 0xa438, 0x8290, 0xa438, 0x8306, 0xa438, 0x8b02,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc7aa, 0xa438, 0x8570,
+ 0xa438, 0x8d08, 0xa438, 0x9503, 0xa438, 0xcd9b, 0xa438, 0x1800,
+ 0xa438, 0x0c8b, 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd705,
+ 0xa438, 0x61d9, 0xa438, 0xd704, 0xa438, 0x4193, 0xa438, 0x800a,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xae40, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x0c47, 0xa438, 0x1800, 0xa438, 0x0df8,
+ 0xa438, 0x1800, 0xa438, 0x8339, 0xa438, 0x0800, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8d08, 0xa438, 0x8f02, 0xa438, 0x8c40,
+ 0xa438, 0x9503, 0xa438, 0x8201, 0xa438, 0xa804, 0xa438, 0xd704,
+ 0xa438, 0x40a7, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa620,
+ 0xa438, 0x9503, 0xa438, 0x800a, 0xa438, 0x8290, 0xa438, 0x8306,
+ 0xa438, 0x8b02, 0xa438, 0x8010, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8570, 0xa438, 0x9503, 0xa438, 0xaa03, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xac20, 0xa438, 0xa608, 0xa438, 0x9503,
+ 0xa438, 0xce00, 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0xcd95,
+ 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd701, 0xa438, 0x7b91,
+ 0xa438, 0xd71f, 0xa438, 0x7aae, 0xa438, 0xd701, 0xa438, 0x7ab0,
+ 0xa438, 0xd704, 0xa438, 0x7ef3, 0xa438, 0xd701, 0xa438, 0x5eb3,
+ 0xa438, 0x84b0, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa608,
+ 0xa438, 0xc700, 0xa438, 0x9503, 0xa438, 0xce54, 0xa438, 0x1000,
+ 0xa438, 0x10be, 0xa438, 0xa290, 0xa438, 0xa304, 0xa438, 0xab02,
+ 0xa438, 0xd700, 0xa438, 0x6050, 0xa438, 0xab04, 0xa438, 0x0c38,
+ 0xa438, 0x0608, 0xa438, 0xaa0b, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8d01, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xae40,
+ 0xa438, 0x9503, 0xa438, 0xd702, 0xa438, 0x40a4, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8e20, 0xa438, 0x9503, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8c20, 0xa438, 0x9503, 0xa438, 0xd700,
+ 0xa438, 0x6078, 0xa438, 0xd700, 0xa438, 0x609a, 0xa438, 0xd109,
+ 0xa438, 0xd074, 0xa438, 0xf003, 0xa438, 0xd109, 0xa438, 0xd075,
+ 0xa438, 0xd704, 0xa438, 0x62b2, 0xa438, 0xd702, 0xa438, 0x4116,
+ 0xa438, 0xce54, 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8f40, 0xa438, 0x9503, 0xa438, 0xa00a,
+ 0xa438, 0xd704, 0xa438, 0x4247, 0xa438, 0xd700, 0xa438, 0x3691,
+ 0xa438, 0x8326, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa570,
+ 0xa438, 0x9503, 0xa438, 0xf00a, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xaf40, 0xa438, 0x9503, 0xa438, 0x800a, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8570, 0xa438, 0x9503, 0xa438, 0x1000,
+ 0xa438, 0x109e, 0xa438, 0xd704, 0xa438, 0x60f3, 0xa438, 0xd71f,
+ 0xa438, 0x618e, 0xa438, 0xd700, 0xa438, 0x5b5e, 0xa438, 0x1800,
+ 0xa438, 0x0deb, 0xa438, 0x800a, 0xa438, 0x0c03, 0xa438, 0x1502,
0xa438, 0xae40, 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0c47,
- 0xa438, 0x607c, 0xa438, 0x1800, 0xa438, 0x027a, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0xae01, 0xa438, 0x9503, 0xa438, 0x1000,
- 0xa438, 0x109e, 0xa438, 0xd702, 0xa438, 0x5fa3, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0x8e01, 0xa438, 0x9503, 0xa438, 0x1800,
- 0xa438, 0x027d, 0xa438, 0x1000, 0xa438, 0x10be, 0xa438, 0xd702,
- 0xa438, 0x40a5, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8e40,
- 0xa438, 0x9503, 0xa438, 0xd73e, 0xa438, 0x6065, 0xa438, 0x1800,
- 0xa438, 0x0cea, 0xa438, 0x1800, 0xa438, 0x0cf4, 0xa438, 0xa290,
- 0xa438, 0xa304, 0xa438, 0xab02, 0xa438, 0xd700, 0xa438, 0x6050,
- 0xa438, 0xab04, 0xa438, 0x0c38, 0xa438, 0x0608, 0xa438, 0xaa0b,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8d01, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0xae40, 0xa438, 0x9503, 0xa438, 0xd702,
- 0xa438, 0x40a4, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8e20,
- 0xa438, 0x9503, 0xa438, 0xd700, 0xa438, 0x6078, 0xa438, 0xd700,
- 0xa438, 0x609a, 0xa438, 0xd109, 0xa438, 0xd074, 0xa438, 0xf003,
- 0xa438, 0xd109, 0xa438, 0xd075, 0xa438, 0xd704, 0xa438, 0x6192,
- 0xa438, 0xa00a, 0xa438, 0xd704, 0xa438, 0x41c7, 0xa438, 0xd700,
- 0xa438, 0x3691, 0xa438, 0x81bc, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa570, 0xa438, 0x9503, 0xa438, 0xf006, 0xa438, 0x800a,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8570, 0xa438, 0x9503,
- 0xa438, 0x1000, 0xa438, 0x109e, 0xa438, 0xd704, 0xa438, 0x60f3,
- 0xa438, 0xd71f, 0xa438, 0x60ee, 0xa438, 0xd700, 0xa438, 0x5cfe,
- 0xa438, 0x1800, 0xa438, 0x0deb, 0xa438, 0x1800, 0xa438, 0x0c47,
- 0xa438, 0x1800, 0xa438, 0x0df8, 0xa436, 0xA10E, 0xa438, 0x0dc5,
- 0xa436, 0xA10C, 0xa438, 0x0ce8, 0xa436, 0xA10A, 0xa438, 0x0279,
- 0xa436, 0xA108, 0xa438, 0x0b19, 0xa436, 0xA106, 0xa438, 0x111f,
- 0xa436, 0xA104, 0xa438, 0x0a7b, 0xa436, 0xA102, 0xa438, 0x0ba3,
- 0xa436, 0xA100, 0xa438, 0x0022, 0xa436, 0xA110, 0xa438, 0x00ff,
- 0xa436, 0xb87c, 0xa438, 0x859b, 0xa436, 0xb87e, 0xa438, 0xaf85,
- 0xa438, 0xb3af, 0xa438, 0x863b, 0xa438, 0xaf86, 0xa438, 0x4caf,
- 0xa438, 0x8688, 0xa438, 0xaf86, 0xa438, 0xceaf, 0xa438, 0x8744,
- 0xa438, 0xaf87, 0xa438, 0x68af, 0xa438, 0x8781, 0xa438, 0xbf5e,
- 0xa438, 0x7202, 0xa438, 0x5f7e, 0xa438, 0xac28, 0xa438, 0x68e1,
- 0xa438, 0x84e6, 0xa438, 0xad28, 0xa438, 0x09bf, 0xa438, 0x5e75,
- 0xa438, 0x025f, 0xa438, 0x7eac, 0xa438, 0x2d59, 0xa438, 0xe18f,
- 0xa438, 0xebad, 0xa438, 0x2809, 0xa438, 0xbf5e, 0xa438, 0x7502,
- 0xa438, 0x5f7e, 0xa438, 0xac2e, 0xa438, 0x50e1, 0xa438, 0x84e6,
- 0xa438, 0xac28, 0xa438, 0x08bf, 0xa438, 0x873e, 0xa438, 0x025f,
- 0xa438, 0x3cae, 0xa438, 0x06bf, 0xa438, 0x873e, 0xa438, 0x025f,
- 0xa438, 0x33bf, 0xa438, 0x8741, 0xa438, 0x025f, 0xa438, 0x33ee,
- 0xa438, 0x8fea, 0xa438, 0x02e1, 0xa438, 0x84e4, 0xa438, 0xad28,
- 0xa438, 0x14e1, 0xa438, 0x8fe8, 0xa438, 0xad28, 0xa438, 0x17e1,
- 0xa438, 0x84e5, 0xa438, 0x11e5, 0xa438, 0x84e5, 0xa438, 0xa10c,
- 0xa438, 0x04ee, 0xa438, 0x84e5, 0xa438, 0x0002, 0xa438, 0x4977,
- 0xa438, 0xee84, 0xa438, 0xdc03, 0xa438, 0xae1d, 0xa438, 0xe18f,
- 0xa438, 0xe811, 0xa438, 0xe58f, 0xa438, 0xe8ae, 0xa438, 0x14bf,
- 0xa438, 0x873e, 0xa438, 0x025f, 0xa438, 0x3cbf, 0xa438, 0x8741,
- 0xa438, 0x025f, 0xa438, 0x3cee, 0xa438, 0x8fea, 0xa438, 0x01ee,
- 0xa438, 0x84e4, 0xa438, 0x00af, 0xa438, 0x50c1, 0xa438, 0x1f00,
- 0xa438, 0xbf5a, 0xa438, 0x6102, 0xa438, 0x5f5f, 0xa438, 0xbf5a,
- 0xa438, 0x5e02, 0xa438, 0x5f3c, 0xa438, 0xaf45, 0xa438, 0x7be0,
- 0xa438, 0x8012, 0xa438, 0xad23, 0xa438, 0x141f, 0xa438, 0x001f,
- 0xa438, 0x22d1, 0xa438, 0x00bf, 0xa438, 0x3fcf, 0xa438, 0x0261,
- 0xa438, 0x3412, 0xa438, 0xa204, 0xa438, 0xf6ee, 0xa438, 0x8317,
- 0xa438, 0x00e0, 0xa438, 0x8012, 0xa438, 0xad24, 0xa438, 0x141f,
- 0xa438, 0x001f, 0xa438, 0x22d1, 0xa438, 0x00bf, 0xa438, 0x3fd7,
- 0xa438, 0x0261, 0xa438, 0x3412, 0xa438, 0xa204, 0xa438, 0xf6ee,
- 0xa438, 0x8317, 0xa438, 0x00ef, 0xa438, 0x96fe, 0xa438, 0xfdfc,
- 0xa438, 0xaf42, 0xa438, 0x9802, 0xa438, 0x56ec, 0xa438, 0xf70b,
- 0xa438, 0xac13, 0xa438, 0x0fbf, 0xa438, 0x5e75, 0xa438, 0x025f,
- 0xa438, 0x7eac, 0xa438, 0x280c, 0xa438, 0xe2ff, 0xa438, 0xcfad,
- 0xa438, 0x32ee, 0xa438, 0x0257, 0xa438, 0x05af, 0xa438, 0x00a4,
- 0xa438, 0x0286, 0xa438, 0xaaae, 0xa438, 0xeff8, 0xa438, 0xf9ef,
- 0xa438, 0x5902, 0xa438, 0x1fe1, 0xa438, 0xbf59, 0xa438, 0x4d02,
- 0xa438, 0x5f3c, 0xa438, 0xac13, 0xa438, 0x09bf, 0xa438, 0x5e75,
- 0xa438, 0x025f, 0xa438, 0x7ea1, 0xa438, 0x00f4, 0xa438, 0xbf59,
- 0xa438, 0x4d02, 0xa438, 0x5f33, 0xa438, 0xef95, 0xa438, 0xfdfc,
- 0xa438, 0x04bf, 0xa438, 0x5e72, 0xa438, 0x025f, 0xa438, 0x7eac,
- 0xa438, 0x284a, 0xa438, 0xe184, 0xa438, 0xe6ad, 0xa438, 0x2809,
- 0xa438, 0xbf5e, 0xa438, 0x7502, 0xa438, 0x5f7e, 0xa438, 0xac2d,
- 0xa438, 0x3be1, 0xa438, 0x8feb, 0xa438, 0xad28, 0xa438, 0x09bf,
- 0xa438, 0x5e75, 0xa438, 0x025f, 0xa438, 0x7eac, 0xa438, 0x2e32,
- 0xa438, 0xe184, 0xa438, 0xe6ac, 0xa438, 0x2808, 0xa438, 0xbf87,
- 0xa438, 0x3e02, 0xa438, 0x5f3c, 0xa438, 0xae06, 0xa438, 0xbf87,
- 0xa438, 0x3e02, 0xa438, 0x5f33, 0xa438, 0xbf87, 0xa438, 0x4102,
- 0xa438, 0x5f33, 0xa438, 0xee8f, 0xa438, 0xea04, 0xa438, 0xbf5e,
- 0xa438, 0x4e02, 0xa438, 0x5f7e, 0xa438, 0xad28, 0xa438, 0x1f02,
- 0xa438, 0x4b12, 0xa438, 0xae1a, 0xa438, 0xbf87, 0xa438, 0x3e02,
- 0xa438, 0x5f3c, 0xa438, 0xbf87, 0xa438, 0x4102, 0xa438, 0x5f3c,
- 0xa438, 0xee8f, 0xa438, 0xea03, 0xa438, 0xbf5e, 0xa438, 0x2a02,
- 0xa438, 0x5f33, 0xa438, 0xee84, 0xa438, 0xe701, 0xa438, 0xaf4a,
- 0xa438, 0x7444, 0xa438, 0xac0e, 0xa438, 0x55ac, 0xa438, 0x0ebf,
- 0xa438, 0x5e75, 0xa438, 0x025f, 0xa438, 0x7ead, 0xa438, 0x2d0b,
- 0xa438, 0xbf5e, 0xa438, 0x36e1, 0xa438, 0x8fe9, 0xa438, 0x025f,
- 0xa438, 0x5fae, 0xa438, 0x09bf, 0xa438, 0x5e36, 0xa438, 0xe184,
- 0xa438, 0xe102, 0xa438, 0x5f5f, 0xa438, 0xee8f, 0xa438, 0xe800,
- 0xa438, 0xaf49, 0xa438, 0xcdbf, 0xa438, 0x595c, 0xa438, 0x025f,
- 0xa438, 0x7ea1, 0xa438, 0x0203, 0xa438, 0xaf87, 0xa438, 0x79d1,
- 0xa438, 0x00af, 0xa438, 0x877c, 0xa438, 0xe181, 0xa438, 0x941f,
- 0xa438, 0x00af, 0xa438, 0x3ff7, 0xa438, 0xac4e, 0xa438, 0x06ac,
- 0xa438, 0x4003, 0xa438, 0xaf24, 0xa438, 0x97af, 0xa438, 0x2467,
- 0xa436, 0xb85e, 0xa438, 0x5082, 0xa436, 0xb860, 0xa438, 0x4575,
- 0xa436, 0xb862, 0xa438, 0x425F, 0xa436, 0xb864, 0xa438, 0x0096,
- 0xa436, 0xb886, 0xa438, 0x4A44, 0xa436, 0xb888, 0xa438, 0x49c4,
- 0xa436, 0xb88a, 0xa438, 0x3FF2, 0xa436, 0xb88c, 0xa438, 0x245C,
- 0xa436, 0xb838, 0xa438, 0x00ff, 0xb820, 0x0010, 0xa466, 0x0001,
- 0xa436, 0x836a, 0xa438, 0x0001, 0xa436, 0x843d, 0xa438, 0xaf84,
- 0xa438, 0xa6af, 0xa438, 0x8540, 0xa438, 0xaf85, 0xa438, 0xaeaf,
- 0xa438, 0x85b5, 0xa438, 0xaf87, 0xa438, 0x7daf, 0xa438, 0x8784,
- 0xa438, 0xaf87, 0xa438, 0x87af, 0xa438, 0x87e5, 0xa438, 0x0066,
- 0xa438, 0x0a03, 0xa438, 0x6607, 0xa438, 0x2666, 0xa438, 0x1c00,
- 0xa438, 0x660d, 0xa438, 0x0166, 0xa438, 0x1004, 0xa438, 0x6616,
- 0xa438, 0x0566, 0xa438, 0x1f06, 0xa438, 0x6a5d, 0xa438, 0x2766,
- 0xa438, 0x1900, 0xa438, 0x6625, 0xa438, 0x2466, 0xa438, 0x2820,
- 0xa438, 0x662b, 0xa438, 0x2466, 0xa438, 0x4600, 0xa438, 0x664c,
- 0xa438, 0x0166, 0xa438, 0x4902, 0xa438, 0x8861, 0xa438, 0x0388,
- 0xa438, 0x5e05, 0xa438, 0x886d, 0xa438, 0x0588, 0xa438, 0x7005,
- 0xa438, 0x8873, 0xa438, 0x0588, 0xa438, 0x7605, 0xa438, 0x8879,
- 0xa438, 0x0588, 0xa438, 0x7c05, 0xa438, 0x887f, 0xa438, 0x0588,
- 0xa438, 0x8205, 0xa438, 0x8885, 0xa438, 0x0588, 0xa438, 0x881e,
- 0xa438, 0x13ad, 0xa438, 0x2841, 0xa438, 0xbf64, 0xa438, 0xf102,
- 0xa438, 0x6b9d, 0xa438, 0xad28, 0xa438, 0x03af, 0xa438, 0x15fc,
- 0xa438, 0xbf65, 0xa438, 0xcb02, 0xa438, 0x6b9d, 0xa438, 0x0d11,
- 0xa438, 0xf62f, 0xa438, 0xef31, 0xa438, 0xd202, 0xa438, 0xbf88,
- 0xa438, 0x6402, 0xa438, 0x6b52, 0xa438, 0xe082, 0xa438, 0x020d,
- 0xa438, 0x01f6, 0xa438, 0x271b, 0xa438, 0x03aa, 0xa438, 0x0182,
- 0xa438, 0xe082, 0xa438, 0x010d, 0xa438, 0x01f6, 0xa438, 0x271b,
- 0xa438, 0x03aa, 0xa438, 0x0782, 0xa438, 0xbf88, 0xa438, 0x6402,
- 0xa438, 0x6b5b, 0xa438, 0xaf15, 0xa438, 0xf9bf, 0xa438, 0x65cb,
- 0xa438, 0x026b, 0xa438, 0x9d0d, 0xa438, 0x11f6, 0xa438, 0x2fef,
- 0xa438, 0x31e0, 0xa438, 0x8ff7, 0xa438, 0x0d01, 0xa438, 0xf627,
- 0xa438, 0x1b03, 0xa438, 0xaa20, 0xa438, 0xe18f, 0xa438, 0xf4d0,
- 0xa438, 0x00bf, 0xa438, 0x6587, 0xa438, 0x026b, 0xa438, 0x7ee1,
- 0xa438, 0x8ff5, 0xa438, 0xbf65, 0xa438, 0x8a02, 0xa438, 0x6b7e,
- 0xa438, 0xe18f, 0xa438, 0xf6bf, 0xa438, 0x6584, 0xa438, 0x026b,
- 0xa438, 0x7eaf, 0xa438, 0x15fc, 0xa438, 0xe18f, 0xa438, 0xf1d0,
- 0xa438, 0x00bf, 0xa438, 0x6587, 0xa438, 0x026b, 0xa438, 0x7ee1,
- 0xa438, 0x8ff2, 0xa438, 0xbf65, 0xa438, 0x8a02, 0xa438, 0x6b7e,
- 0xa438, 0xe18f, 0xa438, 0xf3bf, 0xa438, 0x6584, 0xa438, 0xaf15,
- 0xa438, 0xfcd1, 0xa438, 0x07bf, 0xa438, 0x65ce, 0xa438, 0x026b,
- 0xa438, 0x7ed1, 0xa438, 0x0cbf, 0xa438, 0x65d1, 0xa438, 0x026b,
- 0xa438, 0x7ed1, 0xa438, 0x03bf, 0xa438, 0x885e, 0xa438, 0x026b,
- 0xa438, 0x7ed1, 0xa438, 0x05bf, 0xa438, 0x8867, 0xa438, 0x026b,
- 0xa438, 0x7ed1, 0xa438, 0x07bf, 0xa438, 0x886a, 0xa438, 0x026b,
- 0xa438, 0x7ebf, 0xa438, 0x6a6c, 0xa438, 0x026b, 0xa438, 0x5b02,
- 0xa438, 0x62b5, 0xa438, 0xbf6a, 0xa438, 0x0002, 0xa438, 0x6b5b,
- 0xa438, 0xbf64, 0xa438, 0x4e02, 0xa438, 0x6b9d, 0xa438, 0xac28,
- 0xa438, 0x0bbf, 0xa438, 0x6412, 0xa438, 0x026b, 0xa438, 0x9da1,
- 0xa438, 0x0502, 0xa438, 0xaeec, 0xa438, 0xd104, 0xa438, 0xbf65,
- 0xa438, 0xce02, 0xa438, 0x6b7e, 0xa438, 0xd104, 0xa438, 0xbf65,
- 0xa438, 0xd102, 0xa438, 0x6b7e, 0xa438, 0xd102, 0xa438, 0xbf88,
- 0xa438, 0x6702, 0xa438, 0x6b7e, 0xa438, 0xd104, 0xa438, 0xbf88,
- 0xa438, 0x6a02, 0xa438, 0x6b7e, 0xa438, 0xaf62, 0xa438, 0x72f6,
- 0xa438, 0x0af6, 0xa438, 0x09af, 0xa438, 0x34e3, 0xa438, 0x0285,
- 0xa438, 0xbe02, 0xa438, 0x106c, 0xa438, 0xaf10, 0xa438, 0x6bf8,
- 0xa438, 0xfaef, 0xa438, 0x69e0, 0xa438, 0x804c, 0xa438, 0xac25,
- 0xa438, 0x17e0, 0xa438, 0x8040, 0xa438, 0xad25, 0xa438, 0x1a02,
- 0xa438, 0x85ed, 0xa438, 0xe080, 0xa438, 0x40ac, 0xa438, 0x2511,
- 0xa438, 0xbf87, 0xa438, 0x6502, 0xa438, 0x6b5b, 0xa438, 0xae09,
- 0xa438, 0x0287, 0xa438, 0x2402, 0xa438, 0x875a, 0xa438, 0x0287,
- 0xa438, 0x4fef, 0xa438, 0x96fe, 0xa438, 0xfc04, 0xa438, 0xf8e0,
- 0xa438, 0x8019, 0xa438, 0xad20, 0xa438, 0x11e0, 0xa438, 0x8fe3,
- 0xa438, 0xac20, 0xa438, 0x0502, 0xa438, 0x860a, 0xa438, 0xae03,
- 0xa438, 0x0286, 0xa438, 0x7802, 0xa438, 0x86c1, 0xa438, 0x0287,
- 0xa438, 0x4ffc, 0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x79fb,
- 0xa438, 0xbf87, 0xa438, 0x6802, 0xa438, 0x6b9d, 0xa438, 0x5c20,
- 0xa438, 0x000d, 0xa438, 0x4da1, 0xa438, 0x0151, 0xa438, 0xbf87,
- 0xa438, 0x6802, 0xa438, 0x6b9d, 0xa438, 0x5c07, 0xa438, 0xffe3,
- 0xa438, 0x8fe4, 0xa438, 0x1b31, 0xa438, 0x9f41, 0xa438, 0x0d48,
- 0xa438, 0xe38f, 0xa438, 0xe51b, 0xa438, 0x319f, 0xa438, 0x38bf,
- 0xa438, 0x876b, 0xa438, 0x026b, 0xa438, 0x9d5c, 0xa438, 0x07ff,
- 0xa438, 0xe38f, 0xa438, 0xe61b, 0xa438, 0x319f, 0xa438, 0x280d,
- 0xa438, 0x48e3, 0xa438, 0x8fe7, 0xa438, 0x1b31, 0xa438, 0x9f1f,
- 0xa438, 0xbf87, 0xa438, 0x6e02, 0xa438, 0x6b9d, 0xa438, 0x5c07,
- 0xa438, 0xffe3, 0xa438, 0x8fe8, 0xa438, 0x1b31, 0xa438, 0x9f0f,
- 0xa438, 0x0d48, 0xa438, 0xe38f, 0xa438, 0xe91b, 0xa438, 0x319f,
- 0xa438, 0x06ee, 0xa438, 0x8fe3, 0xa438, 0x01ae, 0xa438, 0x04ee,
- 0xa438, 0x8fe3, 0xa438, 0x00ff, 0xa438, 0xef97, 0xa438, 0xfdfc,
+ 0xa438, 0x1800, 0xa438, 0x0df8, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8608, 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0e2b,
+ 0xa436, 0xA10E, 0xa438, 0x0d14, 0xa436, 0xA10C, 0xa438, 0x0ce8,
+ 0xa436, 0xA10A, 0xa438, 0x0279, 0xa436, 0xA108, 0xa438, 0x0b19,
+ 0xa436, 0xA106, 0xa438, 0x111f, 0xa436, 0xA104, 0xa438, 0x0a7b,
+ 0xa436, 0xA102, 0xa438, 0x0ba3, 0xa436, 0xA100, 0xa438, 0x0022,
+ 0xa436, 0xA110, 0xa438, 0x00ff, 0xa436, 0xb87c, 0xa438, 0x859b,
+ 0xa436, 0xb87e, 0xa438, 0xaf85, 0xa438, 0xb3af, 0xa438, 0x863b,
+ 0xa438, 0xaf86, 0xa438, 0x4caf, 0xa438, 0x8688, 0xa438, 0xaf86,
+ 0xa438, 0xceaf, 0xa438, 0x8744, 0xa438, 0xaf87, 0xa438, 0x68af,
+ 0xa438, 0x8781, 0xa438, 0xbf5e, 0xa438, 0x7202, 0xa438, 0x5f7e,
+ 0xa438, 0xac28, 0xa438, 0x68e1, 0xa438, 0x84e6, 0xa438, 0xad28,
+ 0xa438, 0x09bf, 0xa438, 0x5e75, 0xa438, 0x025f, 0xa438, 0x7eac,
+ 0xa438, 0x2d59, 0xa438, 0xe18f, 0xa438, 0xebad, 0xa438, 0x2809,
+ 0xa438, 0xbf5e, 0xa438, 0x7502, 0xa438, 0x5f7e, 0xa438, 0xac2e,
+ 0xa438, 0x50e1, 0xa438, 0x84e6, 0xa438, 0xac28, 0xa438, 0x08bf,
+ 0xa438, 0x873e, 0xa438, 0x025f, 0xa438, 0x3cae, 0xa438, 0x06bf,
+ 0xa438, 0x873e, 0xa438, 0x025f, 0xa438, 0x33bf, 0xa438, 0x8741,
+ 0xa438, 0x025f, 0xa438, 0x33ee, 0xa438, 0x8fea, 0xa438, 0x02e1,
+ 0xa438, 0x84e4, 0xa438, 0xad28, 0xa438, 0x14e1, 0xa438, 0x8fe8,
+ 0xa438, 0xad28, 0xa438, 0x17e1, 0xa438, 0x84e5, 0xa438, 0x11e5,
+ 0xa438, 0x84e5, 0xa438, 0xa10c, 0xa438, 0x04ee, 0xa438, 0x84e5,
+ 0xa438, 0x0002, 0xa438, 0x4977, 0xa438, 0xee84, 0xa438, 0xdc03,
+ 0xa438, 0xae1d, 0xa438, 0xe18f, 0xa438, 0xe811, 0xa438, 0xe58f,
+ 0xa438, 0xe8ae, 0xa438, 0x14bf, 0xa438, 0x873e, 0xa438, 0x025f,
+ 0xa438, 0x3cbf, 0xa438, 0x8741, 0xa438, 0x025f, 0xa438, 0x3cee,
+ 0xa438, 0x8fea, 0xa438, 0x01ee, 0xa438, 0x84e4, 0xa438, 0x00af,
+ 0xa438, 0x50c1, 0xa438, 0x1f00, 0xa438, 0xbf5a, 0xa438, 0x6102,
+ 0xa438, 0x5f5f, 0xa438, 0xbf5a, 0xa438, 0x5e02, 0xa438, 0x5f3c,
+ 0xa438, 0xaf45, 0xa438, 0x7be0, 0xa438, 0x8012, 0xa438, 0xad23,
+ 0xa438, 0x141f, 0xa438, 0x001f, 0xa438, 0x22d1, 0xa438, 0x00bf,
+ 0xa438, 0x3fcf, 0xa438, 0x0261, 0xa438, 0x3412, 0xa438, 0xa204,
+ 0xa438, 0xf6ee, 0xa438, 0x8317, 0xa438, 0x00e0, 0xa438, 0x8012,
+ 0xa438, 0xad24, 0xa438, 0x141f, 0xa438, 0x001f, 0xa438, 0x22d1,
+ 0xa438, 0x00bf, 0xa438, 0x3fd7, 0xa438, 0x0261, 0xa438, 0x3412,
+ 0xa438, 0xa204, 0xa438, 0xf6ee, 0xa438, 0x8317, 0xa438, 0x00ef,
+ 0xa438, 0x96fe, 0xa438, 0xfdfc, 0xa438, 0xaf42, 0xa438, 0x9802,
+ 0xa438, 0x56ec, 0xa438, 0xf70b, 0xa438, 0xac13, 0xa438, 0x0fbf,
+ 0xa438, 0x5e75, 0xa438, 0x025f, 0xa438, 0x7eac, 0xa438, 0x280c,
+ 0xa438, 0xe2ff, 0xa438, 0xcfad, 0xa438, 0x32ee, 0xa438, 0x0257,
+ 0xa438, 0x05af, 0xa438, 0x00a4, 0xa438, 0x0286, 0xa438, 0xaaae,
+ 0xa438, 0xeff8, 0xa438, 0xf9ef, 0xa438, 0x5902, 0xa438, 0x1fe1,
+ 0xa438, 0xbf59, 0xa438, 0x4d02, 0xa438, 0x5f3c, 0xa438, 0xac13,
+ 0xa438, 0x09bf, 0xa438, 0x5e75, 0xa438, 0x025f, 0xa438, 0x7ea1,
+ 0xa438, 0x00f4, 0xa438, 0xbf59, 0xa438, 0x4d02, 0xa438, 0x5f33,
+ 0xa438, 0xef95, 0xa438, 0xfdfc, 0xa438, 0x04bf, 0xa438, 0x5e72,
+ 0xa438, 0x025f, 0xa438, 0x7eac, 0xa438, 0x284a, 0xa438, 0xe184,
+ 0xa438, 0xe6ad, 0xa438, 0x2809, 0xa438, 0xbf5e, 0xa438, 0x7502,
+ 0xa438, 0x5f7e, 0xa438, 0xac2d, 0xa438, 0x3be1, 0xa438, 0x8feb,
+ 0xa438, 0xad28, 0xa438, 0x09bf, 0xa438, 0x5e75, 0xa438, 0x025f,
+ 0xa438, 0x7eac, 0xa438, 0x2e32, 0xa438, 0xe184, 0xa438, 0xe6ac,
+ 0xa438, 0x2808, 0xa438, 0xbf87, 0xa438, 0x3e02, 0xa438, 0x5f3c,
+ 0xa438, 0xae06, 0xa438, 0xbf87, 0xa438, 0x3e02, 0xa438, 0x5f33,
+ 0xa438, 0xbf87, 0xa438, 0x4102, 0xa438, 0x5f33, 0xa438, 0xee8f,
+ 0xa438, 0xea04, 0xa438, 0xbf5e, 0xa438, 0x4e02, 0xa438, 0x5f7e,
+ 0xa438, 0xad28, 0xa438, 0x1f02, 0xa438, 0x4b12, 0xa438, 0xae1a,
+ 0xa438, 0xbf87, 0xa438, 0x3e02, 0xa438, 0x5f3c, 0xa438, 0xbf87,
+ 0xa438, 0x4102, 0xa438, 0x5f3c, 0xa438, 0xee8f, 0xa438, 0xea03,
+ 0xa438, 0xbf5e, 0xa438, 0x2a02, 0xa438, 0x5f33, 0xa438, 0xee84,
+ 0xa438, 0xe701, 0xa438, 0xaf4a, 0xa438, 0x7444, 0xa438, 0xac0e,
+ 0xa438, 0x55ac, 0xa438, 0x0ebf, 0xa438, 0x5e75, 0xa438, 0x025f,
+ 0xa438, 0x7ead, 0xa438, 0x2d0b, 0xa438, 0xbf5e, 0xa438, 0x36e1,
+ 0xa438, 0x8fe9, 0xa438, 0x025f, 0xa438, 0x5fae, 0xa438, 0x09bf,
+ 0xa438, 0x5e36, 0xa438, 0xe184, 0xa438, 0xe102, 0xa438, 0x5f5f,
+ 0xa438, 0xee8f, 0xa438, 0xe800, 0xa438, 0xaf49, 0xa438, 0xcdbf,
+ 0xa438, 0x595c, 0xa438, 0x025f, 0xa438, 0x7ea1, 0xa438, 0x0203,
+ 0xa438, 0xaf87, 0xa438, 0x79d1, 0xa438, 0x00af, 0xa438, 0x877c,
+ 0xa438, 0xe181, 0xa438, 0x941f, 0xa438, 0x00af, 0xa438, 0x3ff7,
+ 0xa438, 0xac4e, 0xa438, 0x06ac, 0xa438, 0x4003, 0xa438, 0xaf24,
+ 0xa438, 0x97af, 0xa438, 0x2467, 0xa436, 0xb85e, 0xa438, 0x5082,
+ 0xa436, 0xb860, 0xa438, 0x4575, 0xa436, 0xb862, 0xa438, 0x425F,
+ 0xa436, 0xb864, 0xa438, 0x0096, 0xa436, 0xb886, 0xa438, 0x4A44,
+ 0xa436, 0xb888, 0xa438, 0x49c4, 0xa436, 0xb88a, 0xa438, 0x3FF2,
+ 0xa436, 0xb88c, 0xa438, 0x245C, 0xa436, 0xb838, 0xa438, 0x00ff,
+ 0xb820, 0x0010, 0xa436, 0x843d, 0xa438, 0xaf84, 0xa438, 0xa6af,
+ 0xa438, 0x8540, 0xa438, 0xaf85, 0xa438, 0xaeaf, 0xa438, 0x85b5,
+ 0xa438, 0xaf87, 0xa438, 0x7daf, 0xa438, 0x8784, 0xa438, 0xaf87,
+ 0xa438, 0x87af, 0xa438, 0x87e5, 0xa438, 0x0066, 0xa438, 0x0a03,
+ 0xa438, 0x6607, 0xa438, 0x2666, 0xa438, 0x1c00, 0xa438, 0x660d,
+ 0xa438, 0x0166, 0xa438, 0x1004, 0xa438, 0x6616, 0xa438, 0x0566,
+ 0xa438, 0x1f06, 0xa438, 0x6a5d, 0xa438, 0x2766, 0xa438, 0x1900,
+ 0xa438, 0x6625, 0xa438, 0x2466, 0xa438, 0x2820, 0xa438, 0x662b,
+ 0xa438, 0x2466, 0xa438, 0x4600, 0xa438, 0x664c, 0xa438, 0x0166,
+ 0xa438, 0x4902, 0xa438, 0x8861, 0xa438, 0x0388, 0xa438, 0x5e05,
+ 0xa438, 0x886d, 0xa438, 0x0588, 0xa438, 0x7005, 0xa438, 0x8873,
+ 0xa438, 0x0588, 0xa438, 0x7605, 0xa438, 0x8879, 0xa438, 0x0588,
+ 0xa438, 0x7c05, 0xa438, 0x887f, 0xa438, 0x0588, 0xa438, 0x8205,
+ 0xa438, 0x8885, 0xa438, 0x0588, 0xa438, 0x881e, 0xa438, 0x13ad,
+ 0xa438, 0x2841, 0xa438, 0xbf64, 0xa438, 0xf102, 0xa438, 0x6b9d,
+ 0xa438, 0xad28, 0xa438, 0x03af, 0xa438, 0x15fc, 0xa438, 0xbf65,
+ 0xa438, 0xcb02, 0xa438, 0x6b9d, 0xa438, 0x0d11, 0xa438, 0xf62f,
+ 0xa438, 0xef31, 0xa438, 0xd202, 0xa438, 0xbf88, 0xa438, 0x6402,
+ 0xa438, 0x6b52, 0xa438, 0xe082, 0xa438, 0x020d, 0xa438, 0x01f6,
+ 0xa438, 0x271b, 0xa438, 0x03aa, 0xa438, 0x0182, 0xa438, 0xe082,
+ 0xa438, 0x010d, 0xa438, 0x01f6, 0xa438, 0x271b, 0xa438, 0x03aa,
+ 0xa438, 0x0782, 0xa438, 0xbf88, 0xa438, 0x6402, 0xa438, 0x6b5b,
+ 0xa438, 0xaf15, 0xa438, 0xf9bf, 0xa438, 0x65cb, 0xa438, 0x026b,
+ 0xa438, 0x9d0d, 0xa438, 0x11f6, 0xa438, 0x2fef, 0xa438, 0x31e0,
+ 0xa438, 0x8ff7, 0xa438, 0x0d01, 0xa438, 0xf627, 0xa438, 0x1b03,
+ 0xa438, 0xaa20, 0xa438, 0xe18f, 0xa438, 0xf4d0, 0xa438, 0x00bf,
+ 0xa438, 0x6587, 0xa438, 0x026b, 0xa438, 0x7ee1, 0xa438, 0x8ff5,
+ 0xa438, 0xbf65, 0xa438, 0x8a02, 0xa438, 0x6b7e, 0xa438, 0xe18f,
+ 0xa438, 0xf6bf, 0xa438, 0x6584, 0xa438, 0x026b, 0xa438, 0x7eaf,
+ 0xa438, 0x15fc, 0xa438, 0xe18f, 0xa438, 0xf1d0, 0xa438, 0x00bf,
+ 0xa438, 0x6587, 0xa438, 0x026b, 0xa438, 0x7ee1, 0xa438, 0x8ff2,
+ 0xa438, 0xbf65, 0xa438, 0x8a02, 0xa438, 0x6b7e, 0xa438, 0xe18f,
+ 0xa438, 0xf3bf, 0xa438, 0x6584, 0xa438, 0xaf15, 0xa438, 0xfcd1,
+ 0xa438, 0x07bf, 0xa438, 0x65ce, 0xa438, 0x026b, 0xa438, 0x7ed1,
+ 0xa438, 0x0cbf, 0xa438, 0x65d1, 0xa438, 0x026b, 0xa438, 0x7ed1,
+ 0xa438, 0x03bf, 0xa438, 0x885e, 0xa438, 0x026b, 0xa438, 0x7ed1,
+ 0xa438, 0x05bf, 0xa438, 0x8867, 0xa438, 0x026b, 0xa438, 0x7ed1,
+ 0xa438, 0x07bf, 0xa438, 0x886a, 0xa438, 0x026b, 0xa438, 0x7ebf,
+ 0xa438, 0x6a6c, 0xa438, 0x026b, 0xa438, 0x5b02, 0xa438, 0x62b5,
+ 0xa438, 0xbf6a, 0xa438, 0x0002, 0xa438, 0x6b5b, 0xa438, 0xbf64,
+ 0xa438, 0x4e02, 0xa438, 0x6b9d, 0xa438, 0xac28, 0xa438, 0x0bbf,
+ 0xa438, 0x6412, 0xa438, 0x026b, 0xa438, 0x9da1, 0xa438, 0x0502,
+ 0xa438, 0xaeec, 0xa438, 0xd104, 0xa438, 0xbf65, 0xa438, 0xce02,
+ 0xa438, 0x6b7e, 0xa438, 0xd104, 0xa438, 0xbf65, 0xa438, 0xd102,
+ 0xa438, 0x6b7e, 0xa438, 0xd102, 0xa438, 0xbf88, 0xa438, 0x6702,
+ 0xa438, 0x6b7e, 0xa438, 0xd104, 0xa438, 0xbf88, 0xa438, 0x6a02,
+ 0xa438, 0x6b7e, 0xa438, 0xaf62, 0xa438, 0x72f6, 0xa438, 0x0af6,
+ 0xa438, 0x09af, 0xa438, 0x34e3, 0xa438, 0x0285, 0xa438, 0xbe02,
+ 0xa438, 0x106c, 0xa438, 0xaf10, 0xa438, 0x6bf8, 0xa438, 0xfaef,
+ 0xa438, 0x69e0, 0xa438, 0x804c, 0xa438, 0xac25, 0xa438, 0x17e0,
+ 0xa438, 0x8040, 0xa438, 0xad25, 0xa438, 0x1a02, 0xa438, 0x85ed,
+ 0xa438, 0xe080, 0xa438, 0x40ac, 0xa438, 0x2511, 0xa438, 0xbf87,
+ 0xa438, 0x6502, 0xa438, 0x6b5b, 0xa438, 0xae09, 0xa438, 0x0287,
+ 0xa438, 0x2402, 0xa438, 0x875a, 0xa438, 0x0287, 0xa438, 0x4fef,
+ 0xa438, 0x96fe, 0xa438, 0xfc04, 0xa438, 0xf8e0, 0xa438, 0x8019,
+ 0xa438, 0xad20, 0xa438, 0x11e0, 0xa438, 0x8fe3, 0xa438, 0xac20,
+ 0xa438, 0x0502, 0xa438, 0x860a, 0xa438, 0xae03, 0xa438, 0x0286,
+ 0xa438, 0x7802, 0xa438, 0x86c1, 0xa438, 0x0287, 0xa438, 0x4ffc,
0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x79fb, 0xa438, 0xbf87,
0xa438, 0x6802, 0xa438, 0x6b9d, 0xa438, 0x5c20, 0xa438, 0x000d,
- 0xa438, 0x4da1, 0xa438, 0x0020, 0xa438, 0xbf87, 0xa438, 0x6802,
- 0xa438, 0x6b9d, 0xa438, 0x5c06, 0xa438, 0x000d, 0xa438, 0x49e3,
- 0xa438, 0x8fea, 0xa438, 0x1b31, 0xa438, 0x9f0e, 0xa438, 0xbf87,
- 0xa438, 0x7102, 0xa438, 0x6b5b, 0xa438, 0xbf87, 0xa438, 0x7702,
- 0xa438, 0x6b5b, 0xa438, 0xae0c, 0xa438, 0xbf87, 0xa438, 0x7102,
- 0xa438, 0x6b52, 0xa438, 0xbf87, 0xa438, 0x7702, 0xa438, 0x6b52,
- 0xa438, 0xee8f, 0xa438, 0xe300, 0xa438, 0xffef, 0xa438, 0x97fd,
- 0xa438, 0xfc04, 0xa438, 0xf8f9, 0xa438, 0xef79, 0xa438, 0xfbbf,
- 0xa438, 0x8768, 0xa438, 0x026b, 0xa438, 0x9d5c, 0xa438, 0x2000,
- 0xa438, 0x0d4d, 0xa438, 0xa101, 0xa438, 0x4abf, 0xa438, 0x8768,
+ 0xa438, 0x4da1, 0xa438, 0x0151, 0xa438, 0xbf87, 0xa438, 0x6802,
+ 0xa438, 0x6b9d, 0xa438, 0x5c07, 0xa438, 0xffe3, 0xa438, 0x8fe4,
+ 0xa438, 0x1b31, 0xa438, 0x9f41, 0xa438, 0x0d48, 0xa438, 0xe38f,
+ 0xa438, 0xe51b, 0xa438, 0x319f, 0xa438, 0x38bf, 0xa438, 0x876b,
0xa438, 0x026b, 0xa438, 0x9d5c, 0xa438, 0x07ff, 0xa438, 0xe38f,
- 0xa438, 0xeb1b, 0xa438, 0x319f, 0xa438, 0x3a0d, 0xa438, 0x48e3,
- 0xa438, 0x8fec, 0xa438, 0x1b31, 0xa438, 0x9f31, 0xa438, 0xbf87,
- 0xa438, 0x6b02, 0xa438, 0x6b9d, 0xa438, 0xe38f, 0xa438, 0xed1b,
- 0xa438, 0x319f, 0xa438, 0x240d, 0xa438, 0x48e3, 0xa438, 0x8fee,
- 0xa438, 0x1b31, 0xa438, 0x9f1b, 0xa438, 0xbf87, 0xa438, 0x6e02,
- 0xa438, 0x6b9d, 0xa438, 0xe38f, 0xa438, 0xef1b, 0xa438, 0x319f,
- 0xa438, 0x0ebf, 0xa438, 0x8774, 0xa438, 0x026b, 0xa438, 0x5bbf,
- 0xa438, 0x877a, 0xa438, 0x026b, 0xa438, 0x5bae, 0xa438, 0x00ff,
- 0xa438, 0xef97, 0xa438, 0xfdfc, 0xa438, 0x04f8, 0xa438, 0xef79,
- 0xa438, 0xfbe0, 0xa438, 0x8019, 0xa438, 0xad20, 0xa438, 0x1cee,
- 0xa438, 0x8fe3, 0xa438, 0x00bf, 0xa438, 0x8771, 0xa438, 0x026b,
- 0xa438, 0x52bf, 0xa438, 0x8777, 0xa438, 0x026b, 0xa438, 0x52bf,
- 0xa438, 0x8774, 0xa438, 0x026b, 0xa438, 0x52bf, 0xa438, 0x877a,
- 0xa438, 0x026b, 0xa438, 0x52ff, 0xa438, 0xef97, 0xa438, 0xfc04,
- 0xa438, 0xf8e0, 0xa438, 0x8040, 0xa438, 0xf625, 0xa438, 0xe480,
- 0xa438, 0x40fc, 0xa438, 0x04f8, 0xa438, 0xe080, 0xa438, 0x4cf6,
- 0xa438, 0x25e4, 0xa438, 0x804c, 0xa438, 0xfc04, 0xa438, 0x55a4,
- 0xa438, 0xbaf0, 0xa438, 0xa64a, 0xa438, 0xf0a6, 0xa438, 0x4cf0,
- 0xa438, 0xa64e, 0xa438, 0x66a4, 0xa438, 0xb655, 0xa438, 0xa4b6,
- 0xa438, 0x00ac, 0xa438, 0x0e11, 0xa438, 0xac0e, 0xa438, 0xee80,
- 0xa438, 0x4c3a, 0xa438, 0xaf07, 0xa438, 0xd0af, 0xa438, 0x26d0,
- 0xa438, 0xa201, 0xa438, 0x0ebf, 0xa438, 0x663d, 0xa438, 0x026b,
- 0xa438, 0x52bf, 0xa438, 0x6643, 0xa438, 0x026b, 0xa438, 0x52ae,
- 0xa438, 0x11bf, 0xa438, 0x6643, 0xa438, 0x026b, 0xa438, 0x5bd4,
- 0xa438, 0x0054, 0xa438, 0xb4fe, 0xa438, 0xbf66, 0xa438, 0x3d02,
- 0xa438, 0x6b5b, 0xa438, 0xd300, 0xa438, 0x020d, 0xa438, 0xf6a2,
- 0xa438, 0x0405, 0xa438, 0xe081, 0xa438, 0x47ae, 0xa438, 0x03e0,
- 0xa438, 0x8148, 0xa438, 0xac23, 0xa438, 0x02ae, 0xa438, 0x0268,
- 0xa438, 0xf01a, 0xa438, 0x10ad, 0xa438, 0x2f04, 0xa438, 0xd100,
- 0xa438, 0xae05, 0xa438, 0xad2c, 0xa438, 0x02d1, 0xa438, 0x0f1f,
- 0xa438, 0x00a2, 0xa438, 0x0407, 0xa438, 0x3908, 0xa438, 0xad2f,
- 0xa438, 0x02d1, 0xa438, 0x0002, 0xa438, 0x0e1c, 0xa438, 0x2b01,
- 0xa438, 0xad3a, 0xa438, 0xc9af, 0xa438, 0x0dee, 0xa438, 0xa000,
- 0xa438, 0x2702, 0xa438, 0x1beb, 0xa438, 0xe18f, 0xa438, 0xe1ac,
- 0xa438, 0x2819, 0xa438, 0xee8f, 0xa438, 0xe101, 0xa438, 0x1f44,
- 0xa438, 0xbf65, 0xa438, 0x9302, 0xa438, 0x6b9d, 0xa438, 0xe58f,
- 0xa438, 0xe21f, 0xa438, 0x44d1, 0xa438, 0x02bf, 0xa438, 0x6593,
- 0xa438, 0x026b, 0xa438, 0x7ee0, 0xa438, 0x82b1, 0xa438, 0xae49,
- 0xa438, 0xa001, 0xa438, 0x0502, 0xa438, 0x1c4d, 0xa438, 0xae41,
- 0xa438, 0xa002, 0xa438, 0x0502, 0xa438, 0x1c90, 0xa438, 0xae39,
- 0xa438, 0xa003, 0xa438, 0x0502, 0xa438, 0x1c9d, 0xa438, 0xae31,
- 0xa438, 0xa004, 0xa438, 0x0502, 0xa438, 0x1cbc, 0xa438, 0xae29,
- 0xa438, 0xa005, 0xa438, 0x1e02, 0xa438, 0x1cc9, 0xa438, 0xe080,
- 0xa438, 0xdfac, 0xa438, 0x2013, 0xa438, 0xac21, 0xa438, 0x10ac,
- 0xa438, 0x220d, 0xa438, 0xe18f, 0xa438, 0xe2bf, 0xa438, 0x6593,
- 0xa438, 0x026b, 0xa438, 0x7eee, 0xa438, 0x8fe1, 0xa438, 0x00ae,
- 0xa438, 0x08a0, 0xa438, 0x0605, 0xa438, 0x021d, 0xa438, 0x07ae,
- 0xa438, 0x00e0, 0xa438, 0x82b1, 0xa438, 0xaf1b, 0xa438, 0xe910,
- 0xa438, 0xbf4a, 0xa438, 0x99bf, 0xa438, 0x4a00, 0xa438, 0xa86a,
- 0xa438, 0xfdad, 0xa438, 0x5eca, 0xa438, 0xad5e, 0xa438, 0x88bd,
- 0xa438, 0x2c99, 0xa438, 0xbd2c, 0xa438, 0x33bd, 0xa438, 0x3222,
- 0xa438, 0xbd32, 0xa438, 0x11bd, 0xa438, 0x3200, 0xa438, 0xbd32,
- 0xa438, 0x77bd, 0xa438, 0x3266, 0xa438, 0xbd32, 0xa438, 0x55bd,
- 0xa438, 0x3244, 0xa438, 0xbd32, 0xa436, 0xb818, 0xa438, 0x15c5,
- 0xa436, 0xb81a, 0xa438, 0x6255, 0xa436, 0xb81c, 0xa438, 0x34e1,
- 0xa436, 0xb81e, 0xa438, 0x1068, 0xa436, 0xb850, 0xa438, 0x07cc,
- 0xa436, 0xb852, 0xa438, 0x26ca, 0xa436, 0xb878, 0xa438, 0x0dbf,
- 0xa436, 0xb884, 0xa438, 0x1BB1, 0xa436, 0xb832, 0xa438, 0x00ff,
- 0xa436, 0x0000, 0xa438, 0x0000, 0xB82E, 0x0000, 0xa436, 0x8023,
- 0xa438, 0x0000, 0xa436, 0x801E, 0xa438, 0x0023, 0xB820, 0x0000,
- 0xFFFF, 0xFFFF
+ 0xa438, 0xe61b, 0xa438, 0x319f, 0xa438, 0x280d, 0xa438, 0x48e3,
+ 0xa438, 0x8fe7, 0xa438, 0x1b31, 0xa438, 0x9f1f, 0xa438, 0xbf87,
+ 0xa438, 0x6e02, 0xa438, 0x6b9d, 0xa438, 0x5c07, 0xa438, 0xffe3,
+ 0xa438, 0x8fe8, 0xa438, 0x1b31, 0xa438, 0x9f0f, 0xa438, 0x0d48,
+ 0xa438, 0xe38f, 0xa438, 0xe91b, 0xa438, 0x319f, 0xa438, 0x06ee,
+ 0xa438, 0x8fe3, 0xa438, 0x01ae, 0xa438, 0x04ee, 0xa438, 0x8fe3,
+ 0xa438, 0x00ff, 0xa438, 0xef97, 0xa438, 0xfdfc, 0xa438, 0x04f8,
+ 0xa438, 0xf9ef, 0xa438, 0x79fb, 0xa438, 0xbf87, 0xa438, 0x6802,
+ 0xa438, 0x6b9d, 0xa438, 0x5c20, 0xa438, 0x000d, 0xa438, 0x4da1,
+ 0xa438, 0x0020, 0xa438, 0xbf87, 0xa438, 0x6802, 0xa438, 0x6b9d,
+ 0xa438, 0x5c06, 0xa438, 0x000d, 0xa438, 0x49e3, 0xa438, 0x8fea,
+ 0xa438, 0x1b31, 0xa438, 0x9f0e, 0xa438, 0xbf87, 0xa438, 0x7102,
+ 0xa438, 0x6b5b, 0xa438, 0xbf87, 0xa438, 0x7702, 0xa438, 0x6b5b,
+ 0xa438, 0xae0c, 0xa438, 0xbf87, 0xa438, 0x7102, 0xa438, 0x6b52,
+ 0xa438, 0xbf87, 0xa438, 0x7702, 0xa438, 0x6b52, 0xa438, 0xee8f,
+ 0xa438, 0xe300, 0xa438, 0xffef, 0xa438, 0x97fd, 0xa438, 0xfc04,
+ 0xa438, 0xf8f9, 0xa438, 0xef79, 0xa438, 0xfbbf, 0xa438, 0x8768,
+ 0xa438, 0x026b, 0xa438, 0x9d5c, 0xa438, 0x2000, 0xa438, 0x0d4d,
+ 0xa438, 0xa101, 0xa438, 0x4abf, 0xa438, 0x8768, 0xa438, 0x026b,
+ 0xa438, 0x9d5c, 0xa438, 0x07ff, 0xa438, 0xe38f, 0xa438, 0xeb1b,
+ 0xa438, 0x319f, 0xa438, 0x3a0d, 0xa438, 0x48e3, 0xa438, 0x8fec,
+ 0xa438, 0x1b31, 0xa438, 0x9f31, 0xa438, 0xbf87, 0xa438, 0x6b02,
+ 0xa438, 0x6b9d, 0xa438, 0xe38f, 0xa438, 0xed1b, 0xa438, 0x319f,
+ 0xa438, 0x240d, 0xa438, 0x48e3, 0xa438, 0x8fee, 0xa438, 0x1b31,
+ 0xa438, 0x9f1b, 0xa438, 0xbf87, 0xa438, 0x6e02, 0xa438, 0x6b9d,
+ 0xa438, 0xe38f, 0xa438, 0xef1b, 0xa438, 0x319f, 0xa438, 0x0ebf,
+ 0xa438, 0x8774, 0xa438, 0x026b, 0xa438, 0x5bbf, 0xa438, 0x877a,
+ 0xa438, 0x026b, 0xa438, 0x5bae, 0xa438, 0x00ff, 0xa438, 0xef97,
+ 0xa438, 0xfdfc, 0xa438, 0x04f8, 0xa438, 0xef79, 0xa438, 0xfbe0,
+ 0xa438, 0x8019, 0xa438, 0xad20, 0xa438, 0x1cee, 0xa438, 0x8fe3,
+ 0xa438, 0x00bf, 0xa438, 0x8771, 0xa438, 0x026b, 0xa438, 0x52bf,
+ 0xa438, 0x8777, 0xa438, 0x026b, 0xa438, 0x52bf, 0xa438, 0x8774,
+ 0xa438, 0x026b, 0xa438, 0x52bf, 0xa438, 0x877a, 0xa438, 0x026b,
+ 0xa438, 0x52ff, 0xa438, 0xef97, 0xa438, 0xfc04, 0xa438, 0xf8e0,
+ 0xa438, 0x8040, 0xa438, 0xf625, 0xa438, 0xe480, 0xa438, 0x40fc,
+ 0xa438, 0x04f8, 0xa438, 0xe080, 0xa438, 0x4cf6, 0xa438, 0x25e4,
+ 0xa438, 0x804c, 0xa438, 0xfc04, 0xa438, 0x55a4, 0xa438, 0xbaf0,
+ 0xa438, 0xa64a, 0xa438, 0xf0a6, 0xa438, 0x4cf0, 0xa438, 0xa64e,
+ 0xa438, 0x66a4, 0xa438, 0xb655, 0xa438, 0xa4b6, 0xa438, 0x00ac,
+ 0xa438, 0x0e66, 0xa438, 0xac0e, 0xa438, 0xee80, 0xa438, 0x4c3a,
+ 0xa438, 0xaf07, 0xa438, 0xd0af, 0xa438, 0x26d0, 0xa438, 0xa201,
+ 0xa438, 0x0ebf, 0xa438, 0x663d, 0xa438, 0x026b, 0xa438, 0x52bf,
+ 0xa438, 0x6643, 0xa438, 0x026b, 0xa438, 0x52ae, 0xa438, 0x11bf,
+ 0xa438, 0x6643, 0xa438, 0x026b, 0xa438, 0x5bd4, 0xa438, 0x0054,
+ 0xa438, 0xb4fe, 0xa438, 0xbf66, 0xa438, 0x3d02, 0xa438, 0x6b5b,
+ 0xa438, 0xd300, 0xa438, 0x020d, 0xa438, 0xf6a2, 0xa438, 0x0405,
+ 0xa438, 0xe081, 0xa438, 0x47ae, 0xa438, 0x03e0, 0xa438, 0x8148,
+ 0xa438, 0xac23, 0xa438, 0x02ae, 0xa438, 0x0268, 0xa438, 0xf01a,
+ 0xa438, 0x10ad, 0xa438, 0x2f04, 0xa438, 0xd100, 0xa438, 0xae05,
+ 0xa438, 0xad2c, 0xa438, 0x02d1, 0xa438, 0x0f1f, 0xa438, 0x00a2,
+ 0xa438, 0x0407, 0xa438, 0x3908, 0xa438, 0xad2f, 0xa438, 0x02d1,
+ 0xa438, 0x0002, 0xa438, 0x0e1c, 0xa438, 0x2b01, 0xa438, 0xad3a,
+ 0xa438, 0xc9af, 0xa438, 0x0dee, 0xa438, 0xa000, 0xa438, 0x2702,
+ 0xa438, 0x1beb, 0xa438, 0xe18f, 0xa438, 0xe1ac, 0xa438, 0x2819,
+ 0xa438, 0xee8f, 0xa438, 0xe101, 0xa438, 0x1f44, 0xa438, 0xbf65,
+ 0xa438, 0x9302, 0xa438, 0x6b9d, 0xa438, 0xe58f, 0xa438, 0xe21f,
+ 0xa438, 0x44d1, 0xa438, 0x02bf, 0xa438, 0x6593, 0xa438, 0x026b,
+ 0xa438, 0x7ee0, 0xa438, 0x82b1, 0xa438, 0xae49, 0xa438, 0xa001,
+ 0xa438, 0x0502, 0xa438, 0x1c4d, 0xa438, 0xae41, 0xa438, 0xa002,
+ 0xa438, 0x0502, 0xa438, 0x1c90, 0xa438, 0xae39, 0xa438, 0xa003,
+ 0xa438, 0x0502, 0xa438, 0x1c9d, 0xa438, 0xae31, 0xa438, 0xa004,
+ 0xa438, 0x0502, 0xa438, 0x1cbc, 0xa438, 0xae29, 0xa438, 0xa005,
+ 0xa438, 0x1e02, 0xa438, 0x1cc9, 0xa438, 0xe080, 0xa438, 0xdfac,
+ 0xa438, 0x2013, 0xa438, 0xac21, 0xa438, 0x10ac, 0xa438, 0x220d,
+ 0xa438, 0xe18f, 0xa438, 0xe2bf, 0xa438, 0x6593, 0xa438, 0x026b,
+ 0xa438, 0x7eee, 0xa438, 0x8fe1, 0xa438, 0x00ae, 0xa438, 0x08a0,
+ 0xa438, 0x0605, 0xa438, 0x021d, 0xa438, 0x07ae, 0xa438, 0x00e0,
+ 0xa438, 0x82b1, 0xa438, 0xaf1b, 0xa438, 0xe910, 0xa438, 0xbf4a,
+ 0xa438, 0x99bf, 0xa438, 0x4a00, 0xa438, 0xa86a, 0xa438, 0xfdad,
+ 0xa438, 0x5eca, 0xa438, 0xad5e, 0xa438, 0x88bd, 0xa438, 0x2c99,
+ 0xa438, 0xbd2c, 0xa438, 0x33bd, 0xa438, 0x3222, 0xa438, 0xbd32,
+ 0xa438, 0x11bd, 0xa438, 0x3200, 0xa438, 0xbd32, 0xa438, 0x77bd,
+ 0xa438, 0x3266, 0xa438, 0xbd32, 0xa438, 0x55bd, 0xa438, 0x3244,
+ 0xa438, 0xbd32, 0xa436, 0xb818, 0xa438, 0x15c5, 0xa436, 0xb81a,
+ 0xa438, 0x6255, 0xa436, 0xb81c, 0xa438, 0x34e1, 0xa436, 0xb81e,
+ 0xa438, 0x1068, 0xa436, 0xb850, 0xa438, 0x07cc, 0xa436, 0xb852,
+ 0xa438, 0x26ca, 0xa436, 0xb878, 0xa438, 0x0dbf, 0xa436, 0xb884,
+ 0xa438, 0x1BB1, 0xa436, 0xb832, 0xa438, 0x00ff, 0xa436, 0x0000,
+ 0xa438, 0x0000, 0xB82E, 0x0000, 0xa436, 0x8023, 0xa438, 0x0000,
+ 0xa436, 0x801E, 0xa438, 0x0031, 0xB820, 0x0000, 0xFFFF, 0xFFFF
};
-
static const u16 phy_mcu_ram_code_8125d_1_2[] = {
0xb892, 0x0000, 0xB88E, 0xC28F, 0xB890, 0x252D, 0xB88E, 0xC290,
0xB890, 0xC924, 0xB88E, 0xC291, 0xB890, 0xC92E, 0xB88E, 0xC292,
@@ -525,10 +755,143 @@ static const u16 phy_mcu_ram_code_8125d_1_2[] = {
0xB890, 0x9F3A, 0xB88E, 0xC2CB, 0xB890, 0x9F3A, 0xB88E, 0xC2CC,
0xB890, 0x4430, 0xFFFF, 0xFFFF
};
-
static const u16 phy_mcu_ram_code_8125d_1_3[] = {
0xa436, 0xacca, 0xa438, 0x0104, 0xa436, 0xaccc, 0xa438, 0x8000,
0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x0fff,
+ 0xa436, 0xacce, 0xa438, 0xfd47, 0xa436, 0xacd0, 0xa438, 0x0fff,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xe56f, 0xa436, 0xacd0, 0xa438, 0x01c0,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xed97, 0xa436, 0xacd0, 0xa438, 0x01c8,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xf5bf, 0xa436, 0xacd0, 0xa438, 0x01d0,
+ 0xa436, 0xacce, 0xa438, 0xfb07, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb0f, 0xa436, 0xacd0, 0xa438, 0x01d8,
+ 0xa436, 0xacce, 0xa438, 0xa087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0xa00f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0xa807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0xa88f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0xb027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0xb02f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0xb847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0xb84f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0xfb17, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb1f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xa017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0xa01f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0xa837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0xa83f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0xb097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0xb05f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0xb857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0xb89f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0xfb27, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb2f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x8087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x800f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x8807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x888f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x9027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x902f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x9847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x984f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0xa0a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0xa8af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0xa067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0xa86f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb37, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb3f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x8017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x801f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x8837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x883f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x9097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x905f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x9857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x989f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0xb0b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0xb8bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0xb077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0xb87f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb47, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb4f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x6087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x600f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x6807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x688f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x7027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x702f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x7847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x784f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0x80a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x88af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x8067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x886f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb57, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb5f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x6017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x601f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x6837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x683f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x7097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x705f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x7857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x789f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0x90b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x98bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x9077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x987f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb67, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb6f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x4087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x400f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x4807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x488f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x5027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x502f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x5847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x584f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0x60a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x68af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x6067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x686f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb77, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb7f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x4017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x401f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x4837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x483f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x5097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x505f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x5857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x589f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0x70b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x78bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x7077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x787f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb87, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb8f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x40a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x48af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x4067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x486f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb97, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb9f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x50b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x58bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x5077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x587f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfba7, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfbaf, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x2067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x286f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfbb7, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfbbf, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x3077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x387f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfff9, 0xa436, 0xacd0, 0xa438, 0x17ff,
+ 0xa436, 0xacce, 0xa438, 0xfff9, 0xa436, 0xacd0, 0xa438, 0x17ff,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x0fff,
0xa436, 0xacce, 0xa438, 0xfff8, 0xa436, 0xacd0, 0xa438, 0x0fff,
0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
@@ -568,9 +931,413 @@ static const u16 phy_mcu_ram_code_8125d_1_3[] = {
0xa436, 0xacce, 0xa438, 0x98bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
0xa436, 0xacce, 0xa438, 0x9077, 0xa436, 0xacd0, 0xa438, 0x1171,
0xa436, 0xacce, 0xa438, 0x987f, 0xa436, 0xacd0, 0xa438, 0x1179,
- 0xa436, 0xacca, 0xa438, 0x0004, 0xa436, 0xacc6, 0xa438, 0x0015,
+ 0xa436, 0xacca, 0xa438, 0x0004, 0xa436, 0xacc6, 0xa438, 0x0008,
+ 0xa436, 0xacc8, 0xa438, 0xc000, 0xa436, 0xacc6, 0xa438, 0x0015,
+ 0xa436, 0xacc8, 0xa438, 0xc043, 0xa436, 0xacc8, 0xa438, 0x0000,
+ 0xB820, 0x0000, 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8125d_2_1[] = {
+ 0xa436, 0x8023, 0xa438, 0x3801, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x807e, 0xa438, 0x1800, 0xa438, 0x80be,
+ 0xa438, 0x1800, 0xa438, 0x81c8, 0xa438, 0x1800, 0xa438, 0x81c8,
+ 0xa438, 0x1800, 0xa438, 0x81c8, 0xa438, 0x1800, 0xa438, 0x81c8,
+ 0xa438, 0x1800, 0xa438, 0x81c8, 0xa438, 0xd500, 0xa438, 0xc48d,
+ 0xa438, 0xd504, 0xa438, 0x8d03, 0xa438, 0xd701, 0xa438, 0x4045,
+ 0xa438, 0xad02, 0xa438, 0xd504, 0xa438, 0xd706, 0xa438, 0x2529,
+ 0xa438, 0x8021, 0xa438, 0xd718, 0xa438, 0x607b, 0xa438, 0x40da,
+ 0xa438, 0xf01b, 0xa438, 0x461a, 0xa438, 0xf045, 0xa438, 0xd718,
+ 0xa438, 0x62fb, 0xa438, 0xbb01, 0xa438, 0xd75e, 0xa438, 0x6271,
+ 0xa438, 0x0cf0, 0xa438, 0x0c10, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0xd70c, 0xa438, 0x6187, 0xa438, 0x0cf0, 0xa438, 0x0470,
+ 0xa438, 0x0cf0, 0xa438, 0x0430, 0xa438, 0x0cf0, 0xa438, 0x0410,
+ 0xa438, 0xce00, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0808,
+ 0xa438, 0xf002, 0xa438, 0xa4f0, 0xa438, 0xf042, 0xa438, 0xbb02,
+ 0xa438, 0xd75e, 0xa438, 0x6271, 0xa438, 0x0cf0, 0xa438, 0x0c20,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xd70c, 0xa438, 0x6187,
+ 0xa438, 0x0cf0, 0xa438, 0x0470, 0xa438, 0x0cf0, 0xa438, 0x0430,
+ 0xa438, 0x0cf0, 0xa438, 0x0420, 0xa438, 0xce00, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0804, 0xa438, 0xf002, 0xa438, 0xa4f0,
+ 0xa438, 0xf02c, 0xa438, 0xbb04, 0xa438, 0xd75e, 0xa438, 0x6271,
+ 0xa438, 0x0cf0, 0xa438, 0x0c40, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0xd70c, 0xa438, 0x6187, 0xa438, 0x0cf0, 0xa438, 0x0470,
+ 0xa438, 0x0cf0, 0xa438, 0x0450, 0xa438, 0x0cf0, 0xa438, 0x0440,
+ 0xa438, 0xce00, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0802,
+ 0xa438, 0xf002, 0xa438, 0xa4f0, 0xa438, 0xf016, 0xa438, 0xbb08,
+ 0xa438, 0xd75e, 0xa438, 0x6271, 0xa438, 0x0cf0, 0xa438, 0x0c80,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xd70c, 0xa438, 0x6187,
+ 0xa438, 0x0cf0, 0xa438, 0x04b0, 0xa438, 0x0cf0, 0xa438, 0x0490,
+ 0xa438, 0x0cf0, 0xa438, 0x0480, 0xa438, 0xce00, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0801, 0xa438, 0xf002, 0xa438, 0xa4f0,
+ 0xa438, 0xce00, 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x165a,
+ 0xa438, 0xd75e, 0xa438, 0x67b1, 0xa438, 0xd504, 0xa438, 0xd71e,
+ 0xa438, 0x65bb, 0xa438, 0x63da, 0xa438, 0x61f9, 0xa438, 0x0cf0,
+ 0xa438, 0x0c10, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0808,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xd70c, 0xa438, 0x6087,
+ 0xa438, 0x0cf0, 0xa438, 0x0410, 0xa438, 0xf02c, 0xa438, 0xa4f0,
+ 0xa438, 0xf02a, 0xa438, 0x0cf0, 0xa438, 0x0c20, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0804, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0xd70c, 0xa438, 0x6087, 0xa438, 0x0cf0, 0xa438, 0x0420,
+ 0xa438, 0xf01e, 0xa438, 0xa4f0, 0xa438, 0xf01c, 0xa438, 0x0cf0,
+ 0xa438, 0x0c40, 0xa438, 0xd505, 0xa438, 0x0c0f, 0xa438, 0x0802,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xd70c, 0xa438, 0x6087,
+ 0xa438, 0x0cf0, 0xa438, 0x0440, 0xa438, 0xf010, 0xa438, 0xa4f0,
+ 0xa438, 0xf00e, 0xa438, 0x0cf0, 0xa438, 0x0c80, 0xa438, 0xd505,
+ 0xa438, 0x0c0f, 0xa438, 0x0801, 0xa438, 0xd501, 0xa438, 0xce01,
+ 0xa438, 0xd70c, 0xa438, 0x6087, 0xa438, 0x0cf0, 0xa438, 0x0480,
+ 0xa438, 0xf002, 0xa438, 0xa4f0, 0xa438, 0x1800, 0xa438, 0x168c,
+ 0xa438, 0xd500, 0xa438, 0xd706, 0xa438, 0x2529, 0xa438, 0x80c8,
+ 0xa438, 0xd718, 0xa438, 0x607b, 0xa438, 0x40da, 0xa438, 0xf00f,
+ 0xa438, 0x431a, 0xa438, 0xf021, 0xa438, 0xd718, 0xa438, 0x617b,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0x1000, 0xa438, 0x1b1a,
+ 0xa438, 0xd718, 0xa438, 0x608e, 0xa438, 0xd73e, 0xa438, 0x5f34,
+ 0xa438, 0xf020, 0xa438, 0xf053, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0x1000, 0xa438, 0x1b1a, 0xa438, 0xd718, 0xa438, 0x608e,
+ 0xa438, 0xd73e, 0xa438, 0x5f34, 0xa438, 0xf023, 0xa438, 0xf067,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0x1000, 0xa438, 0x1b1a,
+ 0xa438, 0xd718, 0xa438, 0x608e, 0xa438, 0xd73e, 0xa438, 0x5f34,
+ 0xa438, 0xf026, 0xa438, 0xf07b, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0x1000, 0xa438, 0x1b1a, 0xa438, 0xd718, 0xa438, 0x608e,
+ 0xa438, 0xd73e, 0xa438, 0x5f34, 0xa438, 0xf029, 0xa438, 0xf08f,
+ 0xa438, 0x1000, 0xa438, 0x819f, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0xd73e, 0xa438, 0x7fb4, 0xa438, 0x1000, 0xa438, 0x81b4,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd718, 0xa438, 0x5fae,
+ 0xa438, 0xf028, 0xa438, 0x1000, 0xa438, 0x819f, 0xa438, 0x1000,
+ 0xa438, 0x1a8a, 0xa438, 0xd73e, 0xa438, 0x7fb4, 0xa438, 0x1000,
+ 0xa438, 0x81b4, 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd718,
+ 0xa438, 0x5fae, 0xa438, 0xf039, 0xa438, 0x1000, 0xa438, 0x819f,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd73e, 0xa438, 0x7fb4,
+ 0xa438, 0x1000, 0xa438, 0x81b4, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0xd718, 0xa438, 0x5fae, 0xa438, 0xf04a, 0xa438, 0x1000,
+ 0xa438, 0x819f, 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd73e,
+ 0xa438, 0x7fb4, 0xa438, 0x1000, 0xa438, 0x81b4, 0xa438, 0x1000,
+ 0xa438, 0x1a8a, 0xa438, 0xd718, 0xa438, 0x5fae, 0xa438, 0xf05b,
+ 0xa438, 0xd719, 0xa438, 0x4119, 0xa438, 0xd504, 0xa438, 0xac01,
+ 0xa438, 0xae01, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a78,
+ 0xa438, 0xf00a, 0xa438, 0xd719, 0xa438, 0x4118, 0xa438, 0xd504,
+ 0xa438, 0xac11, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa410,
+ 0xa438, 0xce00, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0xd718, 0xa438, 0x5fb0, 0xa438, 0xd505, 0xa438, 0xd719,
+ 0xa438, 0x4079, 0xa438, 0xa80f, 0xa438, 0xf05d, 0xa438, 0x4b98,
+ 0xa438, 0xa808, 0xa438, 0xf05a, 0xa438, 0xd719, 0xa438, 0x4119,
+ 0xa438, 0xd504, 0xa438, 0xac02, 0xa438, 0xae01, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a78, 0xa438, 0xf00a, 0xa438, 0xd719,
+ 0xa438, 0x4118, 0xa438, 0xd504, 0xa438, 0xac22, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0xa420, 0xa438, 0xce00, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd718, 0xa438, 0x5fb0,
+ 0xa438, 0xd505, 0xa438, 0xd719, 0xa438, 0x4079, 0xa438, 0xa80f,
+ 0xa438, 0xf03f, 0xa438, 0x47d8, 0xa438, 0xa804, 0xa438, 0xf03c,
+ 0xa438, 0xd719, 0xa438, 0x4119, 0xa438, 0xd504, 0xa438, 0xac04,
+ 0xa438, 0xae01, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a78,
+ 0xa438, 0xf00a, 0xa438, 0xd719, 0xa438, 0x4118, 0xa438, 0xd504,
+ 0xa438, 0xac44, 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa440,
+ 0xa438, 0xce00, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1a8a,
+ 0xa438, 0xd718, 0xa438, 0x5fb0, 0xa438, 0xd505, 0xa438, 0xd719,
+ 0xa438, 0x4079, 0xa438, 0xa80f, 0xa438, 0xf021, 0xa438, 0x4418,
+ 0xa438, 0xa802, 0xa438, 0xf01e, 0xa438, 0xd719, 0xa438, 0x4119,
+ 0xa438, 0xd504, 0xa438, 0xac08, 0xa438, 0xae01, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a78, 0xa438, 0xf00a, 0xa438, 0xd719,
+ 0xa438, 0x4118, 0xa438, 0xd504, 0xa438, 0xac88, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0xa480, 0xa438, 0xce00, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1a8a, 0xa438, 0xd718, 0xa438, 0x5fb0,
+ 0xa438, 0xd505, 0xa438, 0xd719, 0xa438, 0x4079, 0xa438, 0xa80f,
+ 0xa438, 0xf003, 0xa438, 0x4058, 0xa438, 0xa801, 0xa438, 0x1800,
+ 0xa438, 0x1736, 0xa438, 0xd73e, 0xa438, 0xd505, 0xa438, 0x3088,
+ 0xa438, 0x81a6, 0xa438, 0x6193, 0xa438, 0x6132, 0xa438, 0x60d1,
+ 0xa438, 0x3298, 0xa438, 0x81b1, 0xa438, 0xf00a, 0xa438, 0xa808,
+ 0xa438, 0xf008, 0xa438, 0xa804, 0xa438, 0xf006, 0xa438, 0xa802,
+ 0xa438, 0xf004, 0xa438, 0xa801, 0xa438, 0xf002, 0xa438, 0xa80f,
+ 0xa438, 0xd500, 0xa438, 0x0800, 0xa438, 0xd505, 0xa438, 0xd75e,
+ 0xa438, 0x6211, 0xa438, 0xd71e, 0xa438, 0x619b, 0xa438, 0x611a,
+ 0xa438, 0x6099, 0xa438, 0x0c0f, 0xa438, 0x0808, 0xa438, 0xf009,
+ 0xa438, 0x0c0f, 0xa438, 0x0804, 0xa438, 0xf006, 0xa438, 0x0c0f,
+ 0xa438, 0x0802, 0xa438, 0xf003, 0xa438, 0x0c0f, 0xa438, 0x0801,
+ 0xa438, 0xd500, 0xa438, 0x0800, 0xa436, 0xA026, 0xa438, 0xffff,
+ 0xa436, 0xA024, 0xa438, 0xffff, 0xa436, 0xA022, 0xa438, 0xffff,
+ 0xa436, 0xA020, 0xa438, 0xffff, 0xa436, 0xA006, 0xa438, 0xffff,
+ 0xa436, 0xA004, 0xa438, 0x16ab, 0xa436, 0xA002, 0xa438, 0x1663,
+ 0xa436, 0xA000, 0xa438, 0x1608, 0xa436, 0xA008, 0xa438, 0x0700,
+ 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012, 0xa438, 0x07f8,
+ 0xa436, 0xA014, 0xa438, 0xcc01, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa436, 0xA152, 0xa438, 0x021c, 0xa436, 0xA154,
+ 0xa438, 0x3fff, 0xa436, 0xA156, 0xa438, 0x3fff, 0xa436, 0xA158,
+ 0xa438, 0x3fff, 0xa436, 0xA15A, 0xa438, 0x3fff, 0xa436, 0xA15C,
+ 0xa438, 0x3fff, 0xa436, 0xA15E, 0xa438, 0x3fff, 0xa436, 0xA160,
+ 0xa438, 0x3fff, 0xa436, 0xA150, 0xa438, 0x0001, 0xa436, 0xA016,
+ 0xa438, 0x0010, 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014,
+ 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x8013,
+ 0xa438, 0x1800, 0xa438, 0x803a, 0xa438, 0x1800, 0xa438, 0x8045,
+ 0xa438, 0x1800, 0xa438, 0x8049, 0xa438, 0x1800, 0xa438, 0x804d,
+ 0xa438, 0x1800, 0xa438, 0x8059, 0xa438, 0x1800, 0xa438, 0x805d,
+ 0xa438, 0xc2ff, 0xa438, 0x1800, 0xa438, 0x0042, 0xa438, 0x1000,
+ 0xa438, 0x02e5, 0xa438, 0x1000, 0xa438, 0x02b4, 0xa438, 0xd701,
+ 0xa438, 0x40e3, 0xa438, 0xd700, 0xa438, 0x5f6c, 0xa438, 0x1000,
+ 0xa438, 0x8021, 0xa438, 0x1800, 0xa438, 0x0073, 0xa438, 0x1800,
+ 0xa438, 0x0084, 0xa438, 0xd701, 0xa438, 0x4061, 0xa438, 0xba0f,
+ 0xa438, 0xf004, 0xa438, 0x4060, 0xa438, 0x1000, 0xa438, 0x802a,
+ 0xa438, 0xba10, 0xa438, 0x0800, 0xa438, 0xd700, 0xa438, 0x60bb,
+ 0xa438, 0x611c, 0xa438, 0x0c0f, 0xa438, 0x1a01, 0xa438, 0xf00a,
+ 0xa438, 0x60fc, 0xa438, 0x0c0f, 0xa438, 0x1a02, 0xa438, 0xf006,
+ 0xa438, 0x0c0f, 0xa438, 0x1a04, 0xa438, 0xf003, 0xa438, 0x0c0f,
+ 0xa438, 0x1a08, 0xa438, 0x0800, 0xa438, 0x0c0f, 0xa438, 0x0504,
+ 0xa438, 0xad02, 0xa438, 0x1000, 0xa438, 0x02c0, 0xa438, 0xd700,
+ 0xa438, 0x5fac, 0xa438, 0x1000, 0xa438, 0x8021, 0xa438, 0x1800,
+ 0xa438, 0x0139, 0xa438, 0x9a1f, 0xa438, 0x8bf0, 0xa438, 0x1800,
+ 0xa438, 0x02df, 0xa438, 0x9a1f, 0xa438, 0x9910, 0xa438, 0x1800,
+ 0xa438, 0x02d7, 0xa438, 0xad02, 0xa438, 0x8d01, 0xa438, 0x9a1f,
+ 0xa438, 0x9910, 0xa438, 0x9860, 0xa438, 0xcb00, 0xa438, 0xd501,
+ 0xa438, 0xce01, 0xa438, 0x85f0, 0xa438, 0xd500, 0xa438, 0x1800,
+ 0xa438, 0x015c, 0xa438, 0x8580, 0xa438, 0x8d02, 0xa438, 0x1800,
+ 0xa438, 0x018f, 0xa438, 0x0c0f, 0xa438, 0x0503, 0xa438, 0xad02,
+ 0xa438, 0x1800, 0xa438, 0x00dd, 0xa436, 0xA08E, 0xa438, 0x00db,
+ 0xa436, 0xA08C, 0xa438, 0x018e, 0xa436, 0xA08A, 0xa438, 0x015a,
+ 0xa436, 0xA088, 0xa438, 0x02d6, 0xa436, 0xA086, 0xa438, 0x02de,
+ 0xa436, 0xA084, 0xa438, 0x0137, 0xa436, 0xA082, 0xa438, 0x0071,
+ 0xa436, 0xA080, 0xa438, 0x0041, 0xa436, 0xA090, 0xa438, 0x00ff,
+ 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x801d, 0xa438, 0x1800, 0xa438, 0x808a, 0xa438, 0x1800,
+ 0xa438, 0x80a1, 0xa438, 0x1800, 0xa438, 0x80b4, 0xa438, 0x1800,
+ 0xa438, 0x8104, 0xa438, 0x1800, 0xa438, 0x810b, 0xa438, 0x1800,
+ 0xa438, 0x810f, 0xa438, 0x8980, 0xa438, 0xd702, 0xa438, 0x6126,
+ 0xa438, 0xd704, 0xa438, 0x4063, 0xa438, 0xd702, 0xa438, 0x6060,
+ 0xa438, 0xd702, 0xa438, 0x6077, 0xa438, 0x1800, 0xa438, 0x0c29,
+ 0xa438, 0x1800, 0xa438, 0x0c2b, 0xa438, 0x1000, 0xa438, 0x115a,
+ 0xa438, 0xd71f, 0xa438, 0x5fb4, 0xa438, 0xd702, 0xa438, 0x6c46,
+ 0xa438, 0xd704, 0xa438, 0x4063, 0xa438, 0xd702, 0xa438, 0x6060,
+ 0xa438, 0xd702, 0xa438, 0x6b97, 0xa438, 0xa340, 0xa438, 0x0c06,
+ 0xa438, 0x0102, 0xa438, 0xce01, 0xa438, 0x1000, 0xa438, 0x117a,
+ 0xa438, 0xa240, 0xa438, 0xa902, 0xa438, 0xa204, 0xa438, 0xa280,
+ 0xa438, 0xa364, 0xa438, 0xab02, 0xa438, 0x8380, 0xa438, 0xa00a,
+ 0xa438, 0xcd8d, 0xa438, 0x1000, 0xa438, 0x115a, 0xa438, 0xd706,
+ 0xa438, 0x5fb5, 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x115a,
+ 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0x1000,
+ 0xa438, 0x115a, 0xa438, 0xd71f, 0xa438, 0x6065, 0xa438, 0x7c74,
+ 0xa438, 0xfffb, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x115a,
+ 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xa410,
+ 0xa438, 0x8902, 0xa438, 0xa120, 0xa438, 0xa380, 0xa438, 0xce02,
+ 0xa438, 0x1000, 0xa438, 0x117a, 0xa438, 0x8280, 0xa438, 0xa324,
+ 0xa438, 0xab02, 0xa438, 0xa00a, 0xa438, 0x8118, 0xa438, 0x863f,
+ 0xa438, 0x87fb, 0xa438, 0xcd8e, 0xa438, 0xd193, 0xa438, 0xd047,
+ 0xa438, 0x1000, 0xa438, 0x115a, 0xa438, 0x1000, 0xa438, 0x115f,
+ 0xa438, 0xd700, 0xa438, 0x5f7b, 0xa438, 0xa280, 0xa438, 0x1000,
+ 0xa438, 0x115a, 0xa438, 0x1000, 0xa438, 0x115f, 0xa438, 0xd706,
+ 0xa438, 0x5f78, 0xa438, 0xa210, 0xa438, 0xd700, 0xa438, 0x6083,
+ 0xa438, 0xd101, 0xa438, 0xd047, 0xa438, 0xf003, 0xa438, 0xd160,
+ 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x115a, 0xa438, 0x1000,
+ 0xa438, 0x115f, 0xa438, 0xd700, 0xa438, 0x5f7b, 0xa438, 0x1000,
+ 0xa438, 0x115a, 0xa438, 0x1000, 0xa438, 0x115f, 0xa438, 0xd706,
+ 0xa438, 0x5f79, 0xa438, 0x8120, 0xa438, 0xbb20, 0xa438, 0x1800,
+ 0xa438, 0x0c8b, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f80,
+ 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0c3c, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8f80, 0xa438, 0x9503, 0xa438, 0xd704,
+ 0xa438, 0x6192, 0xa438, 0xd702, 0xa438, 0x4116, 0xa438, 0xce04,
+ 0xa438, 0x1000, 0xa438, 0x117a, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8f40, 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0b3d,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xaf40, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x0b48, 0xa438, 0xd704, 0xa438, 0x6192,
+ 0xa438, 0xd702, 0xa438, 0x4116, 0xa438, 0xce04, 0xa438, 0x1000,
+ 0xa438, 0x117a, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f40,
+ 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x1269, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xaf40, 0xa438, 0x9503, 0xa438, 0x1800,
+ 0xa438, 0x1274, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa608,
+ 0xa438, 0xc700, 0xa438, 0x9503, 0xa438, 0xce54, 0xa438, 0x1000,
+ 0xa438, 0x117a, 0xa438, 0xa290, 0xa438, 0xa304, 0xa438, 0xab02,
+ 0xa438, 0xd700, 0xa438, 0x6050, 0xa438, 0xab04, 0xa438, 0x0c38,
+ 0xa438, 0x0608, 0xa438, 0xaa0b, 0xa438, 0xd702, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8d01, 0xa438, 0xae40, 0xa438, 0x4044,
+ 0xa438, 0x8e20, 0xa438, 0x9503, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8c20, 0xa438, 0x9503, 0xa438, 0xd700, 0xa438, 0x6078,
+ 0xa438, 0xd700, 0xa438, 0x609a, 0xa438, 0xd109, 0xa438, 0xd074,
+ 0xa438, 0xf003, 0xa438, 0xd109, 0xa438, 0xd075, 0xa438, 0x1000,
+ 0xa438, 0x115a, 0xa438, 0xd704, 0xa438, 0x6252, 0xa438, 0xd702,
+ 0xa438, 0x4116, 0xa438, 0xce54, 0xa438, 0x1000, 0xa438, 0x117a,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f40, 0xa438, 0x9503,
+ 0xa438, 0xa00a, 0xa438, 0xd704, 0xa438, 0x41e7, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa570, 0xa438, 0x9503, 0xa438, 0xf00a,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xaf40, 0xa438, 0x9503,
+ 0xa438, 0x800a, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8570,
+ 0xa438, 0x9503, 0xa438, 0xd704, 0xa438, 0x60f3, 0xa438, 0xd71f,
+ 0xa438, 0x60ee, 0xa438, 0xd700, 0xa438, 0x5bbe, 0xa438, 0x1800,
+ 0xa438, 0x0e71, 0xa438, 0x1800, 0xa438, 0x0e7c, 0xa438, 0x1800,
+ 0xa438, 0x0e7e, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xaf80,
+ 0xa438, 0x9503, 0xa438, 0xcd62, 0xa438, 0x1800, 0xa438, 0x0bd2,
+ 0xa438, 0x800a, 0xa438, 0x8306, 0xa438, 0x1800, 0xa438, 0x0cb6,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8608, 0xa438, 0x8c20,
+ 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x0eb9, 0xa436, 0xA10E,
+ 0xa438, 0x0eb5, 0xa436, 0xA10C, 0xa438, 0x0cb5, 0xa436, 0xA10A,
+ 0xa438, 0x0bd1, 0xa436, 0xA108, 0xa438, 0x0e37, 0xa436, 0xA106,
+ 0xa438, 0x1267, 0xa436, 0xA104, 0xa438, 0x0b3b, 0xa436, 0xA102,
+ 0xa438, 0x0c38, 0xa436, 0xA100, 0xa438, 0x0c24, 0xa436, 0xA110,
+ 0xa438, 0x00ff, 0xa436, 0xb87c, 0xa438, 0x85bf, 0xa436, 0xb87e,
+ 0xa438, 0xaf85, 0xa438, 0xd7af, 0xa438, 0x85fb, 0xa438, 0xaf86,
+ 0xa438, 0x10af, 0xa438, 0x8638, 0xa438, 0xaf86, 0xa438, 0x47af,
+ 0xa438, 0x8647, 0xa438, 0xaf86, 0xa438, 0x47af, 0xa438, 0x8647,
+ 0xa438, 0xbf85, 0xa438, 0xf802, 0xa438, 0x627f, 0xa438, 0xbf61,
+ 0xa438, 0xc702, 0xa438, 0x627f, 0xa438, 0xae0c, 0xa438, 0xbf85,
+ 0xa438, 0xf802, 0xa438, 0x6276, 0xa438, 0xbf61, 0xa438, 0xc702,
+ 0xa438, 0x6276, 0xa438, 0xee85, 0xa438, 0x4200, 0xa438, 0xaf1b,
+ 0xa438, 0x2333, 0xa438, 0xa484, 0xa438, 0xbf86, 0xa438, 0x0a02,
+ 0xa438, 0x627f, 0xa438, 0xbf86, 0xa438, 0x0d02, 0xa438, 0x627f,
+ 0xa438, 0xaf1b, 0xa438, 0x8422, 0xa438, 0xa484, 0xa438, 0x66ac,
+ 0xa438, 0x0ef8, 0xa438, 0xfbef, 0xa438, 0x79fb, 0xa438, 0xe080,
+ 0xa438, 0x16ad, 0xa438, 0x230f, 0xa438, 0xee85, 0xa438, 0x4200,
+ 0xa438, 0x1f44, 0xa438, 0xbf86, 0xa438, 0x30d7, 0xa438, 0x0008,
+ 0xa438, 0x0264, 0xa438, 0xa3ff, 0xa438, 0xef97, 0xa438, 0xfffc,
+ 0xa438, 0x0485, 0xa438, 0xf861, 0xa438, 0xc786, 0xa438, 0x0a86,
+ 0xa438, 0x0de1, 0xa438, 0x8feb, 0xa438, 0xe583, 0xa438, 0x20e1,
+ 0xa438, 0x8fea, 0xa438, 0xe583, 0xa438, 0x21af, 0xa438, 0x41a7,
+ 0xa436, 0xb85e, 0xa438, 0x1b05, 0xa436, 0xb860, 0xa438, 0x1b78,
+ 0xa436, 0xb862, 0xa438, 0x1a08, 0xa436, 0xb864, 0xa438, 0x419F,
+ 0xa436, 0xb886, 0xa438, 0xffff, 0xa436, 0xb888, 0xa438, 0xffff,
+ 0xa436, 0xb88a, 0xa438, 0xffff, 0xa436, 0xb88c, 0xa438, 0xffff,
+ 0xa436, 0xb838, 0xa438, 0x000f, 0xb820, 0x0010, 0xa436, 0x0000,
+ 0xa438, 0x0000, 0xB82E, 0x0000, 0xa436, 0x8023, 0xa438, 0x0000,
+ 0xa436, 0x801E, 0xa438, 0x0008, 0xB820, 0x0000, 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8125d_2_2[] = {
+ 0xa436, 0xacca, 0xa438, 0x0104, 0xa436, 0xaccc, 0xa438, 0x8000,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x0fff,
+ 0xa436, 0xacce, 0xa438, 0xfd47, 0xa436, 0xacd0, 0xa438, 0x0fff,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xe56f, 0xa436, 0xacd0, 0xa438, 0x01c0,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xed97, 0xa436, 0xacd0, 0xa438, 0x01c8,
+ 0xa436, 0xacce, 0xa438, 0xffff, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xf5bf, 0xa436, 0xacd0, 0xa438, 0x01d0,
+ 0xa436, 0xacce, 0xa438, 0xfb07, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb0f, 0xa436, 0xacd0, 0xa438, 0x01d8,
+ 0xa436, 0xacce, 0xa438, 0xa087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0xa00f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0xa807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0xa88f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0xb027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0xb02f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0xb847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0xb84f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0xfb17, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb1f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xa017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0xa01f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0xa837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0xa83f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0xb097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0xb05f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0xb857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0xb89f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0xfb27, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb2f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x8087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x800f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x8807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x888f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x9027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x902f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x9847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x984f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0xa0a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0xa8af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0xa067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0xa86f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb37, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb3f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x8017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x801f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x8837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x883f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x9097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x905f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x9857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x989f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0xb0b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0xb8bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0xb077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0xb87f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb47, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb4f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x6087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x600f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x6807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x688f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x7027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x702f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x7847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x784f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0x80a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x88af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x8067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x886f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb57, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb5f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x6017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x601f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x6837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x683f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x7097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x705f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x7857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x789f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0x90b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x98bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x9077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x987f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb67, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb6f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x4087, 0xa436, 0xacd0, 0xa438, 0x0180,
+ 0xa436, 0xacce, 0xa438, 0x400f, 0xa436, 0xacd0, 0xa438, 0x0108,
+ 0xa436, 0xacce, 0xa438, 0x4807, 0xa436, 0xacd0, 0xa438, 0x0100,
+ 0xa436, 0xacce, 0xa438, 0x488f, 0xa436, 0xacd0, 0xa438, 0x0188,
+ 0xa436, 0xacce, 0xa438, 0x5027, 0xa436, 0xacd0, 0xa438, 0x0120,
+ 0xa436, 0xacce, 0xa438, 0x502f, 0xa436, 0xacd0, 0xa438, 0x0128,
+ 0xa436, 0xacce, 0xa438, 0x5847, 0xa436, 0xacd0, 0xa438, 0x0140,
+ 0xa436, 0xacce, 0xa438, 0x584f, 0xa436, 0xacd0, 0xa438, 0x0148,
+ 0xa436, 0xacce, 0xa438, 0x60a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x68af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x6067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x686f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb77, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb7f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x4017, 0xa436, 0xacd0, 0xa438, 0x0110,
+ 0xa436, 0xacce, 0xa438, 0x401f, 0xa436, 0xacd0, 0xa438, 0x0118,
+ 0xa436, 0xacce, 0xa438, 0x4837, 0xa436, 0xacd0, 0xa438, 0x0130,
+ 0xa436, 0xacce, 0xa438, 0x483f, 0xa436, 0xacd0, 0xa438, 0x0138,
+ 0xa436, 0xacce, 0xa438, 0x5097, 0xa436, 0xacd0, 0xa438, 0x0190,
+ 0xa436, 0xacce, 0xa438, 0x505f, 0xa436, 0xacd0, 0xa438, 0x0158,
+ 0xa436, 0xacce, 0xa438, 0x5857, 0xa436, 0xacd0, 0xa438, 0x0150,
+ 0xa436, 0xacce, 0xa438, 0x589f, 0xa436, 0xacd0, 0xa438, 0x0198,
+ 0xa436, 0xacce, 0xa438, 0x70b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x78bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x7077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x787f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfb87, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb8f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x40a7, 0xa436, 0xacd0, 0xa438, 0x01a0,
+ 0xa436, 0xacce, 0xa438, 0x48af, 0xa436, 0xacd0, 0xa438, 0x01a8,
+ 0xa436, 0xacce, 0xa438, 0x4067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x486f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfb97, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfb9f, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x50b7, 0xa436, 0xacd0, 0xa438, 0x01b0,
+ 0xa436, 0xacce, 0xa438, 0x58bf, 0xa436, 0xacd0, 0xa438, 0x01b8,
+ 0xa436, 0xacce, 0xa438, 0x5077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x587f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfba7, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfbaf, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x2067, 0xa436, 0xacd0, 0xa438, 0x0161,
+ 0xa436, 0xacce, 0xa438, 0x286f, 0xa436, 0xacd0, 0xa438, 0x0169,
+ 0xa436, 0xacce, 0xa438, 0xfbb7, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0xfbbf, 0xa436, 0xacd0, 0xa438, 0x07ff,
+ 0xa436, 0xacce, 0xa438, 0x3077, 0xa436, 0xacd0, 0xa438, 0x0171,
+ 0xa436, 0xacce, 0xa438, 0x387f, 0xa436, 0xacd0, 0xa438, 0x0179,
+ 0xa436, 0xacce, 0xa438, 0xfff9, 0xa436, 0xacd0, 0xa438, 0x17ff,
+ 0xa436, 0xacce, 0xa438, 0xfff9, 0xa436, 0xacd0, 0xa438, 0x17ff,
+ 0xa436, 0xacca, 0xa438, 0x0004, 0xa436, 0xacc6, 0xa438, 0x0008,
0xa436, 0xacc8, 0xa438, 0xc000, 0xa436, 0xacc8, 0xa438, 0x0000,
- 0xFFFF, 0xFFFF
+ 0xB820, 0x0000, 0xFFFF, 0xFFFF
};
static void
@@ -594,6 +1361,20 @@ rtl_real_set_phy_mcu_8125d_1_3(struct rtl_hw *hw)
ARRAY_SIZE(phy_mcu_ram_code_8125d_1_3));
}
+static void
+rtl_real_set_phy_mcu_8125d_2_1(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_ram_code(hw, phy_mcu_ram_code_8125d_2_1,
+ ARRAY_SIZE(phy_mcu_ram_code_8125d_2_1));
+}
+
+static void
+rtl_real_set_phy_mcu_8125d_2_2(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_ram_code(hw, phy_mcu_ram_code_8125d_2_2,
+ ARRAY_SIZE(phy_mcu_ram_code_8125d_2_2));
+}
+
void
rtl_set_phy_mcu_8125d_1(struct rtl_hw *hw)
{
@@ -615,3 +1396,19 @@ rtl_set_phy_mcu_8125d_1(struct rtl_hw *hw)
rtl_clear_phy_mcu_patch_request(hw);
}
+
+void
+rtl_set_phy_mcu_8125d_2(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_real_set_phy_mcu_8125d_2_1(hw);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_real_set_phy_mcu_8125d_2_2(hw);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
diff --git a/drivers/net/r8169/base/rtl8125d_mcu.h b/drivers/net/r8169/base/rtl8125d_mcu.h
index ac7096ad2d..82b70e5b53 100644
--- a/drivers/net/r8169/base/rtl8125d_mcu.h
+++ b/drivers/net/r8169/base/rtl8125d_mcu.h
@@ -9,5 +9,6 @@ void rtl_set_mac_mcu_8125d_1(struct rtl_hw *hw);
void rtl_set_mac_mcu_8125d_2(struct rtl_hw *hw);
void rtl_set_phy_mcu_8125d_1(struct rtl_hw *hw);
+void rtl_set_phy_mcu_8125d_2(struct rtl_hw *hw);
#endif /* RTL8125D_MCU_H */
diff --git a/drivers/net/r8169/base/rtl8126a.c b/drivers/net/r8169/base/rtl8126a.c
index 84354b6d32..cd6ac5e4e9 100644
--- a/drivers/net/r8169/base/rtl8126a.c
+++ b/drivers/net/r8169/base/rtl8126a.c
@@ -41,8 +41,6 @@ static void
rtl_hw_phy_config_8126a_1(struct rtl_hw *hw)
{
rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
-
- RTL_W16(hw, EEE_TXIDLE_TIMER_8125, hw->mtu + RTE_ETHER_HDR_LEN + 0x20);
}
static void
@@ -50,8 +48,6 @@ rtl_hw_phy_config_8126a_2(struct rtl_hw *hw)
{
rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
- RTL_W16(hw, EEE_TXIDLE_TIMER_8125, hw->mtu + RTE_ETHER_HDR_LEN + 0x20);
-
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x80BF);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xED00);
@@ -333,8 +329,6 @@ rtl_hw_phy_config_8126a_3(struct rtl_hw *hw)
{
rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
- RTL_W16(hw, EEE_TXIDLE_TIMER_8125, hw->mtu + RTE_ETHER_HDR_LEN + 0x20);
-
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8183);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x5900);
rtl_set_eth_phy_ocp_bit(hw, 0xA654, BIT_11);
@@ -470,7 +464,7 @@ rtl_hw_phy_config_8126a_3(struct rtl_hw *hw)
rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0001);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x03F1);
- rtl_set_eth_phy_ocp_bit(hw, 0xA430, (BIT_1 | BIT_0));
+ rtl_set_eth_phy_ocp_bit(hw, 0xA430, BIT_1 | BIT_0);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB54C, 0xFFC0, 0x3700);
}
diff --git a/drivers/net/r8169/base/rtl8126a_mcu.c b/drivers/net/r8169/base/rtl8126a_mcu.c
index df27cd0331..ba8112d723 100644
--- a/drivers/net/r8169/base/rtl8126a_mcu.c
+++ b/drivers/net/r8169/base/rtl8126a_mcu.c
@@ -40,13 +40,83 @@ rtl_set_mac_mcu_8126a_1(struct rtl_hw *hw)
void
rtl_set_mac_mcu_8126a_2(struct rtl_hw *hw)
{
+ static const u16 mcu_patch_code[] = {
+ 0xE010, 0xE02C, 0xE04E, 0xE0A4, 0xE0A8, 0xE0AB, 0xE0AE, 0xE0B1, 0xE0B3,
+ 0xE0B5, 0xE0B7, 0xE0B9, 0xE0BB, 0xE0BD, 0xE0BF, 0xE0C1, 0xC716, 0xC616,
+ 0x9EE0, 0xC616, 0x65C0, 0x1500, 0xF009, 0xC714, 0x66E0, 0x41B5, 0x8EE0,
+ 0xC611, 0x75C0, 0x4858, 0x9DC0, 0xC707, 0xC608, 0x9EE0, 0xC608, 0xC502,
+ 0xBD00, 0x0100, 0xE86C, 0xE000, 0xA000, 0xB404, 0xB430, 0xC070, 0xE926,
+ 0xC2FE, 0x400A, 0xF11A, 0x63A4, 0x1A00, 0x49B0, 0xF002, 0x4820, 0x49B1,
+ 0xF002, 0x4821, 0x49B2, 0xF002, 0x4822, 0x49B3, 0xF002, 0x4823, 0xC411,
+ 0x6380, 0x48B0, 0x8B80, 0x6320, 0x41DA, 0x8B20, 0x6380, 0x4830, 0x8B80,
+ 0xE003, 0x73A4, 0x9B20, 0xC302, 0xBB00, 0x4A18, 0xC070, 0xE022, 0xC054,
+ 0x7102, 0x4992, 0xF149, 0x4893, 0x9902, 0x1B1F, 0xC74E, 0x72E0, 0x2521,
+ 0x48A5, 0x0B01, 0x1C4F, 0x9C00, 0x2121, 0x1D01, 0x41AA, 0x2521, 0x9DE0,
+ 0x4856, 0x9DE0, 0x1CCF, 0xE839, 0x48D6, 0x9DE0, 0x7102, 0x4996, 0xF1FE,
+ 0x4814, 0x9902, 0x1CFF, 0x0C01, 0x1400, 0xF00C, 0x7102, 0x4996, 0xF0FB,
+ 0x7102, 0x4990, 0xF0FE, 0x1C1F, 0xE826, 0x7102, 0x4992, 0xF004, 0x4813,
+ 0x9902, 0xE01D, 0x1300, 0xF104, 0x4817, 0x9902, 0xE018, 0x4894, 0x9902,
+ 0x4995, 0xF00B, 0x121F, 0xF0F3, 0x131E, 0xF003, 0x4998, 0xF0EF, 0x0201,
+ 0x4818, 0x9902, 0xE7C9, 0x1200, 0xF0E9, 0x4998, 0xF002, 0x1B01, 0x0A01,
+ 0x4898, 0x9902, 0xE7C0, 0xC00A, 0xC606, 0xBE00, 0x0C01, 0x1400, 0xF1FE,
+ 0xFF80, 0x2362, 0xD456, 0xD404, 0xE400, 0x4166, 0x9CF6, 0xC002, 0xB800,
+ 0x14A6, 0x49D1, 0xC602, 0xBE00, 0x4160, 0x49D1, 0xC602, 0xBE00, 0x41E6,
+ 0x49D1, 0xC602, 0xBE00, 0x4282, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0x6847, 0x0A18, 0x0C02, 0x0B30
+ };
+
rtl_hw_disable_mac_mcu_bps(hw);
+
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x2360);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x14A4);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x415E);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x41E4);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x4280);
+
+ rtl_mac_ocp_write(hw, 0xFC48, 0x007C);
}
void
rtl_set_mac_mcu_8126a_3(struct rtl_hw *hw)
{
+ static const u16 mcu_patch_code[] = {
+ 0xE010, 0xE02C, 0xE04E, 0xE052, 0xE055, 0xE058, 0xE05B, 0xE05D, 0xE05F,
+ 0xE061, 0xE063, 0xE065, 0xE067, 0xE069, 0xE06B, 0xE06D, 0xC716, 0xC616,
+ 0x9EE0, 0xC616, 0x65C0, 0x1500, 0xF009, 0xC714, 0x66E0, 0x41B5, 0x8EE0,
+ 0xC611, 0x75C0, 0x4858, 0x9DC0, 0xC707, 0xC608, 0x9EE0, 0xC608, 0xC502,
+ 0xBD00, 0x0100, 0xE86C, 0xE000, 0xA000, 0xB404, 0xB430, 0xC070, 0xE926,
+ 0xC2FE, 0x400A, 0xF11A, 0x63A4, 0x1A00, 0x49B0, 0xF002, 0x4820, 0x49B1,
+ 0xF002, 0x4821, 0x49B2, 0xF002, 0x4822, 0x49B3, 0xF002, 0x4823, 0xC411,
+ 0x6380, 0x48B0, 0x8B80, 0x6320, 0x41DA, 0x8B20, 0x6380, 0x4830, 0x8B80,
+ 0xE003, 0x73A4, 0x9B20, 0xC302, 0xBB00, 0x55E2, 0xC070, 0xE022, 0x4166,
+ 0x9CF6, 0xC602, 0xBE00, 0x14A6, 0x49D1, 0xC602, 0xBE00, 0x4178, 0x49D1,
+ 0xC602, 0xBE00, 0x41FE, 0x49D1, 0xC602, 0xBE00, 0x429A, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0x6847, 0x0B18, 0x0C02, 0x0D10
+ };
+
rtl_hw_disable_mac_mcu_bps(hw);
+
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x14A4);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x4176);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x41FC);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x4298);
+
+ rtl_mac_ocp_write(hw, 0xFC48, 0x003C);
}
/* ------------------------------------PHY 8126A------------------------------------- */
@@ -2418,87 +2488,193 @@ static const u16 phy_mcu_ram_code_8126a_3_1[] = {
0xa438, 0x907f, 0xa438, 0x91a3, 0xa438, 0x9306, 0xa438, 0xb118,
0xa438, 0x1800, 0xa438, 0x2147, 0xa438, 0x907f, 0xa438, 0x9209,
0xa438, 0x91a3, 0xa438, 0x9306, 0xa438, 0xb118, 0xa438, 0x1800,
- 0xa438, 0x203c, 0xa436, 0xA026, 0xa438, 0xffff, 0xa436, 0xA024,
- 0xa438, 0x2033, 0xa436, 0xA022, 0xa438, 0x213f, 0xa436, 0xA020,
- 0xa438, 0x144c, 0xa436, 0xA006, 0xa438, 0x1b98, 0xa436, 0xA004,
- 0xa438, 0x138b, 0xa436, 0xA002, 0xa438, 0x10c4, 0xa436, 0xA000,
- 0xa438, 0x1079, 0xa436, 0xA008, 0xa438, 0x7f00, 0xa436, 0xA016,
- 0xa438, 0x0000, 0xa436, 0xA012, 0xa438, 0x0ff8, 0xa436, 0xA014,
- 0xa438, 0xd04d, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x203c, 0xa438, 0xd707, 0xa438, 0x4121, 0xa438, 0xd706,
+ 0xa438, 0x40fc, 0xa438, 0xd70a, 0xa438, 0x40b5, 0xa438, 0xd028,
+ 0xa438, 0xd1c1, 0xa438, 0x1800, 0xa438, 0x8057, 0xa438, 0xd07b,
+ 0xa438, 0xd1c5, 0xa438, 0xd503, 0xa438, 0xa108, 0xa438, 0xd505,
+ 0xa438, 0x8103, 0xa438, 0xd504, 0xa438, 0xa002, 0xa438, 0xa302,
+ 0xa438, 0xd707, 0xa438, 0x4061, 0xa438, 0xd503, 0xa438, 0x8b01,
+ 0xa438, 0xd500, 0xa438, 0xc48a, 0xa438, 0xd503, 0xa438, 0xcc09,
+ 0xa438, 0xcd58, 0xa438, 0xaf01, 0xa438, 0xd500, 0xa438, 0xbe10,
+ 0xa438, 0x1000, 0xa438, 0x1739, 0xa438, 0xd719, 0xa438, 0x606c,
+ 0xa438, 0xd704, 0xa438, 0x645c, 0xa438, 0xd75e, 0xa438, 0x604d,
+ 0xa438, 0xfff8, 0xa438, 0x9e10, 0xa438, 0x1000, 0xa438, 0x1739,
+ 0xa438, 0xd719, 0xa438, 0x606c, 0xa438, 0xd704, 0xa438, 0x631c,
+ 0xa438, 0xd75e, 0xa438, 0x404d, 0xa438, 0xfff8, 0xa438, 0xd504,
+ 0xa438, 0xaa18, 0xa438, 0xa001, 0xa438, 0xa1e0, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1739, 0xa438, 0xd719, 0xa438, 0x7fac,
+ 0xa438, 0xd504, 0xa438, 0xa001, 0xa438, 0xd500, 0xa438, 0x1000,
+ 0xa438, 0x1739, 0xa438, 0xd704, 0xa438, 0x5f5c, 0xa438, 0xd719,
+ 0xa438, 0x3aaf, 0xa438, 0x8091, 0xa438, 0xf016, 0xa438, 0xd707,
+ 0xa438, 0x6121, 0xa438, 0x1000, 0xa438, 0x16d8, 0xa438, 0xd503,
+ 0xa438, 0xcd59, 0xa438, 0xaf01, 0xa438, 0xd500, 0xa438, 0x1800,
+ 0xa438, 0x0ddc, 0xa438, 0xd503, 0xa438, 0x8040, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x16d8, 0xa438, 0xd503, 0xa438, 0xcd5a,
+ 0xa438, 0xaf01, 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x0dbf,
+ 0xa438, 0xd504, 0xa438, 0xa008, 0xa438, 0xa204, 0xa438, 0xd500,
+ 0xa438, 0x1000, 0xa438, 0x1739, 0xa438, 0xd701, 0xa438, 0x5fa0,
+ 0xa438, 0xd503, 0xa438, 0xa082, 0xa438, 0xd500, 0xa438, 0xd71e,
+ 0xa438, 0x4097, 0xa438, 0xd078, 0xa438, 0xd1aa, 0xa438, 0xf003,
+ 0xa438, 0xd078, 0xa438, 0xd1aa, 0xa438, 0xd707, 0xa438, 0x40c1,
+ 0xa438, 0xd706, 0xa438, 0x409c, 0xa438, 0xd70a, 0xa438, 0x4055,
+ 0xa438, 0xf010, 0xa438, 0xd706, 0xa438, 0x6065, 0xa438, 0xcc89,
+ 0xa438, 0xf002, 0xa438, 0xcc8b, 0xa438, 0x1000, 0xa438, 0x0b7b,
+ 0xa438, 0xd705, 0xa438, 0x2ad0, 0xa438, 0x80ca, 0xa438, 0xf003,
+ 0xa438, 0x1000, 0xa438, 0x0b81, 0xa438, 0x1000, 0xa438, 0x0b87,
+ 0xa438, 0x1000, 0xa438, 0x0c53, 0xa438, 0x1800, 0xa438, 0x12d7,
+ 0xa436, 0xA026, 0xa438, 0x125d, 0xa436, 0xA024, 0xa438, 0x2033,
+ 0xa436, 0xA022, 0xa438, 0x213f, 0xa436, 0xA020, 0xa438, 0x144c,
+ 0xa436, 0xA006, 0xa438, 0x1b98, 0xa436, 0xA004, 0xa438, 0x138b,
+ 0xa436, 0xA002, 0xa438, 0x10c4, 0xa436, 0xA000, 0xa438, 0x1079,
+ 0xa436, 0xA008, 0xa438, 0xff00, 0xa436, 0xA016, 0xa438, 0x0000,
+ 0xa436, 0xA012, 0xa438, 0x0ff8, 0xa436, 0xA014, 0xa438, 0xd04d,
0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
- 0xa436, 0xA152, 0xa438, 0x12dc, 0xa436, 0xA154, 0xa438, 0x3fff,
- 0xa436, 0xA156, 0xa438, 0x3fff, 0xa436, 0xA158, 0xa438, 0x3fff,
- 0xa436, 0xA15A, 0xa438, 0x3fff, 0xa436, 0xA15C, 0xa438, 0x3fff,
- 0xa436, 0xA15E, 0xa438, 0x3fff, 0xa436, 0xA160, 0xa438, 0x3fff,
- 0xa436, 0xA150, 0xa438, 0x0001, 0xa436, 0xA016, 0xa438, 0x0020,
- 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800,
- 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800,
- 0xa438, 0x8022, 0xa438, 0x1800, 0xa438, 0x8112, 0xa438, 0x1800,
- 0xa438, 0x8206, 0xa438, 0x1800, 0xa438, 0x8433, 0xa438, 0x1800,
- 0xa438, 0x84ed, 0xa438, 0x1800, 0xa438, 0x8583, 0xa438, 0xd706,
- 0xa438, 0x60a9, 0xa438, 0xd700, 0xa438, 0x60a1, 0xa438, 0x1800,
- 0xa438, 0x0962, 0xa438, 0x1800, 0xa438, 0x0962, 0xa438, 0x1800,
- 0xa438, 0x0982, 0xa438, 0x800a, 0xa438, 0x0c1f, 0xa438, 0x0d00,
- 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1800,
- 0xa438, 0x0f99, 0xa438, 0xd70d, 0xa438, 0x40fd, 0xa438, 0xd702,
- 0xa438, 0x40a0, 0xa438, 0xd70c, 0xa438, 0x4066, 0xa438, 0x8710,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA152,
+ 0xa438, 0x12dc, 0xa436, 0xA154, 0xa438, 0x3fff, 0xa436, 0xA156,
+ 0xa438, 0x3fff, 0xa436, 0xA158, 0xa438, 0x3fff, 0xa436, 0xA15A,
+ 0xa438, 0x3fff, 0xa436, 0xA15C, 0xa438, 0x3fff, 0xa436, 0xA15E,
+ 0xa438, 0x3fff, 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150,
+ 0xa438, 0x0001, 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x8022,
+ 0xa438, 0x1800, 0xa438, 0x8233, 0xa438, 0x1800, 0xa438, 0x8332,
+ 0xa438, 0x1800, 0xa438, 0x855f, 0xa438, 0x1800, 0xa438, 0x8619,
+ 0xa438, 0x1800, 0xa438, 0x86af, 0xa438, 0xd706, 0xa438, 0x60a9,
+ 0xa438, 0xd700, 0xa438, 0x60a1, 0xa438, 0x1800, 0xa438, 0x0962,
+ 0xa438, 0x1800, 0xa438, 0x0962, 0xa438, 0x1800, 0xa438, 0x0982,
+ 0xa438, 0x800a, 0xa438, 0x0c1f, 0xa438, 0x0d00, 0xa438, 0x8dc0,
+ 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1800, 0xa438, 0x0f99,
+ 0xa438, 0xd702, 0xa438, 0x6201, 0xa438, 0xd702, 0xa438, 0x40a0,
+ 0xa438, 0xd70d, 0xa438, 0x419d, 0xa438, 0x1800, 0xa438, 0x802c,
+ 0xa438, 0xd701, 0xa438, 0x611a, 0xa438, 0x8710, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8280, 0xa438, 0x8780, 0xa438, 0x9503,
0xa438, 0xf002, 0xa438, 0xa710, 0xa438, 0x9580, 0xa438, 0x0c03,
0xa438, 0x1502, 0xa438, 0xa304, 0xa438, 0x9503, 0xa438, 0x0c1f,
0xa438, 0x0d07, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5,
- 0xa438, 0xcb81, 0xa438, 0xd70c, 0xa438, 0x4882, 0xa438, 0xd706,
- 0xa438, 0x407a, 0xa438, 0xd70c, 0xa438, 0x4807, 0xa438, 0xd706,
+ 0xa438, 0xcb81, 0xa438, 0xd70c, 0xa438, 0x48e2, 0xa438, 0xd706,
+ 0xa438, 0x407a, 0xa438, 0xd70c, 0xa438, 0x4867, 0xa438, 0xd706,
0xa438, 0x405a, 0xa438, 0x8910, 0xa438, 0xa210, 0xa438, 0xd704,
0xa438, 0x611c, 0xa438, 0x0cc0, 0xa438, 0x0080, 0xa438, 0x0c03,
0xa438, 0x0101, 0xa438, 0x0ce0, 0xa438, 0x03a0, 0xa438, 0xccb5,
0xa438, 0x0cc0, 0xa438, 0x0080, 0xa438, 0x0c03, 0xa438, 0x0102,
0xa438, 0x0ce0, 0xa438, 0x0340, 0xa438, 0xcc52, 0xa438, 0xd706,
- 0xa438, 0x42ba, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f,
+ 0xa438, 0x42da, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f,
0xa438, 0x0f1c, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502,
0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0x8190, 0xa438, 0x8204,
- 0xa438, 0xf016, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f,
- 0xa438, 0x0f1b, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0xd70c, 0xa438, 0x6047,
- 0xa438, 0xf002, 0xa438, 0xf00c, 0xa438, 0xd403, 0xa438, 0xcb82,
- 0xa438, 0x1000, 0xa438, 0x1203, 0xa438, 0xd40a, 0xa438, 0x1000,
- 0xa438, 0x1203, 0xa438, 0xd70c, 0xa438, 0x4247, 0xa438, 0x1000,
- 0xa438, 0x131d, 0xa438, 0x8a40, 0xa438, 0x1000, 0xa438, 0x120e,
- 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8104,
- 0xa438, 0x1000, 0xa438, 0x1217, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa704, 0xa438, 0x9503, 0xa438, 0xcb88, 0xa438, 0xf012,
+ 0xa438, 0x1800, 0xa438, 0x8087, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x0c1f, 0xa438, 0x0f1b, 0xa438, 0x9503, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0xd70c,
+ 0xa438, 0x6067, 0xa438, 0x1800, 0xa438, 0x8087, 0xa438, 0x1800,
+ 0xa438, 0x8092, 0xa438, 0xd403, 0xa438, 0x1000, 0xa438, 0x1203,
+ 0xa438, 0xcb82, 0xa438, 0xd40a, 0xa438, 0x1000, 0xa438, 0x1203,
+ 0xa438, 0xd70c, 0xa438, 0x4267, 0xa438, 0x1000, 0xa438, 0x131d,
+ 0xa438, 0x8a40, 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa104,
+ 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8104, 0xa438, 0x1000,
+ 0xa438, 0x1217, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa704,
+ 0xa438, 0x9503, 0xa438, 0xcb88, 0xa438, 0x1800, 0xa438, 0x81b7,
+ 0xa438, 0xd702, 0xa438, 0x6161, 0xa438, 0xd702, 0xa438, 0x40a0,
+ 0xa438, 0xd70d, 0xa438, 0x40fd, 0xa438, 0x1800, 0xa438, 0x80b0,
+ 0xa438, 0xd701, 0xa438, 0x607a, 0xa438, 0x1800, 0xa438, 0x80b0,
+ 0xa438, 0x1800, 0xa438, 0x81a6, 0xa438, 0xa210, 0xa438, 0x8a10,
+ 0xa438, 0xd706, 0xa438, 0x643e, 0xa438, 0x0c1f, 0xa438, 0x0d04,
+ 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x0cc0,
+ 0xa438, 0x0040, 0xa438, 0x0c03, 0xa438, 0x0102, 0xa438, 0x0ce0,
+ 0xa438, 0x03e0, 0xa438, 0xccce, 0xa438, 0xa00a, 0xa438, 0xa280,
+ 0xa438, 0xd110, 0xa438, 0xd04c, 0xa438, 0xcba0, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x8710,
+ 0xa438, 0xaa0f, 0xa438, 0xa130, 0xa438, 0xaa2f, 0xa438, 0xa2d5,
+ 0xa438, 0xa405, 0xa438, 0xa720, 0xa438, 0xa00a, 0xa438, 0xcba1,
+ 0xa438, 0x1800, 0xa438, 0x80fa, 0xa438, 0xd704, 0xa438, 0x3cf1,
+ 0xa438, 0x80db, 0xa438, 0x0c1f, 0xa438, 0x0d02, 0xa438, 0x1800,
+ 0xa438, 0x80dd, 0xa438, 0x0c1f, 0xa438, 0x0d01, 0xa438, 0x0cc0,
+ 0xa438, 0x0d40, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x8710,
+ 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa108, 0xa438, 0x1000,
+ 0xa438, 0x1220, 0xa438, 0x8108, 0xa438, 0xa203, 0xa438, 0x8a2f,
+ 0xa438, 0xa130, 0xa438, 0x8204, 0xa438, 0xa140, 0xa438, 0x1000,
+ 0xa438, 0x1220, 0xa438, 0x8140, 0xa438, 0x1000, 0xa438, 0x1217,
+ 0xa438, 0xcba2, 0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xa204,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fa7,
+ 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
+ 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd71f, 0xa438, 0x6145, 0xa438, 0x6074, 0xa438, 0x1800,
+ 0xa438, 0x8104, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
+ 0xa438, 0x5fa7, 0xa438, 0x1800, 0xa438, 0x80fe, 0xa438, 0xb820,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x7fa5,
+ 0xa438, 0x9820, 0xa438, 0x9b01, 0xa438, 0xd402, 0xa438, 0x1000,
+ 0xa438, 0x1203, 0xa438, 0xd701, 0xa438, 0x33b1, 0xa438, 0x8124,
+ 0xa438, 0xd701, 0xa438, 0x60b5, 0xa438, 0xd706, 0xa438, 0x6069,
+ 0xa438, 0x1800, 0xa438, 0x8126, 0xa438, 0x1800, 0xa438, 0x8196,
+ 0xa438, 0xd70c, 0xa438, 0x40ab, 0xa438, 0x800a, 0xa438, 0x8110,
+ 0xa438, 0x8284, 0xa438, 0x8404, 0xa438, 0xa710, 0xa438, 0x8120,
+ 0xa438, 0x8241, 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa104,
+ 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8104, 0xa438, 0x1000,
+ 0xa438, 0x1217, 0xa438, 0xaa2f, 0xa438, 0xcba3, 0xa438, 0xd70c,
+ 0xa438, 0x438b, 0xa438, 0xa284, 0xa438, 0xd078, 0xa438, 0x800a,
+ 0xa438, 0x8110, 0xa438, 0xa284, 0xa438, 0x8404, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa108, 0xa438, 0x9503, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x0c1f, 0xa438, 0x0f19, 0xa438, 0x9503,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd70c, 0xa438, 0x5fb3,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f1f, 0xa438, 0x9503,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd70c, 0xa438, 0x7f33,
+ 0xa438, 0x0c1f, 0xa438, 0x0d07, 0xa438, 0x8dc0, 0xa438, 0x1000,
+ 0xa438, 0x12b5, 0xa438, 0x8110, 0xa438, 0xa284, 0xa438, 0xa404,
+ 0xa438, 0xa00a, 0xa438, 0xcba4, 0xa438, 0xd70c, 0xa438, 0x40a1,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xad10, 0xa438, 0x9503,
+ 0xa438, 0xd70c, 0xa438, 0x414b, 0xa438, 0x0cc0, 0xa438, 0x0080,
+ 0xa438, 0x0c03, 0xa438, 0x0102, 0xa438, 0x0ce0, 0xa438, 0x0340,
+ 0xa438, 0xcc52, 0xa438, 0x1800, 0xa438, 0x8175, 0xa438, 0x80c0,
+ 0xa438, 0x8103, 0xa438, 0x83e0, 0xa438, 0x8cff, 0xa438, 0x60ba,
+ 0xa438, 0xd110, 0xa438, 0xd041, 0xa438, 0x1800, 0xa438, 0x817c,
+ 0xa438, 0xd193, 0xa438, 0xd047, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xa110, 0xa438, 0xcba5,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5faa,
+ 0xa438, 0xa180, 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa402,
+ 0xa438, 0xcba6, 0xa438, 0x60ba, 0xa438, 0xd1f5, 0xa438, 0xd045,
+ 0xa438, 0x1800, 0xa438, 0x8192, 0xa438, 0xd1f5, 0xa438, 0xd049,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4,
+ 0xa438, 0x8710, 0xa438, 0xa00a, 0xa438, 0xa190, 0xa438, 0xa204,
+ 0xa438, 0xa280, 0xa438, 0xa404, 0xa438, 0xcba7, 0xa438, 0xbb80,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x5fb4,
+ 0xa438, 0xb920, 0xa438, 0x9b80, 0xa438, 0x1800, 0xa438, 0x81e5,
0xa438, 0xa210, 0xa438, 0xa00a, 0xa438, 0xaa40, 0xa438, 0x1000,
0xa438, 0x120e, 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x1220,
0xa438, 0x8104, 0xa438, 0x1000, 0xa438, 0x1217, 0xa438, 0xa190,
0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0x8a10, 0xa438, 0x8a80,
0xa438, 0xcb84, 0xa438, 0xd13e, 0xa438, 0xd05a, 0xa438, 0xd13e,
0xa438, 0xd06b, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x3559, 0xa438, 0x80b0, 0xa438, 0xfffb, 0xa438, 0xd700,
- 0xa438, 0x604b, 0xa438, 0xcb8a, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd700, 0xa438, 0x3659, 0xa438, 0x80b9, 0xa438, 0xfffb,
- 0xa438, 0xd700, 0xa438, 0x606b, 0xa438, 0xcb8b, 0xa438, 0x5eeb,
- 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xcb8c,
- 0xa438, 0xd706, 0xa438, 0x609a, 0xa438, 0xd1b7, 0xa438, 0xd049,
- 0xa438, 0xf003, 0xa438, 0xd160, 0xa438, 0xd04b, 0xa438, 0x1000,
- 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb8d,
- 0xa438, 0x8710, 0xa438, 0xd71f, 0xa438, 0x5fd4, 0xa438, 0xb920,
- 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x7fb4,
- 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
- 0xa438, 0x6105, 0xa438, 0x6054, 0xa438, 0xfffb, 0xa438, 0x1000,
- 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fab, 0xa438, 0xfff0,
- 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xd114,
- 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x5fba, 0xa438, 0xd704, 0xa438, 0x5f76, 0xa438, 0xd700,
- 0xa438, 0x5f34, 0xa438, 0xd700, 0xa438, 0x6081, 0xa438, 0xd706,
- 0xa438, 0x405a, 0xa438, 0xa480, 0xa438, 0xcb86, 0xa438, 0xd706,
- 0xa438, 0x609a, 0xa438, 0xd1c8, 0xa438, 0xd045, 0xa438, 0xf003,
+ 0xa438, 0x3559, 0xa438, 0x81c2, 0xa438, 0x1800, 0xa438, 0x81bb,
+ 0xa438, 0xd700, 0xa438, 0x604b, 0xa438, 0xcb8a, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x3659, 0xa438, 0x81cc,
+ 0xa438, 0x1800, 0xa438, 0x81c5, 0xa438, 0xd700, 0xa438, 0x606b,
+ 0xa438, 0xcb8b, 0xa438, 0x5ecb, 0xa438, 0xd700, 0xa438, 0x6041,
+ 0xa438, 0xa402, 0xa438, 0xcb8c, 0xa438, 0xd706, 0xa438, 0x60ba,
+ 0xa438, 0xd179, 0xa438, 0xd049, 0xa438, 0x1800, 0xa438, 0x81dc,
+ 0xa438, 0xd160, 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb8d, 0xa438, 0x8710,
+ 0xa438, 0xd71f, 0xa438, 0x5fd4, 0xa438, 0xb920, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x6145,
+ 0xa438, 0x6074, 0xa438, 0x1800, 0xa438, 0x81ea, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fab, 0xa438, 0x1800,
+ 0xa438, 0x81e4, 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820,
+ 0xa438, 0xd114, 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fba, 0xa438, 0xd704, 0xa438, 0x5f76,
+ 0xa438, 0xd700, 0xa438, 0x5f34, 0xa438, 0xd700, 0xa438, 0x6081,
+ 0xa438, 0xd706, 0xa438, 0x405a, 0xa438, 0xa480, 0xa438, 0xcb86,
+ 0xa438, 0xd706, 0xa438, 0x60fa, 0xa438, 0xd700, 0xa438, 0x60e1,
+ 0xa438, 0xd1c8, 0xa438, 0xd045, 0xa438, 0x1800, 0xa438, 0x8218,
0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x126b,
0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x0cc0, 0xa438, 0x0000,
0xa438, 0x0c03, 0xa438, 0x0101, 0xa438, 0x0ce0, 0xa438, 0x0320,
- 0xa438, 0xcc29, 0xa438, 0xa208, 0xa438, 0x8204, 0xa438, 0xd114,
+ 0xa438, 0xcc29, 0xa438, 0xa208, 0xa438, 0x8204, 0xa438, 0xd704,
+ 0xa438, 0x40f5, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa280,
+ 0xa438, 0x8780, 0xa438, 0x9503, 0xa438, 0x8e04, 0xa438, 0xd114,
0xa438, 0xd040, 0xa438, 0xd700, 0xa438, 0x5ff4, 0xa438, 0x1800,
0xa438, 0x0c3e, 0xa438, 0xd706, 0xa438, 0x609d, 0xa438, 0xd417,
0xa438, 0x1000, 0xa438, 0x1203, 0xa438, 0x1000, 0xa438, 0x126b,
@@ -2512,319 +2688,323 @@ static const u16 phy_mcu_ram_code_8126a_3_1[] = {
0xa438, 0xa404, 0xa438, 0x800a, 0xa438, 0x8718, 0xa438, 0x9b10,
0xa438, 0x9b20, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
0xa438, 0x7fb5, 0xa438, 0xcb51, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd71f, 0xa438, 0x5f94, 0xa438, 0xd706, 0xa438, 0x6089,
- 0xa438, 0xd141, 0xa438, 0xd043, 0xa438, 0xf003, 0xa438, 0xd141,
- 0xa438, 0xd044, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x60e5, 0xa438, 0xd704,
- 0xa438, 0x60be, 0xa438, 0xd706, 0xa438, 0x29b1, 0xa438, 0x8156,
- 0xa438, 0xf002, 0xa438, 0xa880, 0xa438, 0xa00a, 0xa438, 0xa190,
- 0xa438, 0x8220, 0xa438, 0xa280, 0xa438, 0xa404, 0xa438, 0xa620,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc5aa, 0xa438, 0x9503,
- 0xa438, 0xd700, 0xa438, 0x6061, 0xa438, 0xa402, 0xa438, 0xa480,
- 0xa438, 0xcb52, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x5fba, 0xa438, 0xd704, 0xa438, 0x5f76, 0xa438, 0xb920,
- 0xa438, 0xcb53, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
- 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0xa00a, 0xa438, 0xa190,
- 0xa438, 0xa280, 0xa438, 0x8220, 0xa438, 0xa404, 0xa438, 0xb580,
- 0xa438, 0xd700, 0xa438, 0x40a1, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa602, 0xa438, 0x9503, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa310, 0xa438, 0x9503, 0xa438, 0xcb60, 0xa438, 0xd1c8,
- 0xa438, 0xd045, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x5fb4, 0xa438, 0xaa10, 0xa438, 0xd70c, 0xa438, 0x2833,
- 0xa438, 0x818f, 0xa438, 0xf003, 0xa438, 0x1000, 0xa438, 0x1330,
- 0xa438, 0xd70c, 0xa438, 0x40a6, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa140, 0xa438, 0x9503, 0xa438, 0xd70c, 0xa438, 0x40a3,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xac20, 0xa438, 0x9503,
- 0xa438, 0xa90c, 0xa438, 0xaa80, 0xa438, 0x0c1f, 0xa438, 0x0d07,
- 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0xa00a,
+ 0xa438, 0xd71f, 0xa438, 0x5f94, 0xa438, 0xd706, 0xa438, 0x61a9,
+ 0xa438, 0xd702, 0xa438, 0x40a1, 0xa438, 0xd706, 0xa438, 0x4079,
+ 0xa438, 0xd706, 0xa438, 0x609d, 0xa438, 0xd141, 0xa438, 0xd043,
+ 0xa438, 0xf006, 0xa438, 0xd101, 0xa438, 0xd040, 0xa438, 0xf003,
+ 0xa438, 0xd141, 0xa438, 0xd044, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xd700, 0xa438, 0x60e5,
+ 0xa438, 0xd704, 0xa438, 0x60be, 0xa438, 0xd706, 0xa438, 0x29b1,
+ 0xa438, 0x8280, 0xa438, 0xf002, 0xa438, 0xa880, 0xa438, 0xa00a,
+ 0xa438, 0xa190, 0xa438, 0x8220, 0xa438, 0xa280, 0xa438, 0xa404,
+ 0xa438, 0xa620, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc5aa,
+ 0xa438, 0x9503, 0xa438, 0xd700, 0xa438, 0x6061, 0xa438, 0xa402,
+ 0xa438, 0xa480, 0xa438, 0xcb52, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fba, 0xa438, 0xd704, 0xa438, 0x5f76,
+ 0xa438, 0xb920, 0xa438, 0xcb53, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd71f, 0xa438, 0x7fb4, 0xa438, 0x9920, 0xa438, 0xa00a,
0xa438, 0xa190, 0xa438, 0xa280, 0xa438, 0x8220, 0xa438, 0xa404,
- 0xa438, 0xb580, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc500,
- 0xa438, 0x9503, 0xa438, 0x83e0, 0xa438, 0x8e01, 0xa438, 0xd700,
- 0xa438, 0x40a1, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa602,
- 0xa438, 0x9503, 0xa438, 0xd14a, 0xa438, 0xd058, 0xa438, 0x1000,
- 0xa438, 0x12d7, 0xa438, 0xd70c, 0xa438, 0x4063, 0xa438, 0x1000,
- 0xa438, 0x12ea, 0xa438, 0xcb6f, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd704, 0xa438, 0x2e70, 0xa438, 0x81fd, 0xa438, 0xd71f,
- 0xa438, 0x676e, 0xa438, 0xd704, 0xa438, 0x3868, 0xa438, 0x81d8,
- 0xa438, 0xd706, 0xa438, 0x61c2, 0xa438, 0xd70c, 0xa438, 0x2f18,
- 0xa438, 0x81de, 0xa438, 0xd700, 0xa438, 0x5d35, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0xc5aa, 0xa438, 0x9503, 0xa438, 0x0ce0,
- 0xa438, 0x0320, 0xa438, 0x1800, 0xa438, 0x81e4, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0xc5aa, 0xa438, 0x9503, 0xa438, 0x1800,
- 0xa438, 0x8202, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc5aa,
- 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x8204, 0xa438, 0x1000,
- 0xa438, 0x12d7, 0xa438, 0xae02, 0xa438, 0xd70c, 0xa438, 0x4063,
- 0xa438, 0x1000, 0xa438, 0x12ea, 0xa438, 0xcb61, 0xa438, 0x1000,
- 0xa438, 0x126b, 0xa438, 0xd704, 0xa438, 0x2e70, 0xa438, 0x81fd,
- 0xa438, 0xd704, 0xa438, 0x3868, 0xa438, 0x8202, 0xa438, 0xd706,
- 0xa438, 0x61a2, 0xa438, 0xd71f, 0xa438, 0x612e, 0xa438, 0xd70c,
- 0xa438, 0x2f18, 0xa438, 0x8204, 0xa438, 0x1800, 0xa438, 0x81e4,
- 0xa438, 0x8e02, 0xa438, 0x1800, 0xa438, 0x0f99, 0xa438, 0x1800,
- 0xa438, 0x0e31, 0xa438, 0x1800, 0xa438, 0x8480, 0xa438, 0x1800,
- 0xa438, 0x0e07, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70c,
- 0xa438, 0x5fa4, 0xa438, 0xa706, 0xa438, 0xd70c, 0xa438, 0x404b,
- 0xa438, 0xa880, 0xa438, 0x8801, 0xa438, 0x8e01, 0xa438, 0xca50,
- 0xa438, 0x1000, 0xa438, 0x82a9, 0xa438, 0xca51, 0xa438, 0xd70e,
- 0xa438, 0x2210, 0xa438, 0x82a7, 0xa438, 0xd70c, 0xa438, 0x4084,
- 0xa438, 0xd705, 0xa438, 0x5efd, 0xa438, 0xf007, 0xa438, 0x1000,
- 0xa438, 0x17c2, 0xa438, 0xd70c, 0xa438, 0x5ce2, 0xa438, 0x1800,
- 0xa438, 0x1692, 0xa438, 0xd70c, 0xa438, 0x605a, 0xa438, 0x9a10,
- 0xa438, 0x8e40, 0xa438, 0x8404, 0xa438, 0x1000, 0xa438, 0x1827,
- 0xa438, 0x8e80, 0xa438, 0xca62, 0xa438, 0xd705, 0xa438, 0x3084,
- 0xa438, 0x8289, 0xa438, 0xba10, 0xa438, 0x0000, 0xa438, 0x0000,
- 0xa438, 0x1000, 0xa438, 0x8382, 0xa438, 0x0c03, 0xa438, 0x0100,
- 0xa438, 0xd702, 0xa438, 0x4638, 0xa438, 0xd1c4, 0xa438, 0xd044,
- 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0x8108, 0xa438, 0x0c1f,
- 0xa438, 0x0907, 0xa438, 0x8940, 0xa438, 0x1000, 0xa438, 0x17db,
- 0xa438, 0xa0c4, 0xa438, 0x8610, 0xa438, 0x8030, 0xa438, 0x8706,
- 0xa438, 0x0c07, 0xa438, 0x0b06, 0xa438, 0x8410, 0xa438, 0xa980,
- 0xa438, 0xa702, 0xa438, 0xd1c4, 0xa438, 0xd045, 0xa438, 0x1000,
+ 0xa438, 0xb580, 0xa438, 0xd700, 0xa438, 0x40a1, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa602, 0xa438, 0x9503, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa310, 0xa438, 0x9503, 0xa438, 0xcb60,
+ 0xa438, 0xd101, 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x126b,
+ 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xaa10, 0xa438, 0xd70c,
+ 0xa438, 0x2833, 0xa438, 0x82b9, 0xa438, 0xf003, 0xa438, 0x1000,
+ 0xa438, 0x1330, 0xa438, 0xd70c, 0xa438, 0x40a6, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa140, 0xa438, 0x9503, 0xa438, 0xd70c,
+ 0xa438, 0x40a3, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xac20,
+ 0xa438, 0x9503, 0xa438, 0xa90c, 0xa438, 0xaa80, 0xa438, 0x0c1f,
+ 0xa438, 0x0d07, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5,
+ 0xa438, 0xa00a, 0xa438, 0xa190, 0xa438, 0xa280, 0xa438, 0x8220,
+ 0xa438, 0xa404, 0xa438, 0xb580, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xc500, 0xa438, 0x9503, 0xa438, 0x83e0, 0xa438, 0x8e01,
+ 0xa438, 0xd700, 0xa438, 0x40a1, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xa602, 0xa438, 0x9503, 0xa438, 0xd14a, 0xa438, 0xd058,
+ 0xa438, 0x1000, 0xa438, 0x12d7, 0xa438, 0xd70c, 0xa438, 0x4063,
+ 0xa438, 0x1000, 0xa438, 0x12ea, 0xa438, 0xcb6f, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd704, 0xa438, 0x2e70, 0xa438, 0x8327,
+ 0xa438, 0xd71f, 0xa438, 0x676e, 0xa438, 0xd704, 0xa438, 0x3868,
+ 0xa438, 0x8302, 0xa438, 0xd706, 0xa438, 0x61c2, 0xa438, 0xd70c,
+ 0xa438, 0x2f18, 0xa438, 0x8308, 0xa438, 0xd700, 0xa438, 0x5d35,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc5aa, 0xa438, 0x9503,
+ 0xa438, 0x0ce0, 0xa438, 0x0320, 0xa438, 0x1800, 0xa438, 0x830e,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xc5aa, 0xa438, 0x9503,
+ 0xa438, 0x1800, 0xa438, 0x832e, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0xc5aa, 0xa438, 0x9503, 0xa438, 0x1800, 0xa438, 0x8330,
+ 0xa438, 0x1000, 0xa438, 0x12d7, 0xa438, 0xae02, 0xa438, 0xd70c,
+ 0xa438, 0x4063, 0xa438, 0x1000, 0xa438, 0x12ea, 0xa438, 0xcb61,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd704, 0xa438, 0x2e70,
+ 0xa438, 0x8327, 0xa438, 0xd704, 0xa438, 0x3868, 0xa438, 0x832e,
+ 0xa438, 0xd706, 0xa438, 0x61e2, 0xa438, 0xd71f, 0xa438, 0x612e,
+ 0xa438, 0xd70c, 0xa438, 0x2f18, 0xa438, 0x8330, 0xa438, 0x1800,
+ 0xa438, 0x830e, 0xa438, 0x8e02, 0xa438, 0x1800, 0xa438, 0x0f99,
+ 0xa438, 0xae04, 0xa438, 0x8310, 0xa438, 0x1800, 0xa438, 0x0e31,
+ 0xa438, 0x1800, 0xa438, 0x85ac, 0xa438, 0x1800, 0xa438, 0x0e07,
+ 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70c, 0xa438, 0x5fa4,
+ 0xa438, 0xa706, 0xa438, 0xd70c, 0xa438, 0x404b, 0xa438, 0xa880,
+ 0xa438, 0x8801, 0xa438, 0x8e01, 0xa438, 0xca50, 0xa438, 0x1000,
+ 0xa438, 0x83d5, 0xa438, 0xca51, 0xa438, 0xd70e, 0xa438, 0x2210,
+ 0xa438, 0x83d3, 0xa438, 0xd70c, 0xa438, 0x4084, 0xa438, 0xd705,
+ 0xa438, 0x5efd, 0xa438, 0xf007, 0xa438, 0x1000, 0xa438, 0x17c2,
+ 0xa438, 0xd70c, 0xa438, 0x5ce2, 0xa438, 0x1800, 0xa438, 0x1692,
+ 0xa438, 0xd70c, 0xa438, 0x605a, 0xa438, 0x9a10, 0xa438, 0x8e40,
+ 0xa438, 0x8404, 0xa438, 0x1000, 0xa438, 0x1827, 0xa438, 0x8e80,
+ 0xa438, 0xca62, 0xa438, 0xd705, 0xa438, 0x3084, 0xa438, 0x83b5,
+ 0xa438, 0xba10, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x1000,
+ 0xa438, 0x84ae, 0xa438, 0x0c03, 0xa438, 0x0100, 0xa438, 0xd702,
+ 0xa438, 0x4638, 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0x1000,
0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
- 0xa438, 0x5f7c, 0xa438, 0x0c07, 0xa438, 0x0b06, 0xa438, 0xa030,
- 0xa438, 0xa610, 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa501,
- 0xa438, 0xa108, 0xa438, 0xd1c4, 0xa438, 0xd045, 0xa438, 0xca63,
- 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0xd702, 0xa438, 0x6078,
- 0xa438, 0x9920, 0xa438, 0xf003, 0xa438, 0xb920, 0xa438, 0xa880,
- 0xa438, 0x9a10, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000,
- 0xa438, 0x17e8, 0xa438, 0xd71f, 0xa438, 0x5f73, 0xa438, 0xf011,
- 0xa438, 0xd70c, 0xa438, 0x409b, 0xa438, 0x9920, 0xa438, 0x9a10,
- 0xa438, 0xfff5, 0xa438, 0x80fe, 0xa438, 0x8610, 0xa438, 0x8501,
- 0xa438, 0x8980, 0xa438, 0x8702, 0xa438, 0xa410, 0xa438, 0xa940,
- 0xa438, 0x81c0, 0xa438, 0xae80, 0xa438, 0x1800, 0xa438, 0x822e,
- 0xa438, 0x8804, 0xa438, 0xa704, 0xa438, 0x8788, 0xa438, 0xff82,
- 0xa438, 0xbb08, 0xa438, 0x0c1f, 0xa438, 0x0907, 0xa438, 0x8940,
- 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0x8701, 0xa438, 0x8502,
- 0xa438, 0xa0f4, 0xa438, 0xa610, 0xa438, 0xd700, 0xa438, 0x6061,
- 0xa438, 0xa002, 0xa438, 0xa501, 0xa438, 0x8706, 0xa438, 0x8410,
- 0xa438, 0xa980, 0xa438, 0xca64, 0xa438, 0xd110, 0xa438, 0xd040,
- 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0x8804, 0xa438, 0xa706,
- 0xa438, 0x1800, 0xa438, 0x820a, 0xa438, 0x1800, 0xa438, 0x147c,
- 0xa438, 0xd705, 0xa438, 0x405f, 0xa438, 0xf037, 0xa438, 0xd701,
- 0xa438, 0x4259, 0xa438, 0xd705, 0xa438, 0x6234, 0xa438, 0xd70c,
- 0xa438, 0x41c6, 0xa438, 0xd70d, 0xa438, 0x419d, 0xa438, 0xd70d,
- 0xa438, 0x417e, 0xa438, 0xd704, 0xa438, 0x6127, 0xa438, 0x2951,
- 0xa438, 0x82c0, 0xa438, 0xd70c, 0xa438, 0x4083, 0xa438, 0xd70c,
- 0xa438, 0x2e81, 0xa438, 0x82c0, 0xa438, 0xf0c2, 0xa438, 0x80fe,
- 0xa438, 0x8610, 0xa438, 0x8501, 0xa438, 0x8704, 0xa438, 0x0c30,
- 0xa438, 0x0410, 0xa438, 0xac02, 0xa438, 0xa502, 0xa438, 0x8980,
- 0xa438, 0xca60, 0xa438, 0xa004, 0xa438, 0xd70c, 0xa438, 0x6065,
- 0xa438, 0x1800, 0xa438, 0x82d0, 0xa438, 0x8004, 0xa438, 0xa804,
- 0xa438, 0x0c0f, 0xa438, 0x0602, 0xa438, 0x0c70, 0xa438, 0x0730,
- 0xa438, 0xa708, 0xa438, 0xd704, 0xa438, 0x609c, 0xa438, 0x0c1f,
- 0xa438, 0x0912, 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x090e,
- 0xa438, 0xa940, 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0xa780,
- 0xa438, 0xf0a0, 0xa438, 0xd704, 0xa438, 0x63ab, 0xa438, 0xd705,
- 0xa438, 0x4371, 0xa438, 0xd702, 0xa438, 0x339c, 0xa438, 0x8381,
- 0xa438, 0x8788, 0xa438, 0x8704, 0xa438, 0x0c1f, 0xa438, 0x0907,
- 0xa438, 0x8940, 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0x8410,
- 0xa438, 0xa0f4, 0xa438, 0xa610, 0xa438, 0xd700, 0xa438, 0x6061,
- 0xa438, 0xa002, 0xa438, 0xa501, 0xa438, 0xa706, 0xa438, 0x8804,
- 0xa438, 0xa980, 0xa438, 0xd70c, 0xa438, 0x6085, 0xa438, 0x8701,
- 0xa438, 0x8502, 0xa438, 0x8c02, 0xa438, 0xf082, 0xa438, 0xd70c,
- 0xa438, 0x60c5, 0xa438, 0xd702, 0xa438, 0x6053, 0xa438, 0xf07d,
- 0xa438, 0x1800, 0xa438, 0x837e, 0xa438, 0xd70d, 0xa438, 0x4d1b,
- 0xa438, 0xba10, 0xa438, 0xae40, 0xa438, 0x0cfc, 0xa438, 0x03b4,
- 0xa438, 0x0cfc, 0xa438, 0x05b4, 0xa438, 0xd1c4, 0xa438, 0xd044,
- 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0x8706, 0xa438, 0x8280,
- 0xa438, 0xace0, 0xa438, 0xa680, 0xa438, 0xa240, 0xa438, 0x1000,
- 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd702,
- 0xa438, 0x5f79, 0xa438, 0x8240, 0xa438, 0xd702, 0xa438, 0x6898,
- 0xa438, 0xd702, 0xa438, 0x4957, 0xa438, 0x1800, 0xa438, 0x8370,
- 0xa438, 0xa1c0, 0xa438, 0x0c3f, 0xa438, 0x0220, 0xa438, 0x0cfc,
- 0xa438, 0x030c, 0xa438, 0x0cfc, 0xa438, 0x050c, 0xa438, 0x8108,
- 0xa438, 0x8640, 0xa438, 0xa120, 0xa438, 0xa640, 0xa438, 0x0c03,
- 0xa438, 0x0101, 0xa438, 0xa110, 0xa438, 0xd1c4, 0xa438, 0xd044,
- 0xa438, 0xca84, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000,
- 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0xd702,
- 0xa438, 0x60fc, 0xa438, 0x8210, 0xa438, 0x0ce0, 0xa438, 0x0320,
- 0xa438, 0x0ce0, 0xa438, 0x0520, 0xa438, 0xf002, 0xa438, 0xa210,
- 0xa438, 0xd1c4, 0xa438, 0xd043, 0xa438, 0x1000, 0xa438, 0x17be,
+ 0xa438, 0x5f7c, 0xa438, 0x8108, 0xa438, 0x0c1f, 0xa438, 0x0907,
+ 0xa438, 0x8940, 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0xa0c4,
+ 0xa438, 0x8610, 0xa438, 0x8030, 0xa438, 0x8706, 0xa438, 0x0c07,
+ 0xa438, 0x0b06, 0xa438, 0x8410, 0xa438, 0xa980, 0xa438, 0xa702,
+ 0xa438, 0xd1c4, 0xa438, 0xd045, 0xa438, 0x1000, 0xa438, 0x17be,
0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f7c,
- 0xa438, 0x8233, 0xa438, 0x0cfc, 0xa438, 0x036c, 0xa438, 0x0cfc,
- 0xa438, 0x056c, 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0xca85,
+ 0xa438, 0x0c07, 0xa438, 0x0b06, 0xa438, 0xa030, 0xa438, 0xa610,
+ 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa501, 0xa438, 0xa108,
+ 0xa438, 0xd1c4, 0xa438, 0xd045, 0xa438, 0xca63, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
+ 0xa438, 0x5f7c, 0xa438, 0xd702, 0xa438, 0x6078, 0xa438, 0x9920,
+ 0xa438, 0xf003, 0xa438, 0xb920, 0xa438, 0xa880, 0xa438, 0x9a10,
0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0xa680, 0xa438, 0xa240,
+ 0xa438, 0xd71f, 0xa438, 0x5f73, 0xa438, 0xf011, 0xa438, 0xd70c,
+ 0xa438, 0x409b, 0xa438, 0x9920, 0xa438, 0x9a10, 0xa438, 0xfff5,
+ 0xa438, 0x80fe, 0xa438, 0x8610, 0xa438, 0x8501, 0xa438, 0x8980,
+ 0xa438, 0x8702, 0xa438, 0xa410, 0xa438, 0xa940, 0xa438, 0x81c0,
+ 0xa438, 0xae80, 0xa438, 0x1800, 0xa438, 0x835a, 0xa438, 0x8804,
+ 0xa438, 0xa704, 0xa438, 0x8788, 0xa438, 0xff82, 0xa438, 0xbb08,
+ 0xa438, 0x0c1f, 0xa438, 0x0907, 0xa438, 0x8940, 0xa438, 0x1000,
+ 0xa438, 0x17db, 0xa438, 0x8701, 0xa438, 0x8502, 0xa438, 0xa0f4,
+ 0xa438, 0xa610, 0xa438, 0xd700, 0xa438, 0x6061, 0xa438, 0xa002,
+ 0xa438, 0xa501, 0xa438, 0x8706, 0xa438, 0x8410, 0xa438, 0xa980,
+ 0xa438, 0xca64, 0xa438, 0xd110, 0xa438, 0xd040, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
+ 0xa438, 0x5f7c, 0xa438, 0x8804, 0xa438, 0xa706, 0xa438, 0x1800,
+ 0xa438, 0x8336, 0xa438, 0x1800, 0xa438, 0x147c, 0xa438, 0xd705,
+ 0xa438, 0x405f, 0xa438, 0xf037, 0xa438, 0xd701, 0xa438, 0x4259,
+ 0xa438, 0xd705, 0xa438, 0x6234, 0xa438, 0xd70c, 0xa438, 0x41c6,
+ 0xa438, 0xd70d, 0xa438, 0x419d, 0xa438, 0xd70d, 0xa438, 0x417e,
+ 0xa438, 0xd704, 0xa438, 0x6127, 0xa438, 0x2951, 0xa438, 0x83ec,
+ 0xa438, 0xd70c, 0xa438, 0x4083, 0xa438, 0xd70c, 0xa438, 0x2e81,
+ 0xa438, 0x83ec, 0xa438, 0xf0c2, 0xa438, 0x80fe, 0xa438, 0x8610,
+ 0xa438, 0x8501, 0xa438, 0x8704, 0xa438, 0x0c30, 0xa438, 0x0410,
+ 0xa438, 0xac02, 0xa438, 0xa502, 0xa438, 0x8980, 0xa438, 0xca60,
+ 0xa438, 0xa004, 0xa438, 0xd70c, 0xa438, 0x6065, 0xa438, 0x1800,
+ 0xa438, 0x83fc, 0xa438, 0x8004, 0xa438, 0xa804, 0xa438, 0x0c0f,
+ 0xa438, 0x0602, 0xa438, 0x0c70, 0xa438, 0x0730, 0xa438, 0xa708,
+ 0xa438, 0xd704, 0xa438, 0x609c, 0xa438, 0x0c1f, 0xa438, 0x0912,
+ 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x090e, 0xa438, 0xa940,
+ 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0xa780, 0xa438, 0xf0a0,
+ 0xa438, 0xd704, 0xa438, 0x63ab, 0xa438, 0xd705, 0xa438, 0x4371,
+ 0xa438, 0xd702, 0xa438, 0x339c, 0xa438, 0x84ad, 0xa438, 0x8788,
+ 0xa438, 0x8704, 0xa438, 0x0c1f, 0xa438, 0x0907, 0xa438, 0x8940,
+ 0xa438, 0x1000, 0xa438, 0x17db, 0xa438, 0x8410, 0xa438, 0xa0f4,
+ 0xa438, 0xa610, 0xa438, 0xd700, 0xa438, 0x6061, 0xa438, 0xa002,
+ 0xa438, 0xa501, 0xa438, 0xa706, 0xa438, 0x8804, 0xa438, 0xa980,
+ 0xa438, 0xd70c, 0xa438, 0x6085, 0xa438, 0x8701, 0xa438, 0x8502,
+ 0xa438, 0x8c02, 0xa438, 0xf082, 0xa438, 0xd70c, 0xa438, 0x60c5,
+ 0xa438, 0xd702, 0xa438, 0x6053, 0xa438, 0xf07d, 0xa438, 0x1800,
+ 0xa438, 0x84aa, 0xa438, 0xd70d, 0xa438, 0x4d1b, 0xa438, 0xba10,
+ 0xa438, 0xae40, 0xa438, 0x0cfc, 0xa438, 0x03b4, 0xa438, 0x0cfc,
+ 0xa438, 0x05b4, 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
+ 0xa438, 0x5f7c, 0xa438, 0x8706, 0xa438, 0x8280, 0xa438, 0xace0,
+ 0xa438, 0xa680, 0xa438, 0xa240, 0xa438, 0x1000, 0xa438, 0x17be,
+ 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd702, 0xa438, 0x5f79,
+ 0xa438, 0x8240, 0xa438, 0xd702, 0xa438, 0x6898, 0xa438, 0xd702,
+ 0xa438, 0x4957, 0xa438, 0x1800, 0xa438, 0x849c, 0xa438, 0xa1c0,
+ 0xa438, 0x0c3f, 0xa438, 0x0220, 0xa438, 0x0cfc, 0xa438, 0x030c,
+ 0xa438, 0x0cfc, 0xa438, 0x050c, 0xa438, 0x8108, 0xa438, 0x8640,
+ 0xa438, 0xa120, 0xa438, 0xa640, 0xa438, 0x0c03, 0xa438, 0x0101,
+ 0xa438, 0xa110, 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0xca84,
0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd702, 0xa438, 0x5f79, 0xa438, 0x8240, 0xa438, 0x0cfc,
- 0xa438, 0x0390, 0xa438, 0x0cfc, 0xa438, 0x0590, 0xa438, 0xd702,
- 0xa438, 0x6058, 0xa438, 0xf002, 0xa438, 0xfec8, 0xa438, 0x81c0,
- 0xa438, 0x8880, 0xa438, 0x8706, 0xa438, 0xca61, 0xa438, 0xd1c4,
- 0xa438, 0xd054, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000,
- 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f7d, 0xa438, 0xa706,
- 0xa438, 0xf004, 0xa438, 0x8788, 0xa438, 0xa404, 0xa438, 0x8702,
- 0xa438, 0x0800, 0xa438, 0x8443, 0xa438, 0x8303, 0xa438, 0x8280,
- 0xa438, 0x9920, 0xa438, 0x8ce0, 0xa438, 0x8004, 0xa438, 0xa1c0,
- 0xa438, 0xd70e, 0xa438, 0x404a, 0xa438, 0xa280, 0xa438, 0xd702,
- 0xa438, 0x3bd0, 0xa438, 0x8392, 0xa438, 0x0c3f, 0xa438, 0x0223,
- 0xa438, 0xf003, 0xa438, 0x0c3f, 0xa438, 0x0220, 0xa438, 0x0cfc,
- 0xa438, 0x0308, 0xa438, 0x0cfc, 0xa438, 0x0508, 0xa438, 0x8108,
- 0xa438, 0x8640, 0xa438, 0xa120, 0xa438, 0xa640, 0xa438, 0xd702,
- 0xa438, 0x6077, 0xa438, 0x8103, 0xa438, 0xf003, 0xa438, 0x0c03,
- 0xa438, 0x0101, 0xa438, 0xa110, 0xa438, 0xd702, 0xa438, 0x6077,
- 0xa438, 0xa108, 0xa438, 0xf006, 0xa438, 0xd704, 0xa438, 0x6077,
- 0xa438, 0x8108, 0xa438, 0xf002, 0xa438, 0xa108, 0xa438, 0xd193,
- 0xa438, 0xd045, 0xa438, 0xca82, 0xa438, 0x1000, 0xa438, 0x17be,
- 0xa438, 0xd70e, 0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f3c, 0xa438, 0xd702, 0xa438, 0x60fc,
+ 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0xd702, 0xa438, 0x60fc,
0xa438, 0x8210, 0xa438, 0x0ce0, 0xa438, 0x0320, 0xa438, 0x0ce0,
0xa438, 0x0520, 0xa438, 0xf002, 0xa438, 0xa210, 0xa438, 0xd1c4,
- 0xa438, 0xd043, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70e,
+ 0xa438, 0xd043, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000,
+ 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0x8233,
+ 0xa438, 0x0cfc, 0xa438, 0x036c, 0xa438, 0x0cfc, 0xa438, 0x056c,
+ 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0xca85, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
+ 0xa438, 0x5f7c, 0xa438, 0xa680, 0xa438, 0xa240, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd702,
+ 0xa438, 0x5f79, 0xa438, 0x8240, 0xa438, 0x0cfc, 0xa438, 0x0390,
+ 0xa438, 0x0cfc, 0xa438, 0x0590, 0xa438, 0xd702, 0xa438, 0x6058,
+ 0xa438, 0xf002, 0xa438, 0xfec8, 0xa438, 0x81c0, 0xa438, 0x8880,
+ 0xa438, 0x8706, 0xa438, 0xca61, 0xa438, 0xd1c4, 0xa438, 0xd054,
+ 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8,
+ 0xa438, 0xd70c, 0xa438, 0x5f7d, 0xa438, 0xa706, 0xa438, 0xf004,
+ 0xa438, 0x8788, 0xa438, 0xa404, 0xa438, 0x8702, 0xa438, 0x0800,
+ 0xa438, 0x8443, 0xa438, 0x8303, 0xa438, 0x8280, 0xa438, 0x9920,
+ 0xa438, 0x8ce0, 0xa438, 0x8004, 0xa438, 0xa1c0, 0xa438, 0xd70e,
+ 0xa438, 0x404a, 0xa438, 0xa280, 0xa438, 0xd702, 0xa438, 0x3bd0,
+ 0xa438, 0x84be, 0xa438, 0x0c3f, 0xa438, 0x0223, 0xa438, 0xf003,
+ 0xa438, 0x0c3f, 0xa438, 0x0220, 0xa438, 0x0cfc, 0xa438, 0x0308,
+ 0xa438, 0x0cfc, 0xa438, 0x0508, 0xa438, 0x8108, 0xa438, 0x8640,
+ 0xa438, 0xa120, 0xa438, 0xa640, 0xa438, 0xd702, 0xa438, 0x6077,
+ 0xa438, 0x8103, 0xa438, 0xf003, 0xa438, 0x0c03, 0xa438, 0x0101,
+ 0xa438, 0xa110, 0xa438, 0xd702, 0xa438, 0x6077, 0xa438, 0xa108,
+ 0xa438, 0xf006, 0xa438, 0xd704, 0xa438, 0x6077, 0xa438, 0x8108,
+ 0xa438, 0xf002, 0xa438, 0xa108, 0xa438, 0xd193, 0xa438, 0xd045,
+ 0xa438, 0xca82, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70e,
0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
- 0xa438, 0x5f3c, 0xa438, 0xd702, 0xa438, 0x3bd0, 0xa438, 0x83d0,
- 0xa438, 0x0c3f, 0xa438, 0x020c, 0xa438, 0xf002, 0xa438, 0x823f,
- 0xa438, 0x0cfc, 0xa438, 0x034c, 0xa438, 0x0cfc, 0xa438, 0x054c,
- 0xa438, 0xd1c4, 0xa438, 0xd044, 0xa438, 0x1000, 0xa438, 0x17be,
- 0xa438, 0xd70e, 0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd70c, 0xa438, 0x5f3c, 0xa438, 0x820c, 0xa438, 0xa360,
- 0xa438, 0xa560, 0xa438, 0xd1c4, 0xa438, 0xd043, 0xa438, 0xca83,
+ 0xa438, 0x5f3c, 0xa438, 0xd702, 0xa438, 0x60fc, 0xa438, 0x8210,
+ 0xa438, 0x0ce0, 0xa438, 0x0320, 0xa438, 0x0ce0, 0xa438, 0x0520,
+ 0xa438, 0xf002, 0xa438, 0xa210, 0xa438, 0xd1c4, 0xa438, 0xd043,
0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70e, 0xa438, 0x606a,
0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f3c,
- 0xa438, 0xd70e, 0xa438, 0x406a, 0xa438, 0x8680, 0xa438, 0xf002,
- 0xa438, 0xa680, 0xa438, 0xa240, 0xa438, 0x0c0f, 0xa438, 0x0604,
- 0xa438, 0x0c70, 0xa438, 0x0750, 0xa438, 0xa708, 0xa438, 0xd704,
- 0xa438, 0x609c, 0xa438, 0x0c1f, 0xa438, 0x0914, 0xa438, 0xf003,
- 0xa438, 0x0c1f, 0xa438, 0x0910, 0xa438, 0xa940, 0xa438, 0x1000,
- 0xa438, 0x17db, 0xa438, 0xa780, 0xa438, 0x1000, 0xa438, 0x17be,
- 0xa438, 0xd70e, 0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8,
- 0xa438, 0xd702, 0xa438, 0x399c, 0xa438, 0x8403, 0xa438, 0x8240,
- 0xa438, 0x8788, 0xa438, 0xd702, 0xa438, 0x63f8, 0xa438, 0xd705,
- 0xa438, 0x643c, 0xa438, 0xa402, 0xa438, 0xf012, 0xa438, 0x8402,
- 0xa438, 0xd705, 0xa438, 0x611b, 0xa438, 0xa401, 0xa438, 0xa302,
- 0xa438, 0xd702, 0xa438, 0x417d, 0xa438, 0xa440, 0xa438, 0xa280,
- 0xa438, 0xf008, 0xa438, 0x8401, 0xa438, 0x8302, 0xa438, 0xd70c,
- 0xa438, 0x6060, 0xa438, 0xa301, 0xa438, 0xf002, 0xa438, 0x8301,
- 0xa438, 0xd70c, 0xa438, 0x4080, 0xa438, 0xd70e, 0xa438, 0x604a,
- 0xa438, 0xff5f, 0xa438, 0xd705, 0xa438, 0x3cdd, 0xa438, 0x8432,
- 0xa438, 0xff5b, 0xa438, 0x0cfc, 0xa438, 0x0390, 0xa438, 0x0cfc,
- 0xa438, 0x0590, 0xa438, 0x0800, 0xa438, 0xd704, 0xa438, 0x60f9,
- 0xa438, 0xd704, 0xa438, 0x6958, 0xa438, 0xd706, 0xa438, 0x6902,
- 0xa438, 0x1800, 0xa438, 0x1001, 0xa438, 0xa220, 0xa438, 0xa404,
- 0xa438, 0xd704, 0xa438, 0x4054, 0xa438, 0xa740, 0xa438, 0xa504,
- 0xa438, 0xd704, 0xa438, 0x40b5, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0xa003, 0xa438, 0x9503, 0xa438, 0x8190, 0xa438, 0xcb91,
- 0xa438, 0x1000, 0xa438, 0x10af, 0xa438, 0xd704, 0xa438, 0x7fb9,
- 0xa438, 0x8220, 0xa438, 0x8404, 0xa438, 0xa280, 0xa438, 0xa110,
- 0xa438, 0xd706, 0xa438, 0x4041, 0xa438, 0xa180, 0xa438, 0x1000,
- 0xa438, 0x130c, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x850f,
- 0xa438, 0x9503, 0xa438, 0x0c1f, 0xa438, 0x0d08, 0xa438, 0x0cc0,
- 0xa438, 0x0d80, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1000,
- 0xa438, 0x10af, 0xa438, 0xd704, 0xa438, 0x615f, 0xa438, 0xd70c,
- 0xa438, 0x6103, 0xa438, 0x8504, 0xa438, 0xd704, 0xa438, 0x40b5,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8003, 0xa438, 0x9503,
- 0xa438, 0xcb92, 0xa438, 0x1000, 0xa438, 0x10af, 0xa438, 0xd706,
- 0xa438, 0x7fa3, 0xa438, 0x8280, 0xa438, 0x8190, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0x0c0f, 0xa438, 0x050a, 0xa438, 0x9503,
- 0xa438, 0x0c1f, 0xa438, 0x0d00, 0xa438, 0x8dc0, 0xa438, 0x1000,
- 0xa438, 0x12b5, 0xa438, 0x1800, 0xa438, 0x1001, 0xa438, 0x0c1f,
- 0xa438, 0x0d00, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5,
- 0xa438, 0x800a, 0xa438, 0xd705, 0xa438, 0x40b9, 0xa438, 0xd70c,
- 0xa438, 0x6063, 0xa438, 0xa020, 0xa438, 0xf003, 0xa438, 0xd705,
- 0xa438, 0x8020, 0xa438, 0xa504, 0xa438, 0xd704, 0xa438, 0x40b5,
- 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa003, 0xa438, 0x9503,
- 0xa438, 0xd704, 0xa438, 0x4054, 0xa438, 0xa740, 0xa438, 0x8190,
- 0xa438, 0xcb93, 0xa438, 0xd700, 0xa438, 0x6063, 0xa438, 0xd704,
- 0xa438, 0x609c, 0xa438, 0xd14b, 0xa438, 0xd040, 0xa438, 0xf003,
- 0xa438, 0xd120, 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x10af,
- 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xa008, 0xa438, 0xd706,
- 0xa438, 0x4040, 0xa438, 0xa002, 0xa438, 0xd705, 0xa438, 0x4079,
- 0xa438, 0x1000, 0xa438, 0x1313, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0x85f0, 0xa438, 0x9503, 0xa438, 0xd705, 0xa438, 0x40d9,
- 0xa438, 0xd70c, 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d09,
- 0xa438, 0xf003, 0xa438, 0x0c1f, 0xa438, 0x0d0a, 0xa438, 0x0cc0,
- 0xa438, 0x0d80, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1000,
- 0xa438, 0x10af, 0xa438, 0x8020, 0xa438, 0xd705, 0xa438, 0x4199,
+ 0xa438, 0xd702, 0xa438, 0x3bd0, 0xa438, 0x84fc, 0xa438, 0x0c3f,
+ 0xa438, 0x020c, 0xa438, 0xf002, 0xa438, 0x823f, 0xa438, 0x0cfc,
+ 0xa438, 0x034c, 0xa438, 0x0cfc, 0xa438, 0x054c, 0xa438, 0xd1c4,
+ 0xa438, 0xd044, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70e,
+ 0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd70c,
+ 0xa438, 0x5f3c, 0xa438, 0x820c, 0xa438, 0xa360, 0xa438, 0xa560,
+ 0xa438, 0xd1c4, 0xa438, 0xd043, 0xa438, 0xca83, 0xa438, 0x1000,
+ 0xa438, 0x17be, 0xa438, 0xd70e, 0xa438, 0x606a, 0xa438, 0x1000,
+ 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f3c, 0xa438, 0xd70e,
+ 0xa438, 0x406a, 0xa438, 0x8680, 0xa438, 0xf002, 0xa438, 0xa680,
+ 0xa438, 0xa240, 0xa438, 0x0c0f, 0xa438, 0x0604, 0xa438, 0x0c70,
+ 0xa438, 0x0750, 0xa438, 0xa708, 0xa438, 0xd704, 0xa438, 0x609c,
+ 0xa438, 0x0c1f, 0xa438, 0x0914, 0xa438, 0xf003, 0xa438, 0x0c1f,
+ 0xa438, 0x0910, 0xa438, 0xa940, 0xa438, 0x1000, 0xa438, 0x17db,
+ 0xa438, 0xa780, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70e,
+ 0xa438, 0x606a, 0xa438, 0x1000, 0xa438, 0x17e8, 0xa438, 0xd702,
+ 0xa438, 0x399c, 0xa438, 0x852f, 0xa438, 0x8240, 0xa438, 0x8788,
+ 0xa438, 0xd702, 0xa438, 0x63f8, 0xa438, 0xd705, 0xa438, 0x643c,
+ 0xa438, 0xa402, 0xa438, 0xf012, 0xa438, 0x8402, 0xa438, 0xd705,
+ 0xa438, 0x611b, 0xa438, 0xa401, 0xa438, 0xa302, 0xa438, 0xd702,
+ 0xa438, 0x417d, 0xa438, 0xa440, 0xa438, 0xa280, 0xa438, 0xf008,
+ 0xa438, 0x8401, 0xa438, 0x8302, 0xa438, 0xd70c, 0xa438, 0x6060,
+ 0xa438, 0xa301, 0xa438, 0xf002, 0xa438, 0x8301, 0xa438, 0xd70c,
+ 0xa438, 0x4080, 0xa438, 0xd70e, 0xa438, 0x604a, 0xa438, 0xff5f,
+ 0xa438, 0xd705, 0xa438, 0x3cdd, 0xa438, 0x855e, 0xa438, 0xff5b,
+ 0xa438, 0x0cfc, 0xa438, 0x0390, 0xa438, 0x0cfc, 0xa438, 0x0590,
+ 0xa438, 0x0800, 0xa438, 0xd704, 0xa438, 0x60f9, 0xa438, 0xd704,
+ 0xa438, 0x6958, 0xa438, 0xd706, 0xa438, 0x6902, 0xa438, 0x1800,
+ 0xa438, 0x1001, 0xa438, 0xa220, 0xa438, 0xa404, 0xa438, 0xd704,
+ 0xa438, 0x4054, 0xa438, 0xa740, 0xa438, 0xa504, 0xa438, 0xd704,
+ 0xa438, 0x40b5, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa003,
+ 0xa438, 0x9503, 0xa438, 0x8190, 0xa438, 0xcb91, 0xa438, 0x1000,
+ 0xa438, 0x10af, 0xa438, 0xd704, 0xa438, 0x7fb9, 0xa438, 0x8220,
+ 0xa438, 0x8404, 0xa438, 0xa280, 0xa438, 0xa110, 0xa438, 0xd706,
+ 0xa438, 0x4041, 0xa438, 0xa180, 0xa438, 0x1000, 0xa438, 0x130c,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x850f, 0xa438, 0x9503,
+ 0xa438, 0x0c1f, 0xa438, 0x0d08, 0xa438, 0x0cc0, 0xa438, 0x0d80,
+ 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1000, 0xa438, 0x10af,
0xa438, 0xd704, 0xa438, 0x615f, 0xa438, 0xd70c, 0xa438, 0x6103,
0xa438, 0x8504, 0xa438, 0xd704, 0xa438, 0x40b5, 0xa438, 0x0c03,
- 0xa438, 0x1502, 0xa438, 0x8003, 0xa438, 0x9503, 0xa438, 0xcb94,
- 0xa438, 0x1000, 0xa438, 0x10af, 0xa438, 0xd706, 0xa438, 0x7fa2,
- 0xa438, 0x800a, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x85f0,
- 0xa438, 0x9503, 0xa438, 0xd705, 0xa438, 0x40b9, 0xa438, 0x0c1f,
- 0xa438, 0x0d00, 0xa438, 0x8dc0, 0xa438, 0xf005, 0xa438, 0x0c1f,
- 0xa438, 0x0d07, 0xa438, 0x8dc0, 0xa438, 0xa190, 0xa438, 0x1000,
- 0xa438, 0x12b5, 0xa438, 0xd705, 0xa438, 0x39cc, 0xa438, 0x84eb,
- 0xa438, 0x1800, 0xa438, 0x1001, 0xa438, 0x1800, 0xa438, 0x819d,
- 0xa438, 0xcb13, 0xa438, 0xd706, 0xa438, 0x6089, 0xa438, 0xd1b8,
- 0xa438, 0xd04a, 0xa438, 0xf003, 0xa438, 0xd11c, 0xa438, 0xd04b,
- 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd701, 0xa438, 0x67d5,
- 0xa438, 0xd700, 0xa438, 0x5f74, 0xa438, 0xd70c, 0xa438, 0x610c,
- 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x6846,
- 0xa438, 0xd706, 0xa438, 0x647b, 0xa438, 0xfffa, 0xa438, 0x1000,
- 0xa438, 0x1330, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f,
- 0xa438, 0x0f16, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502,
- 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0x1000, 0xa438, 0x12b5,
- 0xa438, 0x0c07, 0xa438, 0x0c02, 0xa438, 0x0cc0, 0xa438, 0x0080,
- 0xa438, 0xd14a, 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x1800, 0xa438, 0x84fd,
- 0xa438, 0x800a, 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa004,
- 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8004, 0xa438, 0xa001,
- 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8001, 0xa438, 0x1000,
- 0xa438, 0x1217, 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0x1800,
- 0xa438, 0x04ed, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
- 0xa438, 0x5fab, 0xa438, 0xba08, 0xa438, 0x1000, 0xa438, 0x126b,
- 0xa438, 0xd71f, 0xa438, 0x7f8b, 0xa438, 0x9a08, 0xa438, 0x1800,
- 0xa438, 0x0581, 0xa438, 0x800a, 0xa438, 0xd702, 0xa438, 0x6555,
+ 0xa438, 0x1502, 0xa438, 0x8003, 0xa438, 0x9503, 0xa438, 0xcb92,
+ 0xa438, 0x1000, 0xa438, 0x10af, 0xa438, 0xd706, 0xa438, 0x7fa3,
+ 0xa438, 0x8280, 0xa438, 0x8190, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x0c0f, 0xa438, 0x050a, 0xa438, 0x9503, 0xa438, 0x0c1f,
+ 0xa438, 0x0d00, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5,
+ 0xa438, 0x1800, 0xa438, 0x1001, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x800a,
+ 0xa438, 0xd705, 0xa438, 0x40b9, 0xa438, 0xd70c, 0xa438, 0x6063,
+ 0xa438, 0xa020, 0xa438, 0xf003, 0xa438, 0xd705, 0xa438, 0x8020,
+ 0xa438, 0xa504, 0xa438, 0xd704, 0xa438, 0x40b5, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa003, 0xa438, 0x9503, 0xa438, 0xd704,
+ 0xa438, 0x4054, 0xa438, 0xa740, 0xa438, 0x8190, 0xa438, 0xcb93,
+ 0xa438, 0xd700, 0xa438, 0x6063, 0xa438, 0xd704, 0xa438, 0x609c,
+ 0xa438, 0xd14b, 0xa438, 0xd040, 0xa438, 0xf003, 0xa438, 0xd120,
+ 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x10af, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0xa008, 0xa438, 0xd706, 0xa438, 0x4040,
+ 0xa438, 0xa002, 0xa438, 0xd705, 0xa438, 0x4079, 0xa438, 0x1000,
+ 0xa438, 0x1313, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x85f0,
+ 0xa438, 0x9503, 0xa438, 0xd705, 0xa438, 0x40d9, 0xa438, 0xd70c,
+ 0xa438, 0x6083, 0xa438, 0x0c1f, 0xa438, 0x0d09, 0xa438, 0xf003,
+ 0xa438, 0x0c1f, 0xa438, 0x0d0a, 0xa438, 0x0cc0, 0xa438, 0x0d80,
+ 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x1000, 0xa438, 0x10af,
+ 0xa438, 0x8020, 0xa438, 0xd705, 0xa438, 0x4199, 0xa438, 0xd704,
+ 0xa438, 0x615f, 0xa438, 0xd70c, 0xa438, 0x6103, 0xa438, 0x8504,
+ 0xa438, 0xd704, 0xa438, 0x40b5, 0xa438, 0x0c03, 0xa438, 0x1502,
+ 0xa438, 0x8003, 0xa438, 0x9503, 0xa438, 0xcb94, 0xa438, 0x1000,
+ 0xa438, 0x10af, 0xa438, 0xd706, 0xa438, 0x7fa2, 0xa438, 0x800a,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x85f0, 0xa438, 0x9503,
+ 0xa438, 0xd705, 0xa438, 0x40b9, 0xa438, 0x0c1f, 0xa438, 0x0d00,
+ 0xa438, 0x8dc0, 0xa438, 0xf005, 0xa438, 0x0c1f, 0xa438, 0x0d07,
+ 0xa438, 0x8dc0, 0xa438, 0xa190, 0xa438, 0x1000, 0xa438, 0x12b5,
+ 0xa438, 0xd705, 0xa438, 0x39cc, 0xa438, 0x8617, 0xa438, 0x1800,
+ 0xa438, 0x1001, 0xa438, 0x1800, 0xa438, 0x82c7, 0xa438, 0xcb13,
+ 0xa438, 0xd706, 0xa438, 0x6089, 0xa438, 0xd1b8, 0xa438, 0xd04a,
+ 0xa438, 0xf003, 0xa438, 0xd11c, 0xa438, 0xd04b, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd701, 0xa438, 0x67d5, 0xa438, 0xd700,
+ 0xa438, 0x5f74, 0xa438, 0xd70c, 0xa438, 0x610c, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x6846, 0xa438, 0xd706,
+ 0xa438, 0x647b, 0xa438, 0xfffa, 0xa438, 0x1000, 0xa438, 0x1330,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f, 0xa438, 0x0f16,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd70c,
+ 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8f1f,
+ 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd70c,
+ 0xa438, 0x7f33, 0xa438, 0x1000, 0xa438, 0x12b5, 0xa438, 0x0c07,
+ 0xa438, 0x0c02, 0xa438, 0x0cc0, 0xa438, 0x0080, 0xa438, 0xd14a,
+ 0xa438, 0xd048, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
+ 0xa438, 0x5fb4, 0xa438, 0x1800, 0xa438, 0x8629, 0xa438, 0x800a,
0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa004, 0xa438, 0x1000,
0xa438, 0x1220, 0xa438, 0x8004, 0xa438, 0xa001, 0xa438, 0x1000,
0xa438, 0x1220, 0xa438, 0x8001, 0xa438, 0x1000, 0xa438, 0x1217,
- 0xa438, 0xa00a, 0xa438, 0xa780, 0xa438, 0xcb14, 0xa438, 0xd1b8,
- 0xa438, 0xd04a, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700,
- 0xa438, 0x5fb4, 0xa438, 0x6286, 0xa438, 0xd706, 0xa438, 0x5f5b,
- 0xa438, 0x800a, 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa004,
- 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8004, 0xa438, 0xa001,
- 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8001, 0xa438, 0x1000,
- 0xa438, 0x1217, 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0x1800,
- 0xa438, 0x8545, 0xa438, 0xa00a, 0xa438, 0x9308, 0xa438, 0xb210,
- 0xa438, 0xb301, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd701,
- 0xa438, 0x5fa4, 0xa438, 0xb302, 0xa438, 0x9210, 0xa438, 0xd409,
- 0xa438, 0x1000, 0xa438, 0x1203, 0xa438, 0xd103, 0xa438, 0xd04c,
+ 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0x1800, 0xa438, 0x04ed,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x5fab,
+ 0xa438, 0xba08, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f,
+ 0xa438, 0x7f8b, 0xa438, 0x9a08, 0xa438, 0x1800, 0xa438, 0x0581,
+ 0xa438, 0x800a, 0xa438, 0xd702, 0xa438, 0x6555, 0xa438, 0x1000,
+ 0xa438, 0x120e, 0xa438, 0xa004, 0xa438, 0x1000, 0xa438, 0x1220,
+ 0xa438, 0x8004, 0xa438, 0xa001, 0xa438, 0x1000, 0xa438, 0x1220,
+ 0xa438, 0x8001, 0xa438, 0x1000, 0xa438, 0x1217, 0xa438, 0xa00a,
+ 0xa438, 0xa780, 0xa438, 0xcb14, 0xa438, 0xd1b8, 0xa438, 0xd04a,
0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4,
- 0xa438, 0x1800, 0xa438, 0x0581, 0xa438, 0xd70c, 0xa438, 0x60b3,
- 0xa438, 0x1800, 0xa438, 0x8587, 0xa438, 0x1800, 0xa438, 0x001a,
- 0xa438, 0x1800, 0xa438, 0x12cb, 0xa436, 0xA10E, 0xa438, 0x12cf,
- 0xa436, 0xA10C, 0xa438, 0x04f8, 0xa436, 0xA10A, 0xa438, 0x1003,
- 0xa436, 0xA108, 0xa438, 0x15fb, 0xa436, 0xA106, 0xa438, 0x0d2b,
- 0xa436, 0xA104, 0xa438, 0x0ecb, 0xa436, 0xA102, 0xa438, 0x1119,
- 0xa436, 0xA100, 0xa438, 0x0960, 0xa436, 0xA110, 0xa438, 0x00ff,
- 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x1ff8,
- 0xa436, 0xA014, 0xa438, 0xa704, 0xa438, 0x0000, 0xa438, 0x0000,
- 0xa438, 0x819d, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
- 0xa438, 0x0000, 0xa436, 0xA164, 0xa438, 0x119F, 0xa436, 0xA166,
- 0xa438, 0x3fff, 0xa436, 0xA168, 0xa438, 0x3fff, 0xa436, 0xA16A,
- 0xa438, 0x11A1, 0xa436, 0xA16C, 0xa438, 0x3fff, 0xa436, 0xA16E,
- 0xa438, 0x3fff, 0xa436, 0xA170, 0xa438, 0x3fff, 0xa436, 0xA172,
- 0xa438, 0x3fff, 0xa436, 0xA162, 0xa438, 0x0009, 0xa436, 0xb87c,
- 0xa438, 0x8a63, 0xa436, 0xb87e, 0xa438, 0xaf8a, 0xa438, 0x7baf,
- 0xa438, 0x8ab6, 0xa438, 0xaf8a, 0xa438, 0xd6af, 0xa438, 0x8ae4,
- 0xa438, 0xaf8a, 0xa438, 0xf2af, 0xa438, 0x8b07, 0xa438, 0xaf8b,
- 0xa438, 0x07af, 0xa438, 0x8b07, 0xa438, 0xad35, 0xa438, 0x27bf,
- 0xa438, 0x7308, 0xa438, 0x027b, 0xa438, 0x07ac, 0xa438, 0x280d,
- 0xa438, 0xbf73, 0xa438, 0x0b02, 0xa438, 0x7b07, 0xa438, 0xac28,
- 0xa438, 0x04d0, 0xa438, 0x05ae, 0xa438, 0x02d0, 0xa438, 0x01d1,
- 0xa438, 0x01d3, 0xa438, 0x04ee, 0xa438, 0x8640, 0xa438, 0x00ee,
- 0xa438, 0x8641, 0xa438, 0x00af, 0xa438, 0x6aa6, 0xa438, 0xd100,
- 0xa438, 0xd300, 0xa438, 0xee86, 0xa438, 0x4001, 0xa438, 0xee86,
- 0xa438, 0x4124, 0xa438, 0xd00f, 0xa438, 0xaf6a, 0xa438, 0xa6bf,
- 0xa438, 0x739e, 0xa438, 0x027b, 0xa438, 0x07ad, 0xa438, 0x280b,
- 0xa438, 0xe18f, 0xa438, 0xfdad, 0xa438, 0x2805, 0xa438, 0xe08f,
- 0xa438, 0xfeae, 0xa438, 0x03e0, 0xa438, 0x8fff, 0xa438, 0xe489,
- 0xa438, 0xe7e0, 0xa438, 0x89e7, 0xa438, 0xaf67, 0xa438, 0x9fa0,
- 0xa438, 0x9402, 0xa438, 0xae03, 0xa438, 0xa0b5, 0xa438, 0x03af,
- 0xa438, 0x0d89, 0xa438, 0xaf0d, 0xa438, 0xafa0, 0xa438, 0x9402,
- 0xa438, 0xae03, 0xa438, 0xa0b5, 0xa438, 0x03af, 0xa438, 0x0c64,
- 0xa438, 0xaf0c, 0xa438, 0xcce0, 0xa438, 0x8013, 0xa438, 0x026b,
- 0xa438, 0xa4ad, 0xa438, 0x2109, 0xa438, 0x0264, 0xa438, 0x47bf,
- 0xa438, 0x769b, 0xa438, 0x027a, 0xa438, 0xbcaf, 0xa438, 0x6562,
+ 0xa438, 0x6286, 0xa438, 0xd706, 0xa438, 0x5f5b, 0xa438, 0x800a,
+ 0xa438, 0x1000, 0xa438, 0x120e, 0xa438, 0xa004, 0xa438, 0x1000,
+ 0xa438, 0x1220, 0xa438, 0x8004, 0xa438, 0xa001, 0xa438, 0x1000,
+ 0xa438, 0x1220, 0xa438, 0x8001, 0xa438, 0x1000, 0xa438, 0x1217,
+ 0xa438, 0x0c03, 0xa438, 0x0902, 0xa438, 0x1800, 0xa438, 0x8671,
+ 0xa438, 0xa00a, 0xa438, 0x9308, 0xa438, 0xb210, 0xa438, 0xb301,
+ 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd701, 0xa438, 0x5fa4,
+ 0xa438, 0xb302, 0xa438, 0x9210, 0xa438, 0xd409, 0xa438, 0x1000,
+ 0xa438, 0x1203, 0xa438, 0xd103, 0xa438, 0xd04c, 0xa438, 0x1000,
+ 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x1800,
+ 0xa438, 0x0581, 0xa438, 0xd70c, 0xa438, 0x60b3, 0xa438, 0x1800,
+ 0xa438, 0x86b3, 0xa438, 0x1800, 0xa438, 0x001a, 0xa438, 0x1800,
+ 0xa438, 0x12cb, 0xa436, 0xA10E, 0xa438, 0x12cf, 0xa436, 0xA10C,
+ 0xa438, 0x04f8, 0xa436, 0xA10A, 0xa438, 0x1003, 0xa436, 0xA108,
+ 0xa438, 0x15fb, 0xa436, 0xA106, 0xa438, 0x0d2b, 0xa436, 0xA104,
+ 0xa438, 0x0ecb, 0xa436, 0xA102, 0xa438, 0x1119, 0xa436, 0xA100,
+ 0xa438, 0x0960, 0xa436, 0xA110, 0xa438, 0x00ff, 0xa436, 0xA016,
+ 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x1ff8, 0xa436, 0xA014,
+ 0xa438, 0xa704, 0xa438, 0x82c7, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa436, 0xA164, 0xa438, 0x119F, 0xa436, 0xA166, 0xa438, 0x11A1,
+ 0xa436, 0xA168, 0xa438, 0x3fff, 0xa436, 0xA16A, 0xa438, 0x3fff,
+ 0xa436, 0xA16C, 0xa438, 0x3fff, 0xa436, 0xA16E, 0xa438, 0x3fff,
+ 0xa436, 0xA170, 0xa438, 0x3fff, 0xa436, 0xA172, 0xa438, 0x3fff,
+ 0xa436, 0xA162, 0xa438, 0x0003, 0xa436, 0xb87c, 0xa438, 0x8a63,
+ 0xa436, 0xb87e, 0xa438, 0xaf8a, 0xa438, 0x7baf, 0xa438, 0x8ab6,
+ 0xa438, 0xaf8a, 0xa438, 0xd6af, 0xa438, 0x8ae4, 0xa438, 0xaf8a,
+ 0xa438, 0xf2af, 0xa438, 0x8b01, 0xa438, 0xaf8b, 0xa438, 0x0aaf,
+ 0xa438, 0x8b10, 0xa438, 0xad35, 0xa438, 0x27bf, 0xa438, 0x7308,
+ 0xa438, 0x027b, 0xa438, 0x07ac, 0xa438, 0x280d, 0xa438, 0xbf73,
+ 0xa438, 0x0b02, 0xa438, 0x7b07, 0xa438, 0xac28, 0xa438, 0x04d0,
+ 0xa438, 0x05ae, 0xa438, 0x02d0, 0xa438, 0x01d1, 0xa438, 0x01d3,
+ 0xa438, 0x04ee, 0xa438, 0x8640, 0xa438, 0x00ee, 0xa438, 0x8641,
+ 0xa438, 0x00af, 0xa438, 0x6aa6, 0xa438, 0xd100, 0xa438, 0xd300,
+ 0xa438, 0xee86, 0xa438, 0x4001, 0xa438, 0xee86, 0xa438, 0x4124,
+ 0xa438, 0xd00f, 0xa438, 0xaf6a, 0xa438, 0xa6bf, 0xa438, 0x739e,
+ 0xa438, 0x027b, 0xa438, 0x07ad, 0xa438, 0x280b, 0xa438, 0xe18f,
+ 0xa438, 0xfdad, 0xa438, 0x2805, 0xa438, 0xe08f, 0xa438, 0xfeae,
+ 0xa438, 0x03e0, 0xa438, 0x8fff, 0xa438, 0xe489, 0xa438, 0xe7e0,
+ 0xa438, 0x89e7, 0xa438, 0xaf67, 0xa438, 0x9fa0, 0xa438, 0x9402,
+ 0xa438, 0xae03, 0xa438, 0xa0b5, 0xa438, 0x03af, 0xa438, 0x0d89,
+ 0xa438, 0xaf0d, 0xa438, 0xafa0, 0xa438, 0x9402, 0xa438, 0xae03,
+ 0xa438, 0xa0b5, 0xa438, 0x03af, 0xa438, 0x0c64, 0xa438, 0xaf0c,
+ 0xa438, 0xcce0, 0xa438, 0x86a5, 0xa438, 0xad25, 0xa438, 0x0602,
+ 0xa438, 0x6ba4, 0xa438, 0x0265, 0xa438, 0x4faf, 0xa438, 0x6e9a,
+ 0xa438, 0xac24, 0xa438, 0x03af, 0xa438, 0x6bb4, 0xa438, 0xaf6b,
+ 0xa438, 0xb602, 0xa438, 0x7ae8, 0xa438, 0xaf6c, 0xa438, 0xa100,
0xa436, 0xb85e, 0xa438, 0x6A7F, 0xa436, 0xb860, 0xa438, 0x679C,
0xa436, 0xb862, 0xa438, 0x0d86, 0xa436, 0xb864, 0xa438, 0x0c61,
- 0xa436, 0xb886, 0xa438, 0x6553, 0xa436, 0xb888, 0xa438, 0xffff,
- 0xa436, 0xb88a, 0xa438, 0xffff, 0xa436, 0xb88c, 0xa438, 0xffff,
- 0xa436, 0xb838, 0xa438, 0x001f, 0xb820, 0x0010, 0xa436, 0x8629,
+ 0xa436, 0xb886, 0xa438, 0x6E7C, 0xa436, 0xb888, 0xa438, 0x6BAE,
+ 0xa436, 0xb88a, 0xa438, 0x6C9B, 0xa436, 0xb88c, 0xa438, 0xffff,
+ 0xa436, 0xb838, 0xa438, 0x007f, 0xb820, 0x0010, 0xa436, 0x8629,
0xa438, 0xaf86, 0xa438, 0x41af, 0xa438, 0x8644, 0xa438, 0xaf88,
0xa438, 0x0caf, 0xa438, 0x8813, 0xa438, 0xaf88, 0xa438, 0x4baf,
0xa438, 0x884b, 0xa438, 0xaf88, 0xa438, 0x4baf, 0xa438, 0x884b,
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index 7cc4ee527f..36a7b57c97 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -123,11 +123,11 @@ extern const struct rtl_hw_ops rtl8168kb_ops;
#define NIC_RAMCODE_VERSION_CFG_METHOD_51 (0x0b99)
#define NIC_RAMCODE_VERSION_CFG_METHOD_54 (0x0013)
#define NIC_RAMCODE_VERSION_CFG_METHOD_55 (0x0001)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_56 (0x0016)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_57 (0x0001)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_56 (0x0027)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_57 (0x0027)
#define NIC_RAMCODE_VERSION_CFG_METHOD_69 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_70 (0x0033)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_71 (0x0051)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_71 (0x0060)
#define RTL_MAC_MCU_PAGE_SIZE 256
#define RTL_DEFAULT_MTU 1500
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/8] net/r8169: add support for RTL8127
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
2025-06-10 6:01 ` [PATCH 2/8] net/r8169: update HW configurations for 8125 and 8126 Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 4/8] net/r8169: remove cmac feature for RTL8125AP Howard Wang
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
doc/guides/nics/r8169.rst | 5 +-
drivers/net/r8169/base/rtl8125a.c | 8 +-
drivers/net/r8169/base/rtl8125a.h | 1 -
drivers/net/r8169/base/rtl8125a_mcu.c | 17 +-
drivers/net/r8169/base/rtl8125b.c | 5 +-
drivers/net/r8169/base/rtl8125b.h | 1 -
drivers/net/r8169/base/rtl8125b_mcu.c | 8 -
drivers/net/r8169/base/rtl8125bp.c | 5 +
drivers/net/r8169/base/rtl8125bp_mcu.c | 28 +-
drivers/net/r8169/base/rtl8125d.c | 5 +-
drivers/net/r8169/base/rtl8125d_mcu.c | 8 +-
drivers/net/r8169/base/rtl8125d_mcu.h | 1 -
drivers/net/r8169/base/rtl8126a.c | 5 +
drivers/net/r8169/base/rtl8126a_mcu.c | 20 +-
drivers/net/r8169/base/rtl8127.c | 365 ++++++++
drivers/net/r8169/base/rtl8127_mcu.c | 616 ++++++++++++++
drivers/net/r8169/base/rtl8127_mcu.h | 12 +
drivers/net/r8169/base/rtl8168kb.c | 5 +
drivers/net/r8169/meson.build | 2 +
drivers/net/r8169/r8169_compat.h | 52 +-
drivers/net/r8169/r8169_ethdev.c | 121 +--
drivers/net/r8169/r8169_ethdev.h | 4 +-
drivers/net/r8169/r8169_hw.c | 1050 ++++++++----------------
drivers/net/r8169/r8169_hw.h | 8 +
drivers/net/r8169/r8169_phy.c | 523 +++++-------
drivers/net/r8169/r8169_phy.h | 7 +-
drivers/net/r8169/r8169_rxtx.c | 64 +-
27 files changed, 1701 insertions(+), 1245 deletions(-)
create mode 100644 drivers/net/r8169/base/rtl8127.c
create mode 100644 drivers/net/r8169/base/rtl8127_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8127_mcu.h
diff --git a/doc/guides/nics/r8169.rst b/doc/guides/nics/r8169.rst
index f3c547c4d4..c0eeb5ec6a 100644
--- a/doc/guides/nics/r8169.rst
+++ b/doc/guides/nics/r8169.rst
@@ -4,8 +4,8 @@
R8169 Poll Mode Driver
======================
-The R8169 PMD provides poll mode driver support for Realtek 1, 2.5 and 5 Gigabit
-Ethernet NICs.
+The R8169 PMD provides poll mode driver support for Realtek 1, 2.5, 5 and 10
+Gigabit Ethernet NICs.
More information about Realtek 1G Ethernet NIC can be found at `RTL8168
<https://www.realtek.com/Product/Index?id=4080>`_.
@@ -22,6 +22,7 @@ Supported Chipsets and NICs
- Realtek RTL8168 1 Gigabit Ethernet Controller
- Realtek RTL8125 2.5 Gigabit Ethernet Controller
- Realtek RTL8126 5 Gigabit Ethernet Controller
+- Realtek RTL8127 10 Gigabit Ethernet Controller
Features
--------
diff --git a/drivers/net/r8169/base/rtl8125a.c b/drivers/net/r8169/base/rtl8125a.c
index 39ab308d51..114727b717 100644
--- a/drivers/net/r8169/base/rtl8125a.c
+++ b/drivers/net/r8169/base/rtl8125a.c
@@ -380,10 +380,12 @@ hw_mac_mcu_config_8125a(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ /* Get H/W mac mcu patch code version */
+ hw->hw_mcu_patch_code_ver = rtl_get_hw_mcu_patch_code_ver(hw);
+
switch (hw->mcfg) {
- case CFG_METHOD_48:
- rtl_set_mac_mcu_8125a_1(hw);
- break;
case CFG_METHOD_49:
rtl_set_mac_mcu_8125a_2(hw);
break;
diff --git a/drivers/net/r8169/base/rtl8125a.h b/drivers/net/r8169/base/rtl8125a.h
index 0b2e0492ab..e1f98fa40a 100644
--- a/drivers/net/r8169/base/rtl8125a.h
+++ b/drivers/net/r8169/base/rtl8125a.h
@@ -5,7 +5,6 @@
#ifndef RTL8125A_H
#define RTL8125A_H
-void rtl_set_mac_mcu_8125a_1(struct rtl_hw *hw);
void rtl_set_mac_mcu_8125a_2(struct rtl_hw *hw);
void rtl_set_phy_mcu_8125a_1(struct rtl_hw *hw);
diff --git a/drivers/net/r8169/base/rtl8125a_mcu.c b/drivers/net/r8169/base/rtl8125a_mcu.c
index e2d56102fb..b810787daa 100644
--- a/drivers/net/r8169/base/rtl8125a_mcu.c
+++ b/drivers/net/r8169/base/rtl8125a_mcu.c
@@ -11,15 +11,10 @@
/* ------------------------------------MAC 8125A------------------------------------- */
-void
-rtl_set_mac_mcu_8125a_1(struct rtl_hw *hw)
-{
- rtl_hw_disable_mac_mcu_bps(hw);
-}
-
void
rtl_set_mac_mcu_8125a_2(struct rtl_hw *hw)
{
+ u16 entry_cnt;
static const u16 mcu_patch_code_8125a_2[] = {
0xE010, 0xE012, 0xE022, 0xE024, 0xE029, 0xE02B, 0xE094, 0xE09D, 0xE09F,
0xE0AA, 0xE0B5, 0xE0C6, 0xE0CC, 0xE0D1, 0xE0D6, 0xE0D8, 0xC602, 0xBE00,
@@ -109,10 +104,14 @@ rtl_set_mac_mcu_8125a_2(struct rtl_hw *hw)
0x0B15, 0x090E, 0x1139
};
- rtl_hw_disable_mac_mcu_bps(hw);
+ entry_cnt = ARRAY_SIZE(mcu_patch_code_8125a_2);
+
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code_8125a_2,
+ entry_cnt);
- rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125a_2,
- ARRAY_SIZE(mcu_patch_code_8125a_2));
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125a_2, entry_cnt);
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
diff --git a/drivers/net/r8169/base/rtl8125b.c b/drivers/net/r8169/base/rtl8125b.c
index 06cd125bcf..3b094f3080 100644
--- a/drivers/net/r8169/base/rtl8125b.c
+++ b/drivers/net/r8169/base/rtl8125b.c
@@ -362,10 +362,9 @@ hw_mac_mcu_config_8125b(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
switch (hw->mcfg) {
- case CFG_METHOD_50:
- rtl_set_mac_mcu_8125b_1(hw);
- break;
case CFG_METHOD_51:
rtl_set_mac_mcu_8125b_2(hw);
break;
diff --git a/drivers/net/r8169/base/rtl8125b.h b/drivers/net/r8169/base/rtl8125b.h
index ec63446e89..b2df6746be 100644
--- a/drivers/net/r8169/base/rtl8125b.h
+++ b/drivers/net/r8169/base/rtl8125b.h
@@ -5,7 +5,6 @@
#ifndef RTL8125B_H
#define RTL8125B_H
-void rtl_set_mac_mcu_8125b_1(struct rtl_hw *hw);
void rtl_set_mac_mcu_8125b_2(struct rtl_hw *hw);
void rtl_set_phy_mcu_8125b_1(struct rtl_hw *hw);
diff --git a/drivers/net/r8169/base/rtl8125b_mcu.c b/drivers/net/r8169/base/rtl8125b_mcu.c
index 03b004b430..afc17707ec 100644
--- a/drivers/net/r8169/base/rtl8125b_mcu.c
+++ b/drivers/net/r8169/base/rtl8125b_mcu.c
@@ -11,12 +11,6 @@
/* ------------------------------------MAC 8125B------------------------------------- */
-void
-rtl_set_mac_mcu_8125b_1(struct rtl_hw *hw)
-{
- rtl_hw_disable_mac_mcu_bps(hw);
-}
-
void
rtl_set_mac_mcu_8125b_2(struct rtl_hw *hw)
{
@@ -38,8 +32,6 @@ rtl_set_mac_mcu_8125b_2(struct rtl_hw *hw)
0x0000, 0xC602, 0xBE00, 0x0000
};
- rtl_hw_disable_mac_mcu_bps(hw);
-
rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125b_2,
ARRAY_SIZE(mcu_patch_code_8125b_2));
diff --git a/drivers/net/r8169/base/rtl8125bp.c b/drivers/net/r8169/base/rtl8125bp.c
index 19d0d256af..fe546cf9a3 100644
--- a/drivers/net/r8169/base/rtl8125bp.c
+++ b/drivers/net/r8169/base/rtl8125bp.c
@@ -83,6 +83,11 @@ hw_mac_mcu_config_8125bp(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ /* Get H/W mac mcu patch code version */
+ hw->hw_mcu_patch_code_ver = rtl_get_hw_mcu_patch_code_ver(hw);
+
switch (hw->mcfg) {
case CFG_METHOD_54:
rtl_set_mac_mcu_8125bp_1(hw);
diff --git a/drivers/net/r8169/base/rtl8125bp_mcu.c b/drivers/net/r8169/base/rtl8125bp_mcu.c
index 05e04dbf84..2a9d0a3d48 100644
--- a/drivers/net/r8169/base/rtl8125bp_mcu.c
+++ b/drivers/net/r8169/base/rtl8125bp_mcu.c
@@ -14,7 +14,8 @@
void
rtl_set_mac_mcu_8125bp_1(struct rtl_hw *hw)
{
- static const u16 mcu_patch_code_8125bp_1[] = {
+ u16 entry_cnt;
+ static const u16 mcu_patch_code[] = {
0xE010, 0xE014, 0xE027, 0xE04A, 0xE04D, 0xE050, 0xE052, 0xE054, 0xE056,
0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xE064, 0x1BC8, 0x46EB,
0xC302, 0xBB00, 0x0F14, 0xC211, 0x400A, 0xF00A, 0xC20F, 0x400A, 0xF007,
@@ -31,10 +32,14 @@ rtl_set_mac_mcu_8125bp_1(struct rtl_hw *hw)
0x0000, 0x6936, 0x0A18, 0x0C02, 0x0D21
};
- rtl_hw_disable_mac_mcu_bps(hw);
+ entry_cnt = ARRAY_SIZE(mcu_patch_code);
- rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125bp_1,
- ARRAY_SIZE(mcu_patch_code_8125bp_1));
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code,
+ entry_cnt);
+
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code, entry_cnt);
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
@@ -52,7 +57,8 @@ rtl_set_mac_mcu_8125bp_1(struct rtl_hw *hw)
void
rtl_set_mac_mcu_8125bp_2(struct rtl_hw *hw)
{
- static const u16 mcu_patch_code_8125bp_2[] = {
+ u16 entry_cnt;
+ static const u16 mcu_patch_code[] = {
0xE010, 0xE033, 0xE046, 0xE04A, 0xE04D, 0xE050, 0xE052, 0xE054, 0xE056,
0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xE064, 0xB406, 0x1000,
0xF016, 0xC61F, 0x400E, 0xF012, 0x218E, 0x25BE, 0x1300, 0xF007, 0x7340,
@@ -68,9 +74,15 @@ rtl_set_mac_mcu_8125bp_2(struct rtl_hw *hw)
0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
0x0000, 0x6936, 0x0B18, 0x0C02, 0x0D22
};
- rtl_hw_disable_mac_mcu_bps(hw);
- rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125bp_2,
- ARRAY_SIZE(mcu_patch_code_8125bp_2));
+
+ entry_cnt = ARRAY_SIZE(mcu_patch_code);
+
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code,
+ entry_cnt);
+
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code, entry_cnt);
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
diff --git a/drivers/net/r8169/base/rtl8125d.c b/drivers/net/r8169/base/rtl8125d.c
index 3d4b60abc9..55bfdbcf21 100644
--- a/drivers/net/r8169/base/rtl8125d.c
+++ b/drivers/net/r8169/base/rtl8125d.c
@@ -275,13 +275,12 @@ hw_mac_mcu_config_8125d(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
switch (hw->mcfg) {
case CFG_METHOD_56:
rtl_set_mac_mcu_8125d_1(hw);
break;
- case CFG_METHOD_57:
- rtl_set_mac_mcu_8125d_2(hw);
- break;
}
}
diff --git a/drivers/net/r8169/base/rtl8125d_mcu.c b/drivers/net/r8169/base/rtl8125d_mcu.c
index 8f01b5414e..2f6d1df584 100644
--- a/drivers/net/r8169/base/rtl8125d_mcu.c
+++ b/drivers/net/r8169/base/rtl8125d_mcu.c
@@ -102,7 +102,7 @@ rtl_set_mac_mcu_8125d_1(struct rtl_hw *hw)
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x6938,
0x0A18, 0x0217, 0x0D2A
};
- rtl_hw_disable_mac_mcu_bps(hw);
+
rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8125d_1,
ARRAY_SIZE(mcu_patch_code_8125d_1));
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
@@ -110,12 +110,6 @@ rtl_set_mac_mcu_8125d_1(struct rtl_hw *hw)
rtl_mac_ocp_write(hw, 0xFC48, 0x0001);
}
-void
-rtl_set_mac_mcu_8125d_2(struct rtl_hw *hw)
-{
- rtl_hw_disable_mac_mcu_bps(hw);
-}
-
/* ------------------------------------PHY 8125D--------------------------------------- */
static const u16 phy_mcu_ram_code_8125d_1_1[] = {
diff --git a/drivers/net/r8169/base/rtl8125d_mcu.h b/drivers/net/r8169/base/rtl8125d_mcu.h
index 82b70e5b53..163e0e8123 100644
--- a/drivers/net/r8169/base/rtl8125d_mcu.h
+++ b/drivers/net/r8169/base/rtl8125d_mcu.h
@@ -6,7 +6,6 @@
#define RTL8125D_MCU_H
void rtl_set_mac_mcu_8125d_1(struct rtl_hw *hw);
-void rtl_set_mac_mcu_8125d_2(struct rtl_hw *hw);
void rtl_set_phy_mcu_8125d_1(struct rtl_hw *hw);
void rtl_set_phy_mcu_8125d_2(struct rtl_hw *hw);
diff --git a/drivers/net/r8169/base/rtl8126a.c b/drivers/net/r8169/base/rtl8126a.c
index cd6ac5e4e9..047ef83587 100644
--- a/drivers/net/r8169/base/rtl8126a.c
+++ b/drivers/net/r8169/base/rtl8126a.c
@@ -491,6 +491,11 @@ hw_mac_mcu_config_8126a(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ /* Get H/W mac mcu patch code version */
+ hw->hw_mcu_patch_code_ver = rtl_get_hw_mcu_patch_code_ver(hw);
+
switch (hw->mcfg) {
case CFG_METHOD_69:
rtl_set_mac_mcu_8126a_1(hw);
diff --git a/drivers/net/r8169/base/rtl8126a_mcu.c b/drivers/net/r8169/base/rtl8126a_mcu.c
index ba8112d723..759e2df7cf 100644
--- a/drivers/net/r8169/base/rtl8126a_mcu.c
+++ b/drivers/net/r8169/base/rtl8126a_mcu.c
@@ -25,8 +25,6 @@ rtl_set_mac_mcu_8126a_1(struct rtl_hw *hw)
0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
};
- rtl_hw_disable_mac_mcu_bps(hw);
-
rtl_write_mac_mcu_ram_code(hw, mcu_patch_code_8126a_1,
ARRAY_SIZE(mcu_patch_code_8126a_1));
@@ -67,10 +65,13 @@ rtl_set_mac_mcu_8126a_2(struct rtl_hw *hw)
0x0000, 0xC602, 0xBE00, 0x0000, 0x6847, 0x0A18, 0x0C02, 0x0B30
};
- rtl_hw_disable_mac_mcu_bps(hw);
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
- rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
- ARRAY_SIZE(mcu_patch_code));
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
@@ -104,10 +105,13 @@ rtl_set_mac_mcu_8126a_3(struct rtl_hw *hw)
0x0000, 0x6847, 0x0B18, 0x0C02, 0x0D10
};
- rtl_hw_disable_mac_mcu_bps(hw);
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
- rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
- ARRAY_SIZE(mcu_patch_code));
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code,
+ ARRAY_SIZE(mcu_patch_code));
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
diff --git a/drivers/net/r8169/base/rtl8127.c b/drivers/net/r8169/base/rtl8127.c
new file mode 100644
index 0000000000..fac6165931
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8127.c
@@ -0,0 +1,365 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_ethdev.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8127_mcu.h"
+
+/* For RTL8127, CFG_METHOD_91 */
+
+static void
+hw_init_rxcfg_8127(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ RTL_W32(hw, RxConfig, Rx_Fetch_Number_8 | Rx_Close_Multiple |
+ RxCfg_pause_slot_en | (RX_DMA_BURST_512 << RxCfgDMAShift));
+ break;
+ }
+}
+
+static void
+hw_ephy_config_8127(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ rtl_ephy_write(hw, 0x8088, 0x0064);
+ rtl_ephy_write(hw, 0x8488, 0x0064);
+ rtl_ephy_write(hw, 0x8888, 0x0064);
+ rtl_ephy_write(hw, 0x8C88, 0x0064);
+ rtl_ephy_write(hw, 0x8188, 0x0064);
+ rtl_ephy_write(hw, 0x8588, 0x0064);
+ rtl_ephy_write(hw, 0x8988, 0x0064);
+ rtl_ephy_write(hw, 0x8D88, 0x0064);
+ rtl_ephy_write(hw, 0x808C, 0x09B0);
+ rtl_ephy_write(hw, 0x848C, 0x09B0);
+ rtl_ephy_write(hw, 0x888C, 0x0F90);
+ rtl_ephy_write(hw, 0x8C8C, 0x0F90);
+ rtl_ephy_write(hw, 0x818C, 0x09B0);
+ rtl_ephy_write(hw, 0x858C, 0x09B0);
+ rtl_ephy_write(hw, 0x898C, 0x0F90);
+ rtl_ephy_write(hw, 0x8D8C, 0x0F90);
+ rtl_ephy_write(hw, 0x808A, 0x09B8);
+ rtl_ephy_write(hw, 0x848A, 0x09B8);
+ rtl_ephy_write(hw, 0x888A, 0x0F98);
+ rtl_ephy_write(hw, 0x8C8A, 0x0F98);
+ rtl_ephy_write(hw, 0x818A, 0x09B8);
+ rtl_ephy_write(hw, 0x858A, 0x09B8);
+ rtl_ephy_write(hw, 0x898A, 0x0F98);
+ rtl_ephy_write(hw, 0x8D8A, 0x0F98);
+ rtl_ephy_write(hw, 0x9020, 0x0080);
+ rtl_ephy_write(hw, 0x9420, 0x0080);
+ rtl_ephy_write(hw, 0x9820, 0x0080);
+ rtl_ephy_write(hw, 0x9C20, 0x0080);
+ rtl_ephy_write(hw, 0x901E, 0x0190);
+ rtl_ephy_write(hw, 0x941E, 0x0190);
+ rtl_ephy_write(hw, 0x981E, 0x0140);
+ rtl_ephy_write(hw, 0x9C1E, 0x0140);
+ rtl_ephy_write(hw, 0x901C, 0x0190);
+ rtl_ephy_write(hw, 0x941C, 0x0190);
+ rtl_ephy_write(hw, 0x981C, 0x0140);
+ rtl_ephy_write(hw, 0x9C1C, 0x0140);
+
+ /* Clear extended address */
+ rtl8127_clear_ephy_ext_addr(hw);
+ break;
+ default:
+ /* nothing to do */
+ break;
+ }
+}
+
+static void
+rtl8127_tgphy_irq_mask_and_ack(struct rtl_hw *hw)
+{
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA4D2, 0x0000);
+ (void)rtl_mdio_direct_read_phy_ocp(hw, 0xA4D4);
+}
+
+static void
+rtl_hw_phy_config_8127a_1(struct rtl_hw *hw)
+{
+ rtl8127_tgphy_irq_mask_and_ack(hw);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8415);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x9300);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81A3);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0F00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81AE);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0F00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81B9);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xB900);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x83B0);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0x0E00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x83C5);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0x0E00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x83DA);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0x0E00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x83EF);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0x0E00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8173);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x8620);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8175);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x8671);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x817C);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8187);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8192);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x819D);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81A8);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81B3);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81BE);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_13);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x817D);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xA600);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8188);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xA600);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8193);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xA600);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x819E);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xA600);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81A9);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x1400);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81B4);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x1400);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81BF);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0xA600);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xAEAA, BIT_5 | BIT_3);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84F0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x201C);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84F2);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x3117);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xAEC6, 0x0000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xAE20, 0xFFFF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xAECE, 0xFFFF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xAED2, 0xFFFF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xAEC8, 0x0000);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xAED0, BIT_0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xADB8, 0x0150);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8197);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8231);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x82CB);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x82CD);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5700);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8233);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5700);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8199);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5700);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x815A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0150);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x81F4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0150);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x828E);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0150);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x81B1);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x824B);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x82E5);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0000);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84F7);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x2800);
+ rtl_set_eth_phy_ocp_bit(hw, 0xAEC2, BIT_12);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x81B3);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0xAD00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x824D);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0xAD00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x82E7);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0xAD00);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xAE4E, 0x000F, 0x0001);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x82CE);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xF000, 0x4000);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84AC);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84AE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84B0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xF818);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x84B2);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x6000);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FFC);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x6008);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FFE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xF450);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8015);
+ rtl_set_eth_phy_ocp_bit(hw, 0xB87E, BIT_9);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8016);
+ rtl_set_eth_phy_ocp_bit(hw, 0xB87E, BIT_11);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FE6);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0800);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FE4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x2114);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8647);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xA7B1);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8649);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xBBCA);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x864B);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0xDC00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8154);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xC000, 0x4000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8158);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0xC000);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x826C);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFFF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x826E);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFFF);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8872);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0E00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8012);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_11);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8012);
+ rtl_set_eth_phy_ocp_bit(hw, 0xA438, BIT_14);
+ rtl_set_eth_phy_ocp_bit(hw, 0xB576, BIT_0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x834A);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0700);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8217);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0x3F00, 0x2A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81B1);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0B00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8370);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x8671);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8372);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x86C8);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8401);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x86C8);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8403);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x86DA);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8406);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8408);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x840A);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x840C);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x840E);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8410);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8412);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8414);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8416);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0x1800, 0x1000);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x82BD);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x1F40);
+
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBFB4, 0x07FF, 0x0328);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xBFB6, 0x3E14);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81C4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x003B);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x0086);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00B7);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00DB);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00FE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00FE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00FE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00FE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x00C3);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x0078);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x0047);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x0023);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88D7);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x01A0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88D9);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x01A0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FFA);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x002A);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FEE);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFDF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFDF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF1);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xDF0A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF3);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x4AAA);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF5);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x5A0A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF7);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x4AAA);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF9);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5A00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88D5);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0200);
+
+ rtl_set_eth_phy_ocp_bit(hw, 0xA430, BIT_1 | BIT_0);
+}
+
+static void
+hw_phy_config_8127(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ rtl_hw_phy_config_8127a_1(hw);
+ break;
+ }
+}
+
+static void
+hw_mac_mcu_config_8127(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+
+ /* Get H/W mac mcu patch code version */
+ hw->hw_mcu_patch_code_ver = rtl_get_hw_mcu_patch_code_ver(hw);
+
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ rtl_set_mac_mcu_8127a_1(hw);
+ break;
+ }
+}
+
+static void
+hw_phy_mcu_config_8127(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ rtl_set_phy_mcu_8127a_1(hw);
+ break;
+ }
+}
+
+const struct rtl_hw_ops rtl8127_ops = {
+ .hw_init_rxcfg = hw_init_rxcfg_8127,
+ .hw_ephy_config = hw_ephy_config_8127,
+ .hw_phy_config = hw_phy_config_8127,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8127,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8127,
+};
diff --git a/drivers/net/r8169/base/rtl8127_mcu.c b/drivers/net/r8169/base/rtl8127_mcu.c
new file mode 100644
index 0000000000..44e6d96d9e
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8127_mcu.c
@@ -0,0 +1,616 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_ethdev.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8127_mcu.h"
+
+/* For RTL8127, CFG_METHOD_91 */
+
+/* ------------------------------------MAC 8127------------------------------------- */
+
+static void
+_rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
+{
+ u16 entry_cnt;
+ static const u16 mcu_patch_code[] = {
+ 0xE010, 0xE012, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE0CF, 0xE180, 0xE182,
+ 0xE184, 0xE186, 0xE188, 0xE18A, 0xE18C, 0xE18E, 0xE190, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0xC502, 0xBD00, 0x0000, 0xC502, 0xBD00,
+ 0x0000, 0xC502, 0xBD00, 0x0000, 0xC643, 0x76C0, 0x49E1, 0xF13F, 0xC140,
+ 0x7720, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006,
+ 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A0E, 0x44DA, 0xE893,
+ 0x481C, 0xE884, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003,
+ 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A12,
+ 0x44DA, 0xE87F, 0x481F, 0xE870, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A,
+ 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C,
+ 0x21B8, 0x1A1C, 0x44DA, 0xE86B, 0x481F, 0xE85C, 0xE004, 0xE04F, 0xDD98,
+ 0xD450, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006,
+ 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A0E, 0x44DA, 0xE854,
+ 0x489E, 0x481F, 0xE844, 0xE001, 0x1908, 0xE83E, 0x49E0, 0xF003, 0x1B00,
+ 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002,
+ 0x1B0C, 0x21B8, 0x1A8A, 0x44DA, 0xE83D, 0x4813, 0xE82E, 0x49F9, 0xF106,
+ 0x4838, 0xE837, 0x4813, 0xE828, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A,
+ 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C,
+ 0x21B8, 0x1A84, 0x44DA, 0xE823, 0x4890, 0x4811, 0xE813, 0x49F9, 0xF106,
+ 0x4838, 0xE81C, 0x4890, 0x4811, 0xE80C, 0xC207, 0x7440, 0xC602, 0xBE00,
+ 0x1600, 0x0FFE, 0xDE20, 0xE092, 0xC3FD, 0xE802, 0xFF80, 0xC0FB, 0x7202,
+ 0x49AE, 0xF1FE, 0x9900, 0x44D3, 0x4413, 0x482F, 0x9A02, 0x7202, 0x49AE,
+ 0xF1FE, 0xFF80, 0xC0EE, 0x7202, 0x49AE, 0xF1FE, 0x44D3, 0x4413, 0x48AF,
+ 0x9A02, 0x7202, 0x49AE, 0xF1FE, 0x7100, 0xFF80, 0xB401, 0xB402, 0xB404,
+ 0xB407, 0xC61F, 0x76C0, 0x49E1, 0xF164, 0xC11C, 0x7720, 0x1906, 0xE88A,
+ 0x1B0C, 0x21B8, 0x1A40, 0x44DA, 0xE895, 0x4810, 0xE886, 0x190C, 0xE881,
+ 0x1B08, 0x21B8, 0x1A26, 0x44DA, 0xE88C, 0x4890, 0x4891, 0xE87C, 0x49F9,
+ 0xF107, 0x4898, 0x4899, 0xE877, 0xE003, 0xDD98, 0xD450, 0x1908, 0xE86F,
+ 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E2,
+ 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A5C, 0x44DA, 0xE86E, 0x4897,
+ 0x4898, 0x4819, 0x481A, 0xE85C, 0x49F9, 0xF109, 0x4838, 0xE865, 0x4897,
+ 0x4898, 0x4819, 0x481A, 0xE853, 0xE001, 0x190A, 0xE84D, 0x1B00, 0xE85B,
+ 0x44E1, 0x4838, 0xE858, 0x44E9, 0x1908, 0xE845, 0x49E0, 0xF003, 0x1B00,
+ 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002,
+ 0x1B0C, 0x21B8, 0x1A86, 0x44DA, 0xE844, 0x44CC, 0xE835, 0x49F9, 0xF108,
+ 0x4838, 0xE83E, 0x44CD, 0xE82F, 0xE003, 0xE021, 0xFFC0, 0x190A, 0xE827,
+ 0x1B00, 0x4839, 0xE834, 0x249A, 0x1C00, 0x44E1, 0x1909, 0xE81F, 0x49E0,
+ 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003,
+ 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A1A, 0x44DA, 0xE81E, 0xC5E4, 0x414D,
+ 0x418C, 0xE80D, 0xB007, 0xB004, 0xB002, 0xB001, 0xC602, 0xBE00, 0x15E6,
+ 0x0FFE, 0xDE20, 0xC3FE, 0xE802, 0xFF80, 0xC0FC, 0x7202, 0x49AE, 0xF1FE,
+ 0x9900, 0x44D3, 0x4413, 0x482F, 0x9A02, 0x7202, 0x49AE, 0xF1FE, 0xFF80,
+ 0xC0EF, 0x7202, 0x49AE, 0xF1FE, 0x44D3, 0x4413, 0x48AF, 0x9A02, 0x7202,
+ 0x49AE, 0xF1FE, 0x7100, 0xFF80, 0xC502, 0xBD00, 0x0000, 0xC502, 0xBD00,
+ 0x0000, 0xC502, 0xBD00, 0x0000, 0xC302, 0xBB00, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC102, 0xB900, 0x0000, 0xC102, 0xB900, 0x0000, 0xC602, 0xBE00,
+ 0x0000, 0xC602, 0xBE00, 0x0000, 0x6961, 0x0018, 0x0C11, 0x0A38
+ };
+
+ entry_cnt = ARRAY_SIZE(mcu_patch_code);
+
+ /* Get BIN mac mcu patch code version */
+ hw->bin_mcu_patch_code_ver = rtl_get_bin_mcu_patch_code_ver(mcu_patch_code,
+ entry_cnt);
+
+ if (hw->hw_mcu_patch_code_ver != hw->bin_mcu_patch_code_ver)
+ rtl_write_mac_mcu_ram_code(hw, mcu_patch_code, entry_cnt);
+
+ rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
+
+ rtl_mac_ocp_write(hw, 0xFC32, 0x15FE);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x15E4);
+
+ rtl_mac_ocp_write(hw, 0xFC48, 0x0060);
+}
+
+void
+rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
+{
+ u8 tmp = (u8)rtl_mac_ocp_read(hw, 0xD006);
+
+ if (tmp != 0x04)
+ return;
+ _rtl_set_mac_mcu_8127a_1(hw);
+}
+
+/* ------------------------------------PHY 8127------------------------------------- */
+
+static const u16 phy_mcu_ram_code_8127a_1[] = {
+ 0xa436, 0x8023, 0xa438, 0x6100, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x801a,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x801a,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x801a,
+ 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0xce00, 0xa438, 0x2941,
+ 0xa438, 0x8017, 0xa438, 0x2c59, 0xa438, 0x8017, 0xa438, 0x1800,
+ 0xa438, 0x0e11, 0xa438, 0x8aff, 0xa438, 0x1800, 0xa438, 0x0e11,
+ 0xa436, 0xA026, 0xa438, 0xffff, 0xa436, 0xA024, 0xa438, 0xffff,
+ 0xa436, 0xA022, 0xa438, 0xffff, 0xa436, 0xA020, 0xa438, 0xffff,
+ 0xa436, 0xA006, 0xa438, 0xffff, 0xa436, 0xA004, 0xa438, 0xffff,
+ 0xa436, 0xA002, 0xa438, 0xffff, 0xa436, 0xA000, 0xa438, 0x0e10,
+ 0xa436, 0xA008, 0xa438, 0x0100, 0xa436, 0xA016, 0xa438, 0x0000,
+ 0xa436, 0xA012, 0xa438, 0x0ff8, 0xa436, 0xA014, 0xa438, 0x219a,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA152,
+ 0xa438, 0x21a4, 0xa436, 0xA154, 0xa438, 0x3fff, 0xa436, 0xA156,
+ 0xa438, 0x3fff, 0xa436, 0xA158, 0xa438, 0x3fff, 0xa436, 0xA15A,
+ 0xa438, 0x3fff, 0xa436, 0xA15C, 0xa438, 0x3fff, 0xa436, 0xA15E,
+ 0xa438, 0x3fff, 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150,
+ 0xa438, 0x0001, 0xa436, 0xA016, 0xa438, 0x0010, 0xa436, 0xA012,
+ 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010,
+ 0xa438, 0x1800, 0xa438, 0x8014, 0xa438, 0x1800, 0xa438, 0x801a,
+ 0xa438, 0x1800, 0xa438, 0x801e, 0xa438, 0x1800, 0xa438, 0x8026,
+ 0xa438, 0x1800, 0xa438, 0x802e, 0xa438, 0x1800, 0xa438, 0x8036,
+ 0xa438, 0x1800, 0xa438, 0x803a, 0xa438, 0xce01, 0xa438, 0x8208,
+ 0xa438, 0x1800, 0xa438, 0x0028, 0xa438, 0x1000, 0xa438, 0x02c5,
+ 0xa438, 0x1000, 0xa438, 0x0304, 0xa438, 0x1800, 0xa438, 0x0119,
+ 0xa438, 0xce01, 0xa438, 0x8208, 0xa438, 0x1800, 0xa438, 0x009e,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa50f, 0xa438, 0x8208,
+ 0xa438, 0xd500, 0xa438, 0xaa0f, 0xa438, 0x1800, 0xa438, 0x015b,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa50f, 0xa438, 0x8208,
+ 0xa438, 0xd500, 0xa438, 0xaa0f, 0xa438, 0x1800, 0xa438, 0x01a9,
+ 0xa438, 0xd501, 0xa438, 0xce01, 0xa438, 0xa50f, 0xa438, 0x8208,
+ 0xa438, 0xd500, 0xa438, 0xaa0f, 0xa438, 0x1800, 0xa438, 0x01f4,
+ 0xa438, 0x8208, 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x02a5,
+ 0xa438, 0xa208, 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x02b8,
+ 0xa436, 0xA08E, 0xa438, 0x02b7, 0xa436, 0xA08C, 0xa438, 0x02a4,
+ 0xa436, 0xA08A, 0xa438, 0x01e7, 0xa436, 0xA088, 0xa438, 0x019c,
+ 0xa436, 0xA086, 0xa438, 0x014e, 0xa436, 0xA084, 0xa438, 0x009d,
+ 0xa436, 0xA082, 0xa438, 0x0117, 0xa436, 0xA080, 0xa438, 0x0027,
+ 0xa436, 0xA090, 0xa438, 0x00ff, 0xa436, 0xA016, 0xa438, 0x0020,
+ 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800,
+ 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x801d, 0xa438, 0x1800,
+ 0xa438, 0x803b, 0xa438, 0x1800, 0xa438, 0x8087, 0xa438, 0x1800,
+ 0xa438, 0x808e, 0xa438, 0x1800, 0xa438, 0x809d, 0xa438, 0x1800,
+ 0xa438, 0x80b7, 0xa438, 0x1800, 0xa438, 0x80c4, 0xa438, 0xd1bc,
+ 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x1cd2, 0xa438, 0xd700,
+ 0xa438, 0x5fba, 0xa438, 0xd700, 0xa438, 0x273d, 0xa438, 0x801b,
+ 0xa438, 0x1800, 0xa438, 0x07d1, 0xa438, 0x1800, 0xa438, 0x080e,
+ 0xa438, 0xd700, 0xa438, 0x37c9, 0xa438, 0x8032, 0xa438, 0x33a9,
+ 0xa438, 0x802a, 0xa438, 0xd705, 0xa438, 0x4084, 0xa438, 0xd1f4,
+ 0xa438, 0xd048, 0xa438, 0xf013, 0xa438, 0xd1b7, 0xa438, 0xd04b,
+ 0xa438, 0xf010, 0xa438, 0xd705, 0xa438, 0x4084, 0xa438, 0xd1f4,
+ 0xa438, 0xd048, 0xa438, 0xf00b, 0xa438, 0xd1b7, 0xa438, 0xd04b,
+ 0xa438, 0xf008, 0xa438, 0xd705, 0xa438, 0x4084, 0xa438, 0xd1f4,
+ 0xa438, 0xd048, 0xa438, 0xf003, 0xa438, 0xd1b7, 0xa438, 0xd04b,
+ 0xa438, 0x1800, 0xa438, 0x14cc, 0xa438, 0xd700, 0xa438, 0x2b59,
+ 0xa438, 0x803f, 0xa438, 0xf003, 0xa438, 0x1800, 0xa438, 0x118f,
+ 0xa438, 0x6060, 0xa438, 0x1800, 0xa438, 0x1167, 0xa438, 0xd700,
+ 0xa438, 0x60c7, 0xa438, 0xd704, 0xa438, 0x609f, 0xa438, 0xd705,
+ 0xa438, 0x4043, 0xa438, 0xf003, 0xa438, 0x1800, 0xa438, 0x1150,
+ 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x8702, 0xa438, 0x8011,
+ 0xa438, 0x9503, 0xa438, 0x800a, 0xa438, 0x81a0, 0xa438, 0x8302,
+ 0xa438, 0x8480, 0xa438, 0x8686, 0xa438, 0xcde0, 0xa438, 0xd1ff,
+ 0xa438, 0xd049, 0xa438, 0x1000, 0xa438, 0x1cd2, 0xa438, 0xd700,
+ 0xa438, 0x5fba, 0xa438, 0xd705, 0xa438, 0x417e, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0xa011, 0xa438, 0x9503, 0xa438, 0xd1c8,
+ 0xa438, 0xd045, 0xa438, 0x1000, 0xa438, 0x1cd2, 0xa438, 0xd700,
+ 0xa438, 0x5fba, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0xa702,
+ 0xa438, 0x9503, 0xa438, 0xa00a, 0xa438, 0xa1a0, 0xa438, 0xa480,
+ 0xa438, 0xa686, 0xa438, 0xd705, 0xa438, 0x605e, 0xa438, 0xa302,
+ 0xa438, 0x9503, 0xa438, 0xd700, 0xa438, 0x37c9, 0xa438, 0x8083,
+ 0xa438, 0x33a9, 0xa438, 0x807f, 0xa438, 0xd178, 0xa438, 0xd04b,
+ 0xa438, 0x1800, 0xa438, 0x115d, 0xa438, 0xd1c8, 0xa438, 0xd04b,
+ 0xa438, 0x1800, 0xa438, 0x115d, 0xa438, 0xd1e6, 0xa438, 0xd04b,
+ 0xa438, 0x1800, 0xa438, 0x115d, 0xa438, 0xd71f, 0xa438, 0x6080,
+ 0xa438, 0xd704, 0xa438, 0x1800, 0xa438, 0x1bc0, 0xa438, 0x1800,
+ 0xa438, 0x1bc4, 0xa438, 0x4134, 0xa438, 0xd115, 0xa438, 0xd04f,
+ 0xa438, 0x1000, 0xa438, 0x1d0b, 0xa438, 0x1000, 0xa438, 0x80ad,
+ 0xa438, 0x1800, 0xa438, 0x01f2, 0xa438, 0x1000, 0xa438, 0x1d0b,
+ 0xa438, 0x1000, 0xa438, 0x80ad, 0xa438, 0x1800, 0xa438, 0x01f9,
+ 0xa438, 0x2969, 0xa438, 0x80a3, 0xa438, 0xd700, 0xa438, 0x606b,
+ 0xa438, 0xd701, 0xa438, 0x60b4, 0xa438, 0x1000, 0xa438, 0x80ad,
+ 0xa438, 0x1800, 0xa438, 0x0551, 0xa438, 0xd196, 0xa438, 0xd04d,
+ 0xa438, 0x1000, 0xa438, 0x80ad, 0xa438, 0x1800, 0xa438, 0x054d,
+ 0xa438, 0xd208, 0xa438, 0x0c09, 0xa438, 0x1301, 0xa438, 0x1000,
+ 0xa438, 0x1cd2, 0xa438, 0xd701, 0xa438, 0x5fa3, 0xa438, 0xb302,
+ 0xa438, 0xd200, 0xa438, 0x0800, 0xa438, 0xd705, 0xa438, 0x6064,
+ 0xa438, 0x1800, 0xa438, 0x140a, 0xa438, 0x8810, 0xa438, 0xd199,
+ 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x1cd2, 0xa438, 0xd700,
+ 0xa438, 0x5fba, 0xa438, 0x1800, 0xa438, 0x140a, 0xa436, 0xA10E,
+ 0xa438, 0xffff, 0xa436, 0xA10C, 0xa438, 0x1352, 0xa436, 0xA10A,
+ 0xa438, 0x0545, 0xa436, 0xA108, 0xa438, 0x01ed, 0xa436, 0xA106,
+ 0xa438, 0x1bbf, 0xa436, 0xA104, 0xa438, 0x114b, 0xa436, 0xA102,
+ 0xa438, 0x14bf, 0xa436, 0xA100, 0xa438, 0x07ce, 0xa436, 0xA110,
+ 0xa438, 0x007f, 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012,
+ 0xa438, 0x1ff8, 0xa436, 0xA014, 0xa438, 0xd1ce, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA164, 0xa438, 0x07fc,
+ 0xa436, 0xA166, 0xa438, 0x143d, 0xa436, 0xA168, 0xa438, 0x3fff,
+ 0xa436, 0xA16A, 0xa438, 0x3fff, 0xa436, 0xA16C, 0xa438, 0x3fff,
+ 0xa436, 0xA16E, 0xa438, 0x3fff, 0xa436, 0xA170, 0xa438, 0x3fff,
+ 0xa436, 0xA172, 0xa438, 0x3fff, 0xa436, 0xA162, 0xa438, 0x0003,
+ 0xa436, 0xb87c, 0xa438, 0x8994, 0xa436, 0xb87e, 0xa438, 0xaf89,
+ 0xa438, 0xacaf, 0xa438, 0x89e4, 0xa438, 0xaf89, 0xa438, 0xecaf,
+ 0xa438, 0x8a04, 0xa438, 0xaf8a, 0xa438, 0x2eaf, 0xa438, 0x8a4a,
+ 0xa438, 0xaf8d, 0xa438, 0x31af, 0xa438, 0x8dc6, 0xa438, 0x1f55,
+ 0xa438, 0xe18f, 0xa438, 0xe3a1, 0xa438, 0x0007, 0xa438, 0xee86,
+ 0xa438, 0xe900, 0xa438, 0xaf4f, 0xa438, 0x9ead, 0xa438, 0x281b,
+ 0xa438, 0xe18f, 0xa438, 0xfcef, 0xa438, 0x71bf, 0xa438, 0x74f6,
+ 0xa438, 0x027e, 0xa438, 0xd2ef, 0xa438, 0x641c, 0xa438, 0x670d,
+ 0xa438, 0x67ef, 0xa438, 0x461f, 0xa438, 0x00bf, 0xa438, 0x74f6,
+ 0xa438, 0x027e, 0xa438, 0xdee1, 0xa438, 0x8fe3, 0xa438, 0x0d11,
+ 0xa438, 0xe58f, 0xa438, 0xe313, 0xa438, 0xaeca, 0xa438, 0x028d,
+ 0xa438, 0xd1d3, 0xa438, 0x01af, 0xa438, 0x40d1, 0xa438, 0xbf7a,
+ 0xa438, 0x6102, 0xa438, 0x7d44, 0xa438, 0xa100, 0xa438, 0x09e0,
+ 0xa438, 0x8ffa, 0xa438, 0xe18f, 0xa438, 0xfbaf, 0xa438, 0x683d,
+ 0xa438, 0x027f, 0xa438, 0xa9af, 0xa438, 0x682c, 0xa438, 0xbf8e,
+ 0xa438, 0x4102, 0xa438, 0x7d44, 0xa438, 0xe58f, 0xa438, 0xecbf,
+ 0xa438, 0x74cc, 0xa438, 0x027d, 0xa438, 0x44e3, 0xa438, 0x8fed,
+ 0xa438, 0x0d31, 0xa438, 0xf63f, 0xa438, 0x0d11, 0xa438, 0xf62f,
+ 0xa438, 0x1b13, 0xa438, 0xad2f, 0xa438, 0x06bf, 0xa438, 0x8e41,
+ 0xa438, 0x027c, 0xa438, 0xf9d1, 0xa438, 0x01af, 0xa438, 0x5974,
+ 0xa438, 0xee88, 0xa438, 0x8600, 0xa438, 0xe08f, 0xa438, 0xebad,
+ 0xa438, 0x200b, 0xa438, 0xe18f, 0xa438, 0xecbf, 0xa438, 0x8e41,
+ 0xa438, 0x027d, 0xa438, 0x25ae, 0xa438, 0x04ee, 0xa438, 0x8feb,
+ 0xa438, 0x01af, 0xa438, 0x5945, 0xa438, 0xad28, 0xa438, 0x2ce0,
+ 0xa438, 0x8fea, 0xa438, 0xa000, 0xa438, 0x0502, 0xa438, 0x8af0,
+ 0xa438, 0xae1e, 0xa438, 0xa001, 0xa438, 0x0502, 0xa438, 0x8b9f,
+ 0xa438, 0xae16, 0xa438, 0xa002, 0xa438, 0x0502, 0xa438, 0x8c0f,
+ 0xa438, 0xae0e, 0xa438, 0xa003, 0xa438, 0x0502, 0xa438, 0x8c95,
+ 0xa438, 0xae06, 0xa438, 0xa004, 0xa438, 0x0302, 0xa438, 0x8d08,
+ 0xa438, 0xaf63, 0xa438, 0x8902, 0xa438, 0x8a7f, 0xa438, 0xaf63,
+ 0xa438, 0x81f8, 0xa438, 0xef49, 0xa438, 0xf8e0, 0xa438, 0x8015,
+ 0xa438, 0xad21, 0xa438, 0x19bf, 0xa438, 0x7bd8, 0xa438, 0x027c,
+ 0xa438, 0xf9bf, 0xa438, 0x7bf3, 0xa438, 0x027d, 0xa438, 0x44bf,
+ 0xa438, 0x7bf6, 0xa438, 0x027c, 0xa438, 0xf902, 0xa438, 0x638e,
+ 0xa438, 0xee8f, 0xa438, 0xea00, 0xa438, 0xe080, 0xa438, 0x16ad,
+ 0xa438, 0x233d, 0xa438, 0xbf7b, 0xa438, 0xf302, 0xa438, 0x7d44,
+ 0xa438, 0xbf7a, 0xa438, 0x9402, 0xa438, 0x7cf9, 0xa438, 0xbf8e,
+ 0xa438, 0x4402, 0xa438, 0x7cf9, 0xa438, 0xbf7a, 0xa438, 0xa602,
+ 0xa438, 0x7cf9, 0xa438, 0xbf7a, 0xa438, 0xa302, 0xa438, 0x7cf9,
+ 0xa438, 0xbf7a, 0xa438, 0xa902, 0xa438, 0x7cf9, 0xa438, 0xbf7a,
+ 0xa438, 0xac02, 0xa438, 0x7cf9, 0xa438, 0xbf8e, 0xa438, 0x4702,
+ 0xa438, 0x7cf9, 0xa438, 0xbf8e, 0xa438, 0x4a02, 0xa438, 0x7cf9,
+ 0xa438, 0x0263, 0xa438, 0x8eee, 0xa438, 0x8fea, 0xa438, 0x00bf,
+ 0xa438, 0x7c02, 0xa438, 0x027c, 0xa438, 0xf9fc, 0xa438, 0xef94,
+ 0xa438, 0xfc04, 0xa438, 0xf8f9, 0xa438, 0xfbef, 0xa438, 0x79fb,
+ 0xa438, 0xe080, 0xa438, 0x15ac, 0xa438, 0x2103, 0xa438, 0xaf8b,
+ 0xa438, 0x70ee, 0xa438, 0x8888, 0xa438, 0x00ee, 0xa438, 0x888a,
+ 0xa438, 0x00ee, 0xa438, 0x888b, 0xa438, 0x00bf, 0xa438, 0x7bd8,
+ 0xa438, 0x027d, 0xa438, 0x02bf, 0xa438, 0x6000, 0xa438, 0xd788,
+ 0xa438, 0x881f, 0xa438, 0x44d4, 0xa438, 0x000c, 0xa438, 0x0273,
+ 0xa438, 0x3b02, 0xa438, 0x7fa9, 0xa438, 0xac28, 0xa438, 0x05ac,
+ 0xa438, 0x290d, 0xa438, 0xae18, 0xa438, 0xe188, 0xa438, 0x98bf,
+ 0xa438, 0x7be1, 0xa438, 0x027d, 0xa438, 0x25ae, 0xa438, 0x18e1,
+ 0xa438, 0x8898, 0xa438, 0x0d11, 0xa438, 0xbf7b, 0xa438, 0xe102,
+ 0xa438, 0x7d25, 0xa438, 0xae0b, 0xa438, 0xe188, 0xa438, 0x980d,
+ 0xa438, 0x12bf, 0xa438, 0x7be1, 0xa438, 0x027d, 0xa438, 0x25bf,
+ 0xa438, 0x88a0, 0xa438, 0xda19, 0xa438, 0xdb19, 0xa438, 0xd819,
+ 0xa438, 0xd91f, 0xa438, 0x77bf, 0xa438, 0x88b1, 0xa438, 0xde19,
+ 0xa438, 0xdf19, 0xa438, 0xdc19, 0xa438, 0xdd19, 0xa438, 0x17a7,
+ 0xa438, 0x0004, 0xa438, 0xf302, 0xa438, 0x63cd, 0xa438, 0xee8f,
+ 0xa438, 0xea01, 0xa438, 0xe080, 0xa438, 0x16ad, 0xa438, 0x2319,
+ 0xa438, 0xee88, 0xa438, 0x8800, 0xa438, 0xee88, 0xa438, 0x8a00,
+ 0xa438, 0xee88, 0xa438, 0x8b00, 0xa438, 0xbf8e, 0xa438, 0x4402,
+ 0xa438, 0x7d02, 0xa438, 0x0263, 0xa438, 0xcdee, 0xa438, 0x8fea,
+ 0xa438, 0x0102, 0xa438, 0x70de, 0xa438, 0xbf7c, 0xa438, 0x0202,
+ 0xa438, 0x7d02, 0xa438, 0xffef, 0xa438, 0x97ff, 0xa438, 0xfdfc,
+ 0xa438, 0x04f8, 0xa438, 0xf9fa, 0xa438, 0xef69, 0xa438, 0xfae0,
+ 0xa438, 0x888a, 0xa438, 0xe188, 0xa438, 0x8b14, 0xa438, 0xe488,
+ 0xa438, 0x8ae5, 0xa438, 0x888b, 0xa438, 0xbf88, 0xa438, 0x94d8,
+ 0xa438, 0x19d9, 0xa438, 0xef64, 0xa438, 0xe088, 0xa438, 0x8ae1,
+ 0xa438, 0x888b, 0xa438, 0x1b46, 0xa438, 0x9f30, 0xa438, 0x1f44,
+ 0xa438, 0xe488, 0xa438, 0x8ae5, 0xa438, 0x888b, 0xa438, 0xe080,
+ 0xa438, 0x15ad, 0xa438, 0x211a, 0xa438, 0x0260, 0xa438, 0xece0,
+ 0xa438, 0x8016, 0xa438, 0xad23, 0xa438, 0x1602, 0xa438, 0x7c86,
+ 0xa438, 0xef47, 0xa438, 0xe48f, 0xa438, 0xe9e5, 0xa438, 0x8fe8,
+ 0xa438, 0xee8f, 0xa438, 0xea02, 0xa438, 0xae0b, 0xa438, 0x028c,
+ 0xa438, 0x2eae, 0xa438, 0x0602, 0xa438, 0x8bfe, 0xa438, 0x0270,
+ 0xa438, 0xdefe, 0xa438, 0xef96, 0xa438, 0xfefd, 0xa438, 0xfc04,
+ 0xa438, 0xf8e1, 0xa438, 0x8888, 0xa438, 0x11e5, 0xa438, 0x8888,
+ 0xa438, 0xad2a, 0xa438, 0x04ee, 0xa438, 0x8888, 0xa438, 0x00fc,
+ 0xa438, 0x04f8, 0xa438, 0xfafb, 0xa438, 0xe08f, 0xa438, 0xe9e1,
+ 0xa438, 0x8fe8, 0xa438, 0xef64, 0xa438, 0x1f00, 0xa438, 0xe18f,
+ 0xa438, 0xe6ef, 0xa438, 0x7402, 0xa438, 0x7ca1, 0xa438, 0xad50,
+ 0xa438, 0x0302, 0xa438, 0x8c2e, 0xa438, 0xfffe, 0xa438, 0xfc04,
+ 0xa438, 0xf8fa, 0xa438, 0xef69, 0xa438, 0xfbbf, 0xa438, 0x7bf3,
+ 0xa438, 0x027d, 0xa438, 0x44ac, 0xa438, 0x284c, 0xa438, 0x0264,
+ 0xa438, 0x1cbf, 0xa438, 0x8e47, 0xa438, 0x027d, 0xa438, 0x02bf,
+ 0xa438, 0x8e4a, 0xa438, 0x027d, 0xa438, 0x02d1, 0xa438, 0x43b1,
+ 0xa438, 0xfebf, 0xa438, 0x7aa6, 0xa438, 0x027c, 0xa438, 0xf9bf,
+ 0xa438, 0x7aa3, 0xa438, 0x027c, 0xa438, 0xf9bf, 0xa438, 0x7aa9,
+ 0xa438, 0x027c, 0xa438, 0xf9bf, 0xa438, 0x7aac, 0xa438, 0x027d,
+ 0xa438, 0x02d1, 0xa438, 0x80e0, 0xa438, 0x8888, 0xa438, 0x100e,
+ 0xa438, 0x11b0, 0xa438, 0xfcbf, 0xa438, 0x7a94, 0xa438, 0x027d,
+ 0xa438, 0x2502, 0xa438, 0x7c86, 0xa438, 0xef47, 0xa438, 0xe48f,
+ 0xa438, 0xe9e5, 0xa438, 0x8fe8, 0xa438, 0xee8f, 0xa438, 0xea03,
+ 0xa438, 0xae07, 0xa438, 0xee8f, 0xa438, 0xea01, 0xa438, 0x0270,
+ 0xa438, 0xdeff, 0xa438, 0xef96, 0xa438, 0xfefc, 0xa438, 0x04f8,
+ 0xa438, 0xf9fa, 0xa438, 0xfbef, 0xa438, 0x79fb, 0xa438, 0xbf7a,
+ 0xa438, 0x9402, 0xa438, 0x7d44, 0xa438, 0xef21, 0xa438, 0xbf7a,
+ 0xa438, 0xb802, 0xa438, 0x7d44, 0xa438, 0x1f21, 0xa438, 0x9e19,
+ 0xa438, 0xe08f, 0xa438, 0xe9e1, 0xa438, 0x8fe8, 0xa438, 0xef64,
+ 0xa438, 0x1f00, 0xa438, 0xe18f, 0xa438, 0xe4ef, 0xa438, 0x7402,
+ 0xa438, 0x7ca1, 0xa438, 0xad50, 0xa438, 0x3dee, 0xa438, 0x8fe7,
+ 0xa438, 0x01bf, 0xa438, 0x7a94, 0xa438, 0x027c, 0xa438, 0xf9bf,
+ 0xa438, 0x7aa6, 0xa438, 0x027c, 0xa438, 0xf9bf, 0xa438, 0x7aa3,
+ 0xa438, 0x027c, 0xa438, 0xf9bf, 0xa438, 0x7aa9, 0xa438, 0x027c,
+ 0xa438, 0xf9bf, 0xa438, 0x7aac, 0xa438, 0x027d, 0xa438, 0x02bf,
+ 0xa438, 0x8e47, 0xa438, 0x027c, 0xa438, 0xf9bf, 0xa438, 0x8e4a,
+ 0xa438, 0x027c, 0xa438, 0xf902, 0xa438, 0x7c86, 0xa438, 0xef47,
+ 0xa438, 0xe48f, 0xa438, 0xe9e5, 0xa438, 0x8fe8, 0xa438, 0xee8f,
+ 0xa438, 0xea04, 0xa438, 0xffef, 0xa438, 0x97ff, 0xa438, 0xfefd,
+ 0xa438, 0xfc04, 0xa438, 0xf8fa, 0xa438, 0xfbe0, 0xa438, 0x8fe9,
+ 0xa438, 0xe18f, 0xa438, 0xe8ef, 0xa438, 0x641f, 0xa438, 0x00e1,
+ 0xa438, 0x8fe5, 0xa438, 0xef74, 0xa438, 0x027c, 0xa438, 0xa1ad,
+ 0xa438, 0x500d, 0xa438, 0x0263, 0xa438, 0x8e02, 0xa438, 0x8bfe,
+ 0xa438, 0xee8f, 0xa438, 0xea01, 0xa438, 0x0270, 0xa438, 0xdeff,
+ 0xa438, 0xfefc, 0xa438, 0x04e3, 0xa438, 0x8fd8, 0xa438, 0xe787,
+ 0xa438, 0x75e4, 0xa438, 0x8fe1, 0xa438, 0xe58f, 0xa438, 0xe2bf,
+ 0xa438, 0x8fd9, 0xa438, 0xef32, 0xa438, 0x0c31, 0xa438, 0x1a93,
+ 0xa438, 0xdc19, 0xa438, 0xdd02, 0xa438, 0x7fa9, 0xa438, 0xac2a,
+ 0xa438, 0x18e0, 0xa438, 0x8fe1, 0xa438, 0xe18f, 0xa438, 0xe2ef,
+ 0xa438, 0x74e1, 0xa438, 0x8775, 0xa438, 0x1f00, 0xa438, 0xef64,
+ 0xa438, 0xe18f, 0xa438, 0xd8e5, 0xa438, 0x8775, 0xa438, 0xaf4d,
+ 0xa438, 0x72bf, 0xa438, 0x7b3c, 0xa438, 0xef32, 0xa438, 0x4b03,
+ 0xa438, 0x1a93, 0xa438, 0x027d, 0xa438, 0x44ef, 0xa438, 0x64e1,
+ 0xa438, 0x8fff, 0xa438, 0x1f00, 0xa438, 0xef74, 0xa438, 0x1b67,
+ 0xa438, 0xac4f, 0xa438, 0xcee0, 0xa438, 0x8ffd, 0xa438, 0xe18f,
+ 0xa438, 0xfeef, 0xa438, 0x64e0, 0xa438, 0x8fe1, 0xa438, 0xe18f,
+ 0xa438, 0xe2ef, 0xa438, 0x7402, 0xa438, 0x7c53, 0xa438, 0xac50,
+ 0xa438, 0x02ae, 0xa438, 0xb6e1, 0xa438, 0x8775, 0xa438, 0x1f00,
+ 0xa438, 0xef64, 0xa438, 0xe18f, 0xa438, 0xfcef, 0xa438, 0x711c,
+ 0xa438, 0x670d, 0xa438, 0x67ef, 0xa438, 0x46e5, 0xa438, 0x8775,
+ 0xa438, 0xef32, 0xa438, 0xd101, 0xa438, 0xa300, 0xa438, 0x02ae,
+ 0xa438, 0x050c, 0xa438, 0x1183, 0xa438, 0xaef6, 0xa438, 0xe08f,
+ 0xa438, 0xe31e, 0xa438, 0x10e5, 0xa438, 0x8fe3, 0xa438, 0xae89,
+ 0xa438, 0xe287, 0xa438, 0x75e6, 0xa438, 0x8fd8, 0xa438, 0x1f22,
+ 0xa438, 0xaf4d, 0xa438, 0x42f8, 0xa438, 0xf9ef, 0xa438, 0x59fa,
+ 0xa438, 0xfbbf, 0xa438, 0x8fee, 0xa438, 0x027f, 0xa438, 0xa90d,
+ 0xa438, 0x1149, 0xa438, 0x041a, 0xa438, 0x91d7, 0xa438, 0x8df3,
+ 0xa438, 0xd68e, 0xa438, 0x2302, 0xa438, 0x72aa, 0xa438, 0xfffe,
+ 0xa438, 0xef95, 0xa438, 0xfdfc, 0xa438, 0x0400, 0xa438, 0x7591,
+ 0xa438, 0x0275, 0xa438, 0x4404, 0xa438, 0x758e, 0xa438, 0x2675,
+ 0xa438, 0x4100, 0xa438, 0x8e26, 0xa438, 0x028e, 0xa438, 0x2304,
+ 0xa438, 0x759d, 0xa438, 0x2675, 0xa438, 0x4700, 0xa438, 0x8e32,
+ 0xa438, 0x028e, 0xa438, 0x2f04, 0xa438, 0x8e2c, 0xa438, 0x268e,
+ 0xa438, 0x2900, 0xa438, 0x8e3e, 0xa438, 0x028e, 0xa438, 0x3b04,
+ 0xa438, 0x8e38, 0xa438, 0x268e, 0xa438, 0x35fe, 0xa438, 0xad96,
+ 0xa438, 0xdcad, 0xa438, 0x96ba, 0xa438, 0xad96, 0xa438, 0x98ad,
+ 0xa438, 0x9676, 0xa438, 0xad98, 0xa438, 0x54ad, 0xa438, 0x9876,
+ 0xa438, 0xae38, 0xa438, 0x54ae, 0xa438, 0x38fe, 0xa438, 0xae3a,
+ 0xa438, 0xdcae, 0xa438, 0x3abb, 0xa438, 0xbf14, 0xa438, 0x99bd,
+ 0xa438, 0xe0cc, 0xa438, 0xbdc8, 0xa438, 0xddbd, 0xa438, 0xc800,
+ 0xa436, 0xb85e, 0xa438, 0x4f9a, 0xa436, 0xb860, 0xa438, 0x40cf,
+ 0xa436, 0xb862, 0xa438, 0x6829, 0xa436, 0xb864, 0xa438, 0x5972,
+ 0xa436, 0xb886, 0xa438, 0x5941, 0xa436, 0xb888, 0xa438, 0x636b,
+ 0xa436, 0xb88a, 0xa438, 0x4d6b, 0xa436, 0xb88c, 0xa438, 0x4d40,
+ 0xa436, 0xb838, 0xa438, 0x00ff, 0xb820, 0x0010, 0xa436, 0x8608,
+ 0xa438, 0xaf86, 0xa438, 0xdaaf, 0xa438, 0x894c, 0xa438, 0xaf8a,
+ 0xa438, 0xf8af, 0xa438, 0x8bf3, 0xa438, 0xaf8b, 0xa438, 0xf3af,
+ 0xa438, 0x8bf3, 0xa438, 0xaf8b, 0xa438, 0xf3af, 0xa438, 0x8bf3,
+ 0xa438, 0x006f, 0xa438, 0x4a03, 0xa438, 0x6f47, 0xa438, 0x266f,
+ 0xa438, 0x5900, 0xa438, 0x6f4d, 0xa438, 0x016f, 0xa438, 0x5004,
+ 0xa438, 0x6f56, 0xa438, 0x056f, 0xa438, 0x5f06, 0xa438, 0x6f5c,
+ 0xa438, 0x2774, 0xa438, 0x7800, 0xa438, 0x6f68, 0xa438, 0x246f,
+ 0xa438, 0x6b20, 0xa438, 0x6f6e, 0xa438, 0x206f, 0xa438, 0x7410,
+ 0xa438, 0x7469, 0xa438, 0x1074, 0xa438, 0x6c10, 0xa438, 0x746f,
+ 0xa438, 0x1074, 0xa438, 0x7225, 0xa438, 0x8bfc, 0xa438, 0x008c,
+ 0xa438, 0x0802, 0xa438, 0x8c02, 0xa438, 0x038b, 0xa438, 0xff04,
+ 0xa438, 0x6eed, 0xa438, 0x278c, 0xa438, 0x0520, 0xa438, 0x74da,
+ 0xa438, 0x2074, 0xa438, 0xdd20, 0xa438, 0x74e0, 0xa438, 0x0074,
+ 0xa438, 0xe300, 0xa438, 0x6ef3, 0xa438, 0x006e, 0xa438, 0xf600,
+ 0xa438, 0x6ef9, 0xa438, 0x006e, 0xa438, 0xfc00, 0xa438, 0x6eff,
+ 0xa438, 0x006f, 0xa438, 0x0200, 0xa438, 0x6f05, 0xa438, 0x026f,
+ 0xa438, 0x0802, 0xa438, 0x6f0b, 0xa438, 0x026f, 0xa438, 0x0e02,
+ 0xa438, 0x6f11, 0xa438, 0x026f, 0xa438, 0x1402, 0xa438, 0x6f17,
+ 0xa438, 0x226f, 0xa438, 0x1a00, 0xa438, 0x723e, 0xa438, 0x016e,
+ 0xa438, 0xed24, 0xa438, 0x6f50, 0xa438, 0x0072, 0xa438, 0x4701,
+ 0xa438, 0x724a, 0xa438, 0x0272, 0xa438, 0x4d23, 0xa438, 0x7250,
+ 0xa438, 0x1074, 0xa438, 0x6910, 0xa438, 0x746c, 0xa438, 0x1074,
+ 0xa438, 0x6f00, 0xa438, 0x7472, 0xa438, 0x158c, 0xa438, 0x0b15,
+ 0xa438, 0x8c0e, 0xa438, 0x158c, 0xa438, 0x1105, 0xa438, 0x8c14,
+ 0xa438, 0x006f, 0xa438, 0x4a03, 0xa438, 0x6f47, 0xa438, 0x266f,
+ 0xa438, 0x5900, 0xa438, 0x731f, 0xa438, 0x0273, 0xa438, 0x2203,
+ 0xa438, 0x8c08, 0xa438, 0xee84, 0xa438, 0x7100, 0xa438, 0x0286,
+ 0xa438, 0xece0, 0xa438, 0x8043, 0xa438, 0xf626, 0xa438, 0xe480,
+ 0xa438, 0x43af, 0xa438, 0x6611, 0xa438, 0xf8e0, 0xa438, 0x8012,
+ 0xa438, 0xac26, 0xa438, 0x03af, 0xa438, 0x86ff, 0xa438, 0x0287,
+ 0xa438, 0x0102, 0xa438, 0x8906, 0xa438, 0x0289, 0xa438, 0x29fc,
+ 0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x59f9, 0xa438, 0xfaee,
+ 0xa438, 0x8476, 0xa438, 0x00d6, 0xa438, 0x008f, 0xa438, 0x0266,
+ 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f,
+ 0xa438, 0x08e4, 0xa438, 0x8fe7, 0xa438, 0xe58f, 0xa438, 0xe8ae,
+ 0xa438, 0x06e0, 0xa438, 0x8fe7, 0xa438, 0xe18f, 0xa438, 0xe8ee,
+ 0xa438, 0x8476, 0xa438, 0x01d6, 0xa438, 0x00c0, 0xa438, 0x0266,
+ 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x00d6, 0xa438, 0x0090,
+ 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200,
+ 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8fe9, 0xa438, 0xe58f,
+ 0xa438, 0xeaae, 0xa438, 0x06e0, 0xa438, 0x8fe9, 0xa438, 0xe18f,
+ 0xa438, 0xeaee, 0xa438, 0x8476, 0xa438, 0x01d6, 0xa438, 0x00c1,
+ 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x00d6,
+ 0xa438, 0x0091, 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e,
+ 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8feb,
+ 0xa438, 0xe58f, 0xa438, 0xecae, 0xa438, 0x06e0, 0xa438, 0x8feb,
+ 0xa438, 0xe18f, 0xa438, 0xecee, 0xa438, 0x8476, 0xa438, 0x01d6,
+ 0xa438, 0x00c2, 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476,
+ 0xa438, 0x01d6, 0xa438, 0x008f, 0xa438, 0x0266, 0xa438, 0x53ef,
+ 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4,
+ 0xa438, 0x8fed, 0xa438, 0xe58f, 0xa438, 0xeeae, 0xa438, 0x06e0,
+ 0xa438, 0x8fed, 0xa438, 0xe18f, 0xa438, 0xeeee, 0xa438, 0x8476,
+ 0xa438, 0x02d6, 0xa438, 0x00c0, 0xa438, 0x0266, 0xa438, 0x71ee,
+ 0xa438, 0x8476, 0xa438, 0x01d6, 0xa438, 0x0090, 0xa438, 0x0266,
+ 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f,
+ 0xa438, 0x08e4, 0xa438, 0x8fef, 0xa438, 0xe58f, 0xa438, 0xf0ae,
+ 0xa438, 0x06e0, 0xa438, 0x8fef, 0xa438, 0xe18f, 0xa438, 0xf0ee,
+ 0xa438, 0x8476, 0xa438, 0x02d6, 0xa438, 0x00c1, 0xa438, 0x0266,
+ 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x01d6, 0xa438, 0x0091,
+ 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200,
+ 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8ff1, 0xa438, 0xe58f,
+ 0xa438, 0xf2ae, 0xa438, 0x06e0, 0xa438, 0x8ff1, 0xa438, 0xe18f,
+ 0xa438, 0xf2ee, 0xa438, 0x8476, 0xa438, 0x02d6, 0xa438, 0x00c2,
+ 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x02d6,
+ 0xa438, 0x008f, 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e,
+ 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8ff3,
+ 0xa438, 0xe58f, 0xa438, 0xf4ae, 0xa438, 0x06e0, 0xa438, 0x8ff3,
+ 0xa438, 0xe18f, 0xa438, 0xf4ee, 0xa438, 0x8476, 0xa438, 0x04d6,
+ 0xa438, 0x00c0, 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476,
+ 0xa438, 0x02d6, 0xa438, 0x0090, 0xa438, 0x0266, 0xa438, 0x53ef,
+ 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4,
+ 0xa438, 0x8ff5, 0xa438, 0xe58f, 0xa438, 0xf6ae, 0xa438, 0x06e0,
+ 0xa438, 0x8ff5, 0xa438, 0xe18f, 0xa438, 0xf6ee, 0xa438, 0x8476,
+ 0xa438, 0x04d6, 0xa438, 0x00c1, 0xa438, 0x0266, 0xa438, 0x71ee,
+ 0xa438, 0x8476, 0xa438, 0x02d6, 0xa438, 0x0091, 0xa438, 0x0266,
+ 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f,
+ 0xa438, 0x08e4, 0xa438, 0x8ff7, 0xa438, 0xe58f, 0xa438, 0xf8ae,
+ 0xa438, 0x06e0, 0xa438, 0x8ff7, 0xa438, 0xe18f, 0xa438, 0xf8ee,
+ 0xa438, 0x8476, 0xa438, 0x04d6, 0xa438, 0x00c2, 0xa438, 0x0266,
+ 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x03d6, 0xa438, 0x008f,
+ 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e, 0xa438, 0x1200,
+ 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8ff9, 0xa438, 0xe58f,
+ 0xa438, 0xfaae, 0xa438, 0x06e0, 0xa438, 0x8ff9, 0xa438, 0xe18f,
+ 0xa438, 0xfaee, 0xa438, 0x8476, 0xa438, 0x08d6, 0xa438, 0x00c0,
+ 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476, 0xa438, 0x03d6,
+ 0xa438, 0x0090, 0xa438, 0x0266, 0xa438, 0x53ef, 0xa438, 0x643e,
+ 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4, 0xa438, 0x8ffb,
+ 0xa438, 0xe58f, 0xa438, 0xfcae, 0xa438, 0x06e0, 0xa438, 0x8ffb,
+ 0xa438, 0xe18f, 0xa438, 0xfcee, 0xa438, 0x8476, 0xa438, 0x08d6,
+ 0xa438, 0x00c1, 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x8476,
+ 0xa438, 0x03d6, 0xa438, 0x0091, 0xa438, 0x0266, 0xa438, 0x53ef,
+ 0xa438, 0x643e, 0xa438, 0x1200, 0xa438, 0xac4f, 0xa438, 0x08e4,
+ 0xa438, 0x8ffd, 0xa438, 0xe58f, 0xa438, 0xfeae, 0xa438, 0x06e0,
+ 0xa438, 0x8ffd, 0xa438, 0xe18f, 0xa438, 0xfeee, 0xa438, 0x8476,
+ 0xa438, 0x08d6, 0xa438, 0x00c2, 0xa438, 0x0266, 0xa438, 0x71fe,
+ 0xa438, 0xfdef, 0xa438, 0x95fd, 0xa438, 0xfc04, 0xa438, 0xf8f9,
+ 0xa438, 0xfad4, 0xa438, 0x0400, 0xa438, 0xd600, 0xa438, 0x0dd3,
+ 0xa438, 0x0fe7, 0xa438, 0x8476, 0xa438, 0x0266, 0xa438, 0x71d4,
+ 0xa438, 0x1400, 0xa438, 0xd600, 0xa438, 0x0dd3, 0xa438, 0x0fe7,
+ 0xa438, 0x8476, 0xa438, 0x0266, 0xa438, 0x71fe, 0xa438, 0xfdfc,
+ 0xa438, 0x04f8, 0xa438, 0xf9fa, 0xa438, 0xd410, 0xa438, 0x00d6,
+ 0xa438, 0x000d, 0xa438, 0xd30f, 0xa438, 0xe784, 0xa438, 0x7602,
+ 0xa438, 0x6671, 0xa438, 0xd400, 0xa438, 0x00d6, 0xa438, 0x000d,
+ 0xa438, 0xd30f, 0xa438, 0xe784, 0xa438, 0x7602, 0xa438, 0x6671,
+ 0xa438, 0xfefd, 0xa438, 0xfc04, 0xa438, 0xe080, 0xa438, 0x4fac,
+ 0xa438, 0x2317, 0xa438, 0xe080, 0xa438, 0x44ad, 0xa438, 0x231a,
+ 0xa438, 0x0289, 0xa438, 0x75e0, 0xa438, 0x8044, 0xa438, 0xac23,
+ 0xa438, 0x11bf, 0xa438, 0x6ecf, 0xa438, 0x0276, 0xa438, 0x74ae,
+ 0xa438, 0x0902, 0xa438, 0x8adb, 0xa438, 0x021f, 0xa438, 0xe702,
+ 0xa438, 0x1fbb, 0xa438, 0xaf1f, 0xa438, 0x95f8, 0xa438, 0xf9ef,
+ 0xa438, 0x59f9, 0xa438, 0xfafb, 0xa438, 0xe080, 0xa438, 0x12ac,
+ 0xa438, 0x2303, 0xa438, 0xaf8a, 0xa438, 0xd0d4, 0xa438, 0x0120,
+ 0xa438, 0xd600, 0xa438, 0x10d2, 0xa438, 0x0fe6, 0xa438, 0x8476,
+ 0xa438, 0x0266, 0xa438, 0x71ee, 0xa438, 0x846f, 0xa438, 0x00d4,
+ 0xa438, 0x000f, 0xa438, 0xbf72, 0xa438, 0x9e02, 0xa438, 0x7697,
+ 0xa438, 0x0275, 0xa438, 0xbeef, 0xa438, 0x47e4, 0xa438, 0x8474,
+ 0xa438, 0xe584, 0xa438, 0x75bf, 0xa438, 0x729b, 0xa438, 0x0276,
+ 0xa438, 0xb6e5, 0xa438, 0x846f, 0xa438, 0xef31, 0xa438, 0xbf6e,
+ 0xa438, 0x0602, 0xa438, 0x76b6, 0xa438, 0xef64, 0xa438, 0xbf6e,
+ 0xa438, 0x0902, 0xa438, 0x76b6, 0xa438, 0x1e64, 0xa438, 0xbf6e,
+ 0xa438, 0x0f02, 0xa438, 0x76b6, 0xa438, 0x1e64, 0xa438, 0xac40,
+ 0xa438, 0x05a3, 0xa438, 0x0f0c, 0xa438, 0xae26, 0xa438, 0xa303,
+ 0xa438, 0x02ae, 0xa438, 0x21a3, 0xa438, 0x0c02, 0xa438, 0xae1c,
+ 0xa438, 0xe084, 0xa438, 0x74e1, 0xa438, 0x8475, 0xa438, 0xef64,
+ 0xa438, 0xd000, 0xa438, 0xd196, 0xa438, 0xef74, 0xa438, 0x0275,
+ 0xa438, 0xd9ad, 0xa438, 0x50b7, 0xa438, 0xe083, 0xa438, 0xecf7,
+ 0xa438, 0x23e4, 0xa438, 0x83ec, 0xa438, 0xbf72, 0xa438, 0x9e02,
+ 0xa438, 0x766b, 0xa438, 0x0287, 0xa438, 0x0102, 0xa438, 0x8906,
+ 0xa438, 0xee83, 0xa438, 0xe800, 0xa438, 0xbf72, 0xa438, 0x6b02,
+ 0xa438, 0x766b, 0xa438, 0xbf72, 0xa438, 0x6e02, 0xa438, 0x766b,
+ 0xa438, 0xbf72, 0xa438, 0x7102, 0xa438, 0x766b, 0xa438, 0xbf72,
+ 0xa438, 0x7402, 0xa438, 0x766b, 0xa438, 0xbf72, 0xa438, 0x7702,
+ 0xa438, 0x766b, 0xa438, 0xbf72, 0xa438, 0x7a02, 0xa438, 0x766b,
+ 0xa438, 0xd400, 0xa438, 0x0fbf, 0xa438, 0x7295, 0xa438, 0x0276,
+ 0xa438, 0x97d7, 0xa438, 0x0400, 0xa438, 0xbf6e, 0xa438, 0x0602,
+ 0xa438, 0x76b6, 0xa438, 0xef64, 0xa438, 0xbf6e, 0xa438, 0x0902,
+ 0xa438, 0x76b6, 0xa438, 0x1e64, 0xa438, 0xbf6e, 0xa438, 0x0f02,
+ 0xa438, 0x76b6, 0xa438, 0x1e64, 0xa438, 0xac40, 0xa438, 0x0fbf,
+ 0xa438, 0x7298, 0xa438, 0x0276, 0xa438, 0xb6e5, 0xa438, 0x83e8,
+ 0xa438, 0xa10f, 0xa438, 0x28af, 0xa438, 0x8a95, 0xa438, 0xbf8b,
+ 0xa438, 0xf302, 0xa438, 0x76b6, 0xa438, 0xac28, 0xa438, 0x02ae,
+ 0xa438, 0x0bbf, 0xa438, 0x8bf9, 0xa438, 0x0276, 0xa438, 0xb6e5,
+ 0xa438, 0x83e8, 0xa438, 0xae09, 0xa438, 0xbf8b, 0xa438, 0xf602,
+ 0xa438, 0x76b6, 0xa438, 0xe583, 0xa438, 0xe8a1, 0xa438, 0x0303,
+ 0xa438, 0xaf8a, 0xa438, 0x95b7, 0xa438, 0xafe2, 0xa438, 0x83ec,
+ 0xa438, 0xf735, 0xa438, 0xe683, 0xa438, 0xecbf, 0xa438, 0x7295,
+ 0xa438, 0x0276, 0xa438, 0x6bbf, 0xa438, 0x726b, 0xa438, 0x0276,
+ 0xa438, 0x74bf, 0xa438, 0x726e, 0xa438, 0x0276, 0xa438, 0x74bf,
+ 0xa438, 0x7271, 0xa438, 0x0276, 0xa438, 0x74bf, 0xa438, 0x7274,
+ 0xa438, 0x0276, 0xa438, 0x74bf, 0xa438, 0x7277, 0xa438, 0x0276,
+ 0xa438, 0x74bf, 0xa438, 0x727a, 0xa438, 0x0276, 0xa438, 0x7402,
+ 0xa438, 0x8929, 0xa438, 0xd401, 0xa438, 0x28d6, 0xa438, 0x0010,
+ 0xa438, 0xd20f, 0xa438, 0xe684, 0xa438, 0x7602, 0xa438, 0x6671,
+ 0xa438, 0x021f, 0xa438, 0xbbff, 0xa438, 0xfefd, 0xa438, 0xef95,
+ 0xa438, 0xfdfc, 0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x59f9,
+ 0xa438, 0xe080, 0xa438, 0x12ad, 0xa438, 0x230c, 0xa438, 0xbf72,
+ 0xa438, 0x9e02, 0xa438, 0x766b, 0xa438, 0xbf72, 0xa438, 0x9502,
+ 0xa438, 0x766b, 0xa438, 0xfdef, 0xa438, 0x95fd, 0xa438, 0xfc04,
+ 0xa438, 0xbf6e, 0xa438, 0x0602, 0xa438, 0x76b6, 0xa438, 0xef64,
+ 0xa438, 0xbf6e, 0xa438, 0x0902, 0xa438, 0x76b6, 0xa438, 0x1e64,
+ 0xa438, 0xbf6e, 0xa438, 0x0f02, 0xa438, 0x76b6, 0xa438, 0x1e64,
+ 0xa438, 0xac40, 0xa438, 0x0ebf, 0xa438, 0x7298, 0xa438, 0x0276,
+ 0xa438, 0xb6e5, 0xa438, 0x8478, 0xa438, 0xa10f, 0xa438, 0x26ae,
+ 0xa438, 0x47bf, 0xa438, 0x8bf3, 0xa438, 0x0276, 0xa438, 0xb6ac,
+ 0xa438, 0x2802, 0xa438, 0xae0b, 0xa438, 0xbf8b, 0xa438, 0xf902,
+ 0xa438, 0x76b6, 0xa438, 0xe584, 0xa438, 0x78ae, 0xa438, 0x09bf,
+ 0xa438, 0x8bf6, 0xa438, 0x0276, 0xa438, 0xb6e5, 0xa438, 0x8478,
+ 0xa438, 0xa103, 0xa438, 0x02ae, 0xa438, 0x23e0, 0xa438, 0x8474,
+ 0xa438, 0xe184, 0xa438, 0x75ef, 0xa438, 0x64e0, 0xa438, 0x83fc,
+ 0xa438, 0xe183, 0xa438, 0xfdef, 0xa438, 0x7402, 0xa438, 0x75d9,
+ 0xa438, 0xad50, 0xa438, 0x0ae0, 0xa438, 0x83ec, 0xa438, 0xf721,
+ 0xa438, 0xe483, 0xa438, 0xecae, 0xa438, 0x03af, 0xa438, 0x68e4,
+ 0xa438, 0xbf72, 0xa438, 0x9502, 0xa438, 0x766b, 0xa438, 0xe083,
+ 0xa438, 0xebad, 0xa438, 0x2170, 0xa438, 0xbf73, 0xa438, 0x7f02,
+ 0xa438, 0x766b, 0xa438, 0xd700, 0xa438, 0x64bf, 0xa438, 0x73c4,
+ 0xa438, 0x0276, 0xa438, 0xb6a4, 0xa438, 0x0000, 0xa438, 0x02ae,
+ 0xa438, 0x0d87, 0xa438, 0xa700, 0xa438, 0x00ef, 0xa438, 0xe183,
+ 0xa438, 0xecf7, 0xa438, 0x2ae5, 0xa438, 0x83ec, 0xa438, 0xbf73,
+ 0xa438, 0xbe02, 0xa438, 0x766b, 0xa438, 0xbf73, 0xa438, 0xb802,
+ 0xa438, 0x766b, 0xa438, 0xbf73, 0xa438, 0xc102, 0xa438, 0x766b,
+ 0xa438, 0xbf73, 0xa438, 0xbb02, 0xa438, 0x766b, 0xa438, 0xe084,
+ 0xa438, 0x9ee1, 0xa438, 0x849f, 0xa438, 0xbf72, 0xa438, 0x7d02,
+ 0xa438, 0x7697, 0xa438, 0xbf72, 0xa438, 0x8002, 0xa438, 0x7697,
+ 0xa438, 0xbf72, 0xa438, 0x8302, 0xa438, 0x7697, 0xa438, 0xbf72,
+ 0xa438, 0x8602, 0xa438, 0x7697, 0xa438, 0xbf72, 0xa438, 0x8902,
+ 0xa438, 0x7674, 0xa438, 0xbf72, 0xa438, 0x8c02, 0xa438, 0x7674,
+ 0xa438, 0xbf72, 0xa438, 0x8f02, 0xa438, 0x7674, 0xa438, 0xbf72,
+ 0xa438, 0x9202, 0xa438, 0x7674, 0xa438, 0xee84, 0xa438, 0x7700,
+ 0xa438, 0xe080, 0xa438, 0x44f6, 0xa438, 0x21e4, 0xa438, 0x8044,
+ 0xa438, 0xaf68, 0xa438, 0xe411, 0xa438, 0xd1a4, 0xa438, 0x10bc,
+ 0xa438, 0x7432, 0xa438, 0xbc74, 0xa438, 0xbbbf, 0xa438, 0x14cc,
+ 0xa438, 0xbfaa, 0xa438, 0x00bf, 0xa438, 0x9055, 0xa438, 0xbf06,
+ 0xa438, 0x10bf, 0xa438, 0xb876, 0xa438, 0xbe02, 0xa438, 0x54be,
+ 0xa438, 0x0232, 0xa438, 0xbe02, 0xa438, 0x10be, 0xa438, 0x0200,
+ 0xa436, 0x8fe7, 0xa438, 0x1200, 0xa436, 0x8fe9, 0xa438, 0x1200,
+ 0xa436, 0x8feb, 0xa438, 0x1200, 0xa436, 0x8fed, 0xa438, 0x1200,
+ 0xa436, 0x8fef, 0xa438, 0x1200, 0xa436, 0x8ff1, 0xa438, 0x1200,
+ 0xa436, 0x8ff3, 0xa438, 0x1200, 0xa436, 0x8ff5, 0xa438, 0x1200,
+ 0xa436, 0x8ff7, 0xa438, 0x1200, 0xa436, 0x8ff9, 0xa438, 0x1200,
+ 0xa436, 0x8ffb, 0xa438, 0x1200, 0xa436, 0x8ffd, 0xa438, 0x1200,
+ 0xa436, 0xb818, 0xa438, 0x6602, 0xa436, 0xb81a, 0xa438, 0x1f75,
+ 0xa436, 0xb81c, 0xa438, 0x67eb, 0xa436, 0xb81e, 0xa438, 0xffff,
+ 0xa436, 0xb850, 0xa438, 0xffff, 0xa436, 0xb852, 0xa438, 0xffff,
+ 0xa436, 0xb878, 0xa438, 0xffff, 0xa436, 0xb884, 0xa438, 0xffff,
+ 0xa436, 0xb832, 0xa438, 0x0007, 0xB82E, 0x0000, 0xa436, 0x8023,
+ 0xa438, 0x0000, 0xB820, 0x0000, 0xFFFF, 0xFFFF
+};
+
+static const u16 phy_mcu_ram_code_8127a_2[] = {
+ 0xb892, 0x0000, 0xB88E, 0xc07c, 0xB890, 0x0203, 0xB890, 0x0304,
+ 0xB890, 0x0405, 0xB890, 0x0607, 0xB890, 0x0809, 0xB890, 0x0B0D,
+ 0xB890, 0x0F11, 0xB890, 0x1418, 0xB890, 0x1B20, 0xB890, 0x252B,
+ 0xB890, 0x343E, 0xB890, 0x4854, 0xB890, 0x6203, 0xB890, 0x0304,
+ 0xB890, 0x0506, 0xB890, 0x080A, 0xB890, 0x0C0E, 0xB890, 0x1216,
+ 0xB890, 0x1B22, 0xB890, 0x2A34, 0xB890, 0x404F, 0xB890, 0x6171,
+ 0xB890, 0x7884, 0xB890, 0x9097, 0xB890, 0x0203, 0xB890, 0x0406,
+ 0xB890, 0x080B, 0xB890, 0x0E13, 0xB890, 0x1820, 0xB890, 0x2A39,
+ 0xB890, 0x4856, 0xB890, 0xE060, 0xB890, 0xE050, 0xB890, 0xD080,
+ 0xB890, 0x8070, 0xB890, 0x70A0, 0xB890, 0x1000, 0xB890, 0x60D0,
+ 0xB890, 0xB010, 0xB890, 0xE0B0, 0xB890, 0x80C0, 0xB890, 0xE000,
+ 0xB890, 0x2020, 0xB890, 0x1020, 0xB890, 0xE090, 0xB890, 0x80C0,
+ 0xB890, 0x3020, 0xB890, 0x00E0, 0xB890, 0x40A0, 0xB890, 0xE020,
+ 0xB890, 0x5060, 0xB890, 0xE0D0, 0xB890, 0xA000, 0xB890, 0x3030,
+ 0xB890, 0x4070, 0xB890, 0xE0E0, 0xB890, 0xD080, 0xB890, 0xA010,
+ 0xB890, 0xE040, 0xB890, 0x80B0, 0xB890, 0x50B0, 0xB890, 0x2090,
+ 0xB820, 0x0000, 0xFFFF, 0xFFFF
+};
+
+static void
+rtl_real_set_phy_mcu_8127a_1(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_ram_code(hw, phy_mcu_ram_code_8127a_1,
+ ARRAY_SIZE(phy_mcu_ram_code_8127a_1));
+}
+
+static void
+rtl_real_set_phy_mcu_8127a_2(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_ram_code(hw, phy_mcu_ram_code_8127a_2,
+ ARRAY_SIZE(phy_mcu_ram_code_8127a_2));
+}
+
+void
+rtl_set_phy_mcu_8127a_1(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_real_set_phy_mcu_8127a_1(hw);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_real_set_phy_mcu_8127a_2(hw);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
diff --git a/drivers/net/r8169/base/rtl8127_mcu.h b/drivers/net/r8169/base/rtl8127_mcu.h
new file mode 100644
index 0000000000..3cea035cf8
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8127_mcu.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef RTL8127_MCU_H
+#define RTL8127_MCU_H
+
+void rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw);
+
+void rtl_set_phy_mcu_8127a_1(struct rtl_hw *hw);
+
+#endif /* RTL8127_MCU_H */
diff --git a/drivers/net/r8169/base/rtl8168kb.c b/drivers/net/r8169/base/rtl8168kb.c
index 1131f69856..e6f9d68c45 100644
--- a/drivers/net/r8169/base/rtl8168kb.c
+++ b/drivers/net/r8169/base/rtl8168kb.c
@@ -91,8 +91,13 @@ hw_mac_mcu_config_8168kb(struct rtl_hw *hw)
if (hw->NotWrMcuPatchCode)
return;
+ rtl_hw_disable_mac_mcu_bps(hw);
+
switch (hw->mcfg) {
case CFG_METHOD_52:
+ /* Get H/W mac mcu patch code version */
+ hw->hw_mcu_patch_code_ver = rtl_get_hw_mcu_patch_code_ver(hw);
+
rtl_set_mac_mcu_8125a_2(hw);
break;
case CFG_METHOD_53:
diff --git a/drivers/net/r8169/meson.build b/drivers/net/r8169/meson.build
index 720d79acff..5662ecf0f5 100644
--- a/drivers/net/r8169/meson.build
+++ b/drivers/net/r8169/meson.build
@@ -27,4 +27,6 @@ sources = files(
'base/rtl8168fp.c',
'base/rtl8168fp_mcu.c',
'base/rtl8168m.c',
+ 'base/rtl8127.c',
+ 'base/rtl8127_mcu.c',
)
\ No newline at end of file
diff --git a/drivers/net/r8169/r8169_compat.h b/drivers/net/r8169/r8169_compat.h
index 631acffb64..8d06120518 100644
--- a/drivers/net/r8169/r8169_compat.h
+++ b/drivers/net/r8169/r8169_compat.h
@@ -105,6 +105,7 @@ enum mcfg {
CFG_METHOD_69,
CFG_METHOD_70,
CFG_METHOD_71,
+ CFG_METHOD_91,
CFG_METHOD_MAX,
CFG_METHOD_DEFAULT = 0xFF
};
@@ -393,8 +394,13 @@ enum RTL_register_content {
/* PHY status */
PowerSaveStatus = 0x80,
+ _1000bpsL = 0x80000,
+ _10000bpsF = 0x4000,
+ _10000bpsL = 0x2000,
_5000bpsF = 0x1000,
+ _5000bpsL = 0x800,
_2500bpsF = 0x400,
+ _2500bpsL = 0x200,
TxFlowCtrl = 0x40,
RxFlowCtrl = 0x20,
_1000bpsF = 0x10,
@@ -429,6 +435,7 @@ enum RTL_register_content {
EPHYAR_Reg_Mask_v2 = 0x7f,
EPHYAR_Reg_shift = 16,
EPHYAR_Data_Mask = 0xffff,
+ EPHYAR_EXT_ADDR = 0x0ffe,
/* CSI access */
CSIAR_Flag = 0x80000000,
@@ -513,6 +520,7 @@ enum RTL_chipset_name {
RTL8168G,
RTL8168H,
RTL8168M,
+ RTL8127,
UNKNOWN
};
@@ -551,28 +559,28 @@ enum RTL_chipset_name {
#define TRUE 1
#define FALSE 0
-#define SPEED_10 10
-#define SPEED_100 100
-#define SPEED_1000 1000
-#define SPEED_2500 2500
-#define SPEED_5000 5000
-
-#define DUPLEX_HALF 1
-#define DUPLEX_FULL 2
-
-#define AUTONEG_ENABLE 1
-#define AUTONEG_DISABLE 0
-
-#define ADVERTISE_10_HALF 0x0001
-#define ADVERTISE_10_FULL 0x0002
-#define ADVERTISE_100_HALF 0x0004
-#define ADVERTISE_100_FULL 0x0008
-#define ADVERTISE_1000_HALF 0x0010 /* Not used, just FYI */
-#define ADVERTISE_1000_FULL 0x0020
-#define ADVERTISE_2500_HALF 0x0040 /* NOT used, just FYI */
-#define ADVERTISE_2500_FULL 0x0080
-#define ADVERTISE_5000_HALF 0x0100 /* NOT used, just FYI */
-#define ADVERTISE_5000_FULL 0x0200
+#define SPEED_10 10
+#define SPEED_100 100
+#define SPEED_1000 1000
+#define SPEED_2500 2500
+#define SPEED_5000 5000
+#define SPEED_10000 10000
+
+#define DUPLEX_HALF 1
+#define DUPLEX_FULL 2
+
+#define AUTONEG_ENABLE 1
+#define AUTONEG_DISABLE 0
+
+#define ADVERTISE_10_HALF RTE_BIT64(0)
+#define ADVERTISE_10_FULL RTE_BIT64(1)
+#define ADVERTISE_100_HALF RTE_BIT64(2)
+#define ADVERTISE_100_FULL RTE_BIT64(3)
+#define ADVERTISE_1000_HALF RTE_BIT64(4)
+#define ADVERTISE_1000_FULL RTE_BIT64(5)
+#define ADVERTISE_2500_FULL RTE_BIT64(15)
+#define ADVERTISE_5000_FULL RTE_BIT64(48)
+#define ADVERTISE_10000_FULL RTE_BIT64(12)
#define RTL_MAX_TX_DESC 4096
#define RTL_MAX_RX_DESC 4096
diff --git a/drivers/net/r8169/r8169_ethdev.c b/drivers/net/r8169/r8169_ethdev.c
index e2ea9435fe..1f4c7eb885 100644
--- a/drivers/net/r8169/r8169_ethdev.c
+++ b/drivers/net/r8169/r8169_ethdev.c
@@ -56,6 +56,8 @@ static const struct rte_pci_id pci_id_r8169_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5000) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8127) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x0E10) },
{.vendor_id = 0, /* sentinel */ },
};
@@ -165,6 +167,9 @@ _rtl_setup_link(struct rte_eth_dev *dev)
case CFG_METHOD_71:
speed_mode = SPEED_5000;
break;
+ case CFG_METHOD_91:
+ speed_mode = SPEED_10000;
+ break;
default:
speed_mode = SPEED_1000;
break;
@@ -176,7 +181,8 @@ _rtl_setup_link(struct rte_eth_dev *dev)
if (*link_speeds & ~(RTE_ETH_LINK_SPEED_10M_HD | RTE_ETH_LINK_SPEED_10M |
RTE_ETH_LINK_SPEED_100M_HD | RTE_ETH_LINK_SPEED_100M |
RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_2_5G |
- RTE_ETH_LINK_SPEED_5G | RTE_ETH_LINK_SPEED_FIXED))
+ RTE_ETH_LINK_SPEED_5G | RTE_ETH_LINK_SPEED_10G |
+ RTE_ETH_LINK_SPEED_FIXED))
goto error_invalid_config;
if (*link_speeds & RTE_ETH_LINK_SPEED_10M_HD) {
@@ -214,6 +220,11 @@ _rtl_setup_link(struct rte_eth_dev *dev)
hw->duplex = DUPLEX_FULL;
adv |= ADVERTISE_5000_FULL;
}
+ if (*link_speeds & RTE_ETH_LINK_SPEED_10G) {
+ hw->speed = SPEED_10000;
+ hw->duplex = DUPLEX_FULL;
+ adv |= ADVERTISE_10000_FULL;
+ }
hw->autoneg = AUTONEG_ENABLE;
hw->advertising = adv;
@@ -295,27 +306,8 @@ rtl_dev_start(struct rte_eth_dev *dev)
rtl_hw_config(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
+ if (!rtl_is_8125(hw))
set_offset79(pci_dev, 0x40);
- break;
- }
/* Initialize transmission unit */
rtl_tx_init(dev);
@@ -362,23 +354,8 @@ rtl_dev_stop(struct rte_eth_dev *dev)
rtl_nic_reset(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw))
rtl_mac_ocp_write(hw, 0xE00A, hw->mcu_pme_setting);
- break;
- }
rtl_powerdown_pll(hw);
@@ -411,23 +388,8 @@ rtl_dev_set_link_down(struct rte_eth_dev *dev)
struct rtl_hw *hw = &adapter->hw;
/* mcu pme intr masks */
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw))
rtl_mac_ocp_write(hw, 0xE00A, hw->mcu_pme_setting & ~(BIT_11 | BIT_14));
- break;
- }
rtl_powerdown_pll(hw);
@@ -463,6 +425,9 @@ rtl_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
RTE_ETH_LINK_SPEED_1G;
switch (hw->chipset_name) {
+ case RTL8127:
+ dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10G;
+ /* fallthrough */
case RTL8126A:
dev_info->speed_capa |= RTE_ETH_LINK_SPEED_5G;
/* fallthrough */
@@ -605,61 +570,23 @@ rtl_dev_link_update(struct rte_eth_dev *dev, int wait __rte_unused)
if (status & FullDup) {
link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- case CFG_METHOD_48:
+ if (!rtl_is_8125(hw) || hw->mcfg == CFG_METHOD_48)
RTL_W32(hw, TxConfig, (RTL_R32(hw, TxConfig) |
(BIT_24 | BIT_25)) & ~BIT_19);
- break;
- }
} else {
link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- case CFG_METHOD_48:
+ if (!rtl_is_8125(hw) || hw->mcfg == CFG_METHOD_48)
RTL_W32(hw, TxConfig, (RTL_R32(hw, TxConfig) | BIT_25) &
~(BIT_19 | BIT_24));
- break;
- }
}
/*
* The PHYstatus register for the RTL8168 is 8 bits,
- * while for the RTL8125 and RTL8126, it is 16 bits.
+ * while for the RTL8125, RTL8126 and RTL8127, it is 16 bits.
*/
- if (status & _5000bpsF && rtl_is_8125(hw))
+ if (status & _10000bpsF && rtl_is_8125(hw))
+ speed = 10000;
+ else if (status & _5000bpsF && rtl_is_8125(hw))
speed = 5000;
else if (status & _2500bpsF && rtl_is_8125(hw))
speed = 2500;
diff --git a/drivers/net/r8169/r8169_ethdev.h b/drivers/net/r8169/r8169_ethdev.h
index 0de91045fa..bc65ccf68a 100644
--- a/drivers/net/r8169/r8169_ethdev.h
+++ b/drivers/net/r8169/r8169_ethdev.h
@@ -52,6 +52,8 @@ struct rtl_hw {
u8 NotWrMcuPatchCode;
u8 HwSuppMacMcuVer;
u16 MacMcuPageSize;
+ u64 hw_mcu_patch_code_ver;
+ u64 bin_mcu_patch_code_ver;
u8 NotWrRamCodeToMicroP;
u8 HwHasWrRamCodeToMicroP;
@@ -63,7 +65,7 @@ struct rtl_hw {
u8 autoneg;
u8 duplex;
u32 speed;
- u32 advertising;
+ u64 advertising;
enum rtl_fc_mode fcpause;
u32 HwSuppMaxPhyLinkSpeed;
diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c
index 21a599dfc6..002dc25ef7 100644
--- a/drivers/net/r8169/r8169_hw.c
+++ b/drivers/net/r8169/r8169_hw.c
@@ -431,6 +431,30 @@ rtl_mac_ocp_read(struct rtl_hw *hw, u16 addr)
return data16;
}
+static void
+rtl_clear_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 clearmask,
+ u16 setmask)
+{
+ u16 val;
+
+ val = rtl_mac_ocp_read(hw, addr);
+ val &= ~clearmask;
+ val |= setmask;
+ rtl_mac_ocp_write(hw, addr, val);
+}
+
+void
+rtl_clear_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
+{
+ rtl_clear_set_mac_ocp_bit(hw, addr, mask, 0);
+}
+
+void
+rtl_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
+{
+ rtl_clear_set_mac_ocp_bit(hw, addr, 0, mask);
+}
+
u32
rtl_csi_other_fun_read(struct rtl_hw *hw, u8 multi_fun_sel_bit, u32 addr)
{
@@ -562,46 +586,26 @@ rtl8168_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
static void
rtl_enable_rxdvgate(struct rtl_hw *hw)
{
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) | BIT_3);
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) | BIT_3);
+
+ if (!rtl_is_8125(hw))
rte_delay_ms(2);
- break;
- }
}
void
rtl_disable_rxdvgate(struct rtl_hw *hw)
{
+ RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_3);
+
+ if (!rtl_is_8125(hw))
+ rte_delay_ms(2);
+}
+
+static void
+rtl_stop_all_request(struct rtl_hw *hw)
+{
+ int i;
+
switch (hw->mcfg) {
case CFG_METHOD_21:
case CFG_METHOD_22:
@@ -620,11 +624,20 @@ rtl_disable_rxdvgate(struct rtl_hw *hw)
case CFG_METHOD_35:
case CFG_METHOD_36:
case CFG_METHOD_37:
+ rte_delay_ms(2);
+ break;
case CFG_METHOD_48:
case CFG_METHOD_49:
+ case CFG_METHOD_52:
+ RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) | StopReq);
+ for (i = 0; i < 20; i++) {
+ rte_delay_us(10);
+ if (!(RTL_R8(hw, ChipCmd) & StopReq))
+ break;
+ }
+ break;
case CFG_METHOD_50:
case CFG_METHOD_51:
- case CFG_METHOD_52:
case CFG_METHOD_53:
case CFG_METHOD_54:
case CFG_METHOD_55:
@@ -633,74 +646,17 @@ rtl_disable_rxdvgate(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
- RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_3);
- rte_delay_ms(2);
- break;
- }
-}
-
-static void
-rtl8125_stop_all_request(struct rtl_hw *hw)
-{
- int i;
-
- RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) | StopReq);
-
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- for (i = 0; i < 20; i++) {
- rte_delay_us(10);
- if (!(RTL_R8(hw, ChipCmd) & StopReq))
- break;
- }
-
- break;
- default:
+ case CFG_METHOD_91:
+ RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) | StopReq);
rte_delay_us(200);
break;
}
-
- RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) & (CmdTxEnb | CmdRxEnb));
}
static void
-rtl8168_stop_all_request(struct rtl_hw *hw)
+rtl_clear_stop_all_request(struct rtl_hw *hw)
{
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- rte_delay_ms(2);
- break;
- default:
- rte_delay_ms(10);
- break;
- }
-}
-
-static void
-rtl_stop_all_request(struct rtl_hw *hw)
-{
- if (rtl_is_8125(hw))
- rtl8125_stop_all_request(hw);
- else
- rtl8168_stop_all_request(hw);
+ RTL_W8(hw, ChipCmd, RTL_R8(hw, ChipCmd) & (CmdTxEnb | CmdRxEnb));
}
static void
@@ -708,24 +664,14 @@ rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
{
int i;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
+ if (rtl_is_8125(hw)) {
+ for (i = 0; i < 3000; i++) {
+ rte_delay_us(50);
+ if ((RTL_R8(hw, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) ==
+ (Txfifo_empty | Rxfifo_empty))
+ break;
+ }
+ } else {
for (i = 0; i < 10; i++) {
rte_delay_us(100);
if (RTL_R32(hw, TxConfig) & BIT_11)
@@ -740,27 +686,6 @@ rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
}
rte_delay_ms(1);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- for (i = 0; i < 3000; i++) {
- rte_delay_us(50);
- if ((RTL_R8(hw, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) ==
- (Txfifo_empty | Rxfifo_empty))
- break;
- }
- break;
}
switch (hw->mcfg) {
@@ -774,6 +699,7 @@ rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
for (i = 0; i < 3000; i++) {
rte_delay_us(50);
if ((RTL_R16(hw, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) ==
@@ -805,7 +731,7 @@ rtl_nic_reset(struct rtl_hw *hw)
rtl_wait_txrx_fifo_empty(hw);
- rte_delay_ms(2);
+ rtl_clear_stop_all_request(hw);
/* Soft reset the chip. */
RTL_W8(hw, ChipCmd, CmdReset);
@@ -833,43 +759,10 @@ rtl_disable_cfg9346_write(struct rtl_hw *hw)
static void
rtl_enable_force_clkreq(struct rtl_hw *hw, bool enable)
{
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- if (enable)
- RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) | BIT_7);
- else
- RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) & ~BIT_7);
- break;
- }
+ if (enable)
+ RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) | BIT_7);
+ else
+ RTL_W8(hw, 0xF1, RTL_R8(hw, 0xF1) & ~BIT_7);
}
static void
@@ -935,7 +828,7 @@ rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
}
static void
-rtl8126_disable_l1_timeout(struct rtl_hw *hw)
+rtl_disable_l1_timeout(struct rtl_hw *hw)
{
rtl_csi_write(hw, 0x890, rtl_csi_read(hw, 0x890) & ~BIT_0);
}
@@ -943,26 +836,7 @@ rtl8126_disable_l1_timeout(struct rtl_hw *hw)
static void
rtl8125_disable_eee_plus(struct rtl_hw *hw)
{
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_mac_ocp_write(hw, 0xE080, rtl_mac_ocp_read(hw, 0xE080) & ~BIT_1);
- break;
- default:
- /* Not support EEEPlus */
- break;
- }
+ rtl_mac_ocp_write(hw, 0xE080, rtl_mac_ocp_read(hw, 0xE080) & ~BIT_1);
}
static void
@@ -1004,6 +878,7 @@ rtl_hw_clear_timer_int(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
RTL_W32(hw, TIMER_INT0_8125, 0x0000);
RTL_W32(hw, TIMER_INT1_8125, 0x0000);
RTL_W32(hw, TIMER_INT2_8125, 0x0000);
@@ -1049,9 +924,6 @@ rtl8125_hw_config(struct rtl_hw *hw)
{
u32 mac_ocp_data;
- /* Set RxConfig to default */
- RTL_W32(hw, RxConfig, (RX_DMA_BURST_unlimited << RxCfgDMAShift));
-
rtl_nic_reset(hw);
rtl_enable_cfg9346_write(hw);
@@ -1061,24 +933,7 @@ rtl8125_hw_config(struct rtl_hw *hw)
rtl_enable_aspm_clkreq_lock(hw, 0);
/* Disable magic packet */
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- mac_ocp_data = 0;
- rtl_mac_ocp_write(hw, 0xC0B6, mac_ocp_data);
- break;
- }
+ rtl_mac_ocp_write(hw, 0xC0B6, 0);
/* Set DMA burst size and interframe gap time */
RTL_W32(hw, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
@@ -1103,190 +958,178 @@ rtl8125_hw_config(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
- rtl8126_disable_l1_timeout(hw);
+ case CFG_METHOD_91:
+ rtl_disable_l1_timeout(hw);
break;
}
+ /* RSS_control_0 */
+ RTL_W32(hw, RSS_CTRL_8125, 0x00);
+
+ /* VMQ_control */
+ RTL_W16(hw, Q_NUM_CTRL_8125, 0x0000);
+
+ /* Disable speed down */
+ RTL_W8(hw, Config1, RTL_R8(hw, Config1) & ~0x10);
+
+ /* CRC disable set */
+ rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
+ rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
+
+ /* Disable new TX desc format */
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB58);
+ if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71 ||
+ hw->mcfg == CFG_METHOD_91)
+ mac_ocp_data &= ~(BIT_0 | BIT_1);
+ else
+ mac_ocp_data &= ~BIT_0;
+ rtl_mac_ocp_write(hw, 0xEB58, mac_ocp_data);
+
+ if (hw->mcfg >= CFG_METHOD_91) {
+ if (hw->EnableTxNoClose)
+ RTL_W8(hw, 0x20E4, RTL_R8(hw, 0x20E4) | BIT_2);
+ else
+ RTL_W8(hw, 0x20E4, RTL_R8(hw, 0x20E4) & ~BIT_2);
+ }
+
switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
case CFG_METHOD_54:
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
- case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
- /* RSS_control_0 */
- RTL_W32(hw, RSS_CTRL_8125, 0x00);
-
- /* VMQ_control */
- RTL_W16(hw, Q_NUM_CTRL_8125, 0x0000);
+ case CFG_METHOD_91:
+ RTL_W8(hw, 0xD8, RTL_R8(hw, 0xD8) & ~EnableRxDescV4_0);
+ break;
+ }
+
+ if (hw->mcfg >= CFG_METHOD_91) {
+ rtl_clear_mac_ocp_bit(hw, 0xE00C, BIT_12);
+ rtl_clear_mac_ocp_bit(hw, 0xC0C2, BIT_6);
+ }
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE63E);
+ mac_ocp_data &= ~(BIT_5 | BIT_4);
+ if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
+ hw->mcfg == CFG_METHOD_52 || hw->mcfg == CFG_METHOD_69 ||
+ hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71 ||
+ hw->mcfg == CFG_METHOD_91)
+ mac_ocp_data |= ((0x02 & 0x03) << 4);
+ rtl_mac_ocp_write(hw, 0xE63E, mac_ocp_data);
+
+ /*
+ * FTR_MCU_CTRL
+ * 3-2 txpla packet valid start
+ */
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xC0B4);
+ mac_ocp_data &= ~BIT_0;
+ rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
+ mac_ocp_data |= BIT_0;
+ rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xC0B4);
+ mac_ocp_data |= (BIT_3 | BIT_2);
+ rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB6A);
+ mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 |
+ BIT_1 | BIT_0);
+ mac_ocp_data |= (BIT_5 | BIT_4 | BIT_1 | BIT_0);
+ rtl_mac_ocp_write(hw, 0xEB6A, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB50);
+ mac_ocp_data &= ~(BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5);
+ mac_ocp_data |= BIT_6;
+ rtl_mac_ocp_write(hw, 0xEB50, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE056);
+ mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+ rtl_mac_ocp_write(hw, 0xE056, mac_ocp_data);
+
+ /* EEE_CR */
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xE040);
+ mac_ocp_data &= ~BIT_12;
+ rtl_mac_ocp_write(hw, 0xE040, mac_ocp_data);
+
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xEA1C);
+ mac_ocp_data &= ~(BIT_1 | BIT_0);
+ mac_ocp_data |= BIT_0;
+ rtl_mac_ocp_write(hw, 0xEA1C, mac_ocp_data);
- /* Disable speed down */
- RTL_W8(hw, Config1, RTL_R8(hw, Config1) & ~0x10);
+ switch (hw->mcfg) {
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_52:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ rtl_oob_mutex_lock(hw);
+ break;
+ }
- /* CRC disable set */
- rtl_mac_ocp_write(hw, 0xC140, 0xFFFF);
- rtl_mac_ocp_write(hw, 0xC142, 0xFFFF);
+ /* MAC_PWRDWN_CR0 */
+ rtl_mac_ocp_write(hw, 0xE0C0, 0x4000);
- /* Disable new TX desc format */
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB58);
- if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
- mac_ocp_data &= ~(BIT_0 | BIT_1);
- else
- mac_ocp_data &= ~BIT_0;
- rtl_mac_ocp_write(hw, 0xEB58, mac_ocp_data);
-
- if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
- RTL_W8(hw, 0xD8, RTL_R8(hw, 0xD8) & ~BIT_1);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xE63E);
- mac_ocp_data &= ~(BIT_5 | BIT_4);
- if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
- hw->mcfg == CFG_METHOD_52 || hw->mcfg == CFG_METHOD_69 ||
- hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
- mac_ocp_data |= ((0x02 & 0x03) << 4);
- rtl_mac_ocp_write(hw, 0xE63E, mac_ocp_data);
-
- /*
- * FTR_MCU_CTRL
- * 3-2 txpla packet valid start
- */
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xC0B4);
- mac_ocp_data &= ~BIT_0;
- rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
- mac_ocp_data |= BIT_0;
- rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xC0B4);
- mac_ocp_data |= (BIT_3 | BIT_2);
- rtl_mac_ocp_write(hw, 0xC0B4, mac_ocp_data);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB6A);
- mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 |
- BIT_0);
- mac_ocp_data |= (BIT_5 | BIT_4 | BIT_1 | BIT_0);
- rtl_mac_ocp_write(hw, 0xEB6A, mac_ocp_data);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xEB50);
- mac_ocp_data &= ~(BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5);
- mac_ocp_data |= BIT_6;
- rtl_mac_ocp_write(hw, 0xEB50, mac_ocp_data);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xE056);
- mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
- rtl_mac_ocp_write(hw, 0xE056, mac_ocp_data);
-
- /* EEE_CR */
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xE040);
- mac_ocp_data &= ~BIT_12;
- rtl_mac_ocp_write(hw, 0xE040, mac_ocp_data);
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xEA1C);
- mac_ocp_data &= ~(BIT_1 | BIT_0);
- mac_ocp_data |= BIT_0;
- rtl_mac_ocp_write(hw, 0xEA1C, mac_ocp_data);
-
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_lock(hw);
- break;
- }
+ rtl_set_mac_ocp_bit(hw, 0xE052, (BIT_6 | BIT_5));
+ rtl_clear_mac_ocp_bit(hw, 0xE052, (BIT_3 | BIT_7));
- /* MAC_PWRDWN_CR0 */
- rtl_mac_ocp_write(hw, 0xE0C0, 0x4000);
+ switch (hw->mcfg) {
+ case CFG_METHOD_48:
+ case CFG_METHOD_49:
+ case CFG_METHOD_52:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
+ rtl_oob_mutex_unlock(hw);
+ break;
+ }
- rtl_set_mac_ocp_bit(hw, 0xE052, (BIT_6 | BIT_5));
- rtl_clear_mac_ocp_bit(hw, 0xE052, (BIT_3 | BIT_7));
+ /*
+ * DMY_PWR_REG_0
+ * (1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b111111, L1 Mask
+ */
+ rtl_set_mac_ocp_bit(hw, 0xC0AC, (BIT_7 | BIT_8 | BIT_9 | BIT_10 |
+ BIT_11 | BIT_12));
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_unlock(hw);
- break;
- }
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xD430);
+ mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 |
+ BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ mac_ocp_data |= 0x45F;
+ rtl_mac_ocp_write(hw, 0xD430, mac_ocp_data);
- /*
- * DMY_PWR_REG_0
- * (1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b111111, L1 Mask
- */
- rtl_set_mac_ocp_bit(hw, 0xC0AC,
- (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12));
-
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xD430);
- mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 |
- BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
- mac_ocp_data |= 0x45F;
- rtl_mac_ocp_write(hw, 0xD430, mac_ocp_data);
-
- if (!hw->DASH)
- RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) | BIT_6 | BIT_7);
- else
- RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) & ~(BIT_6 | BIT_7));
+ if (!hw->DASH)
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) | BIT_6 | BIT_7);
+ else
+ RTL_W8(hw, 0xD0, RTL_R8(hw, 0xD0) & ~(BIT_6 | BIT_7));
- if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
- hw->mcfg == CFG_METHOD_52)
- RTL_W8(hw, MCUCmd_reg, RTL_R8(hw, MCUCmd_reg) | BIT_0);
+ if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
+ hw->mcfg == CFG_METHOD_52)
+ RTL_W8(hw, MCUCmd_reg, RTL_R8(hw, MCUCmd_reg) | BIT_0);
- rtl8125_disable_eee_plus(hw);
+ rtl8125_disable_eee_plus(hw);
- mac_ocp_data = rtl_mac_ocp_read(hw, 0xEA1C);
- mac_ocp_data &= ~BIT_2;
- if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71)
- mac_ocp_data &= ~(BIT_9 | BIT_8);
- rtl_mac_ocp_write(hw, 0xEA1C, mac_ocp_data);
+ mac_ocp_data = rtl_mac_ocp_read(hw, 0xEA1C);
+ mac_ocp_data &= ~BIT_2;
+ if (hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71 ||
+ hw->mcfg == CFG_METHOD_91)
+ mac_ocp_data &= ~(BIT_9 | BIT_8);
+ rtl_mac_ocp_write(hw, 0xEA1C, mac_ocp_data);
- /* Clear TCAM entries */
- rtl_set_mac_ocp_bit(hw, 0xEB54, BIT_0);
- rte_delay_us(1);
- rtl_clear_mac_ocp_bit(hw, 0xEB54, BIT_0);
+ /* Clear TCAM entries */
+ rtl_set_mac_ocp_bit(hw, 0xEB54, BIT_0);
+ rte_delay_us(1);
+ rtl_clear_mac_ocp_bit(hw, 0xEB54, BIT_0);
- RTL_W16(hw, 0x1880, RTL_R16(hw, 0x1880) & ~(BIT_4 | BIT_5));
+ RTL_W16(hw, 0x1880, RTL_R16(hw, 0x1880) & ~(BIT_4 | BIT_5));
- switch (hw->mcfg) {
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- RTL_W8(hw, 0xd8, RTL_R8(hw, 0xd8) & ~EnableRxDescV4_0);
- break;
- }
- }
+ if (hw->mcfg == CFG_METHOD_91)
+ rtl_clear_set_mac_ocp_bit(hw, 0xD40C, 0xE038, 0x8020);
/* Other hw parameters */
rtl_hw_clear_timer_int(hw);
rtl8125_hw_clear_int_miti(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_mac_ocp_write(hw, 0xE098, 0xC302);
- break;
- }
+ rtl_mac_ocp_write(hw, 0xE098, 0xC302);
rtl_disable_cfg9346_write(hw);
@@ -1308,52 +1151,12 @@ rtl8168_hw_config(struct rtl_hw *hw)
rtl_enable_aspm_clkreq_lock(hw, 0);
/* Clear io_rdy_l23 */
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~BIT_1);
- break;
- }
+ RTL_W8(hw, Config3, RTL_R8(hw, Config3) & ~BIT_1);
/* Keep magic packet only */
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- csi_tmp = rtl_eri_read(hw, 0xDE, 1, ERIAR_ExGMAC);
- csi_tmp &= BIT_0;
- rtl_eri_write(hw, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
- break;
- }
+ csi_tmp = rtl_eri_read(hw, 0xDE, 1, ERIAR_ExGMAC);
+ csi_tmp &= BIT_0;
+ rtl_eri_write(hw, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
/* Set TxConfig to default */
RTL_W32(hw, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
@@ -1377,29 +1180,9 @@ rtl8168_hw_config(struct rtl_hw *hw)
rtl_hw_clear_timer_int(hw);
/* Clkreq exit masks */
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- csi_tmp = rtl_eri_read(hw, 0xD4, 4, ERIAR_ExGMAC);
- csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
- rtl_eri_write(hw, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
- break;
- }
+ csi_tmp = rtl_eri_read(hw, 0xD4, 4, ERIAR_ExGMAC);
+ csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+ rtl_eri_write(hw, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
switch (hw->mcfg) {
case CFG_METHOD_25:
@@ -1516,6 +1299,9 @@ rtl_set_hw_ops(struct rtl_hw *hw)
case CFG_METHOD_71:
hw->hw_ops = rtl8126a_ops;
return 0;
+ case CFG_METHOD_91:
+ hw->hw_ops = rtl8127_ops;
+ return 0;
default:
return -ENOTSUP;
}
@@ -1526,48 +1312,11 @@ rtl_hw_disable_mac_mcu_bps(struct rtl_hw *hw)
{
u16 reg_addr;
- rtl_enable_cfg9346_write(hw);
- rtl_enable_aspm_clkreq_lock(hw, 0);
- rtl_disable_cfg9346_write(hw);
-
- switch (hw->mcfg) {
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- rtl_mac_ocp_write(hw, 0xFC38, 0x0000);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_mac_ocp_write(hw, 0xFC48, 0x0000);
- break;
- }
+ rtl_enable_cfg9346_write(hw);
+ rtl_enable_aspm_clkreq_lock(hw, 0);
+ rtl_disable_cfg9346_write(hw);
switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
case CFG_METHOD_29:
case CFG_METHOD_30:
case CFG_METHOD_31:
@@ -1577,11 +1326,7 @@ rtl_hw_disable_mac_mcu_bps(struct rtl_hw *hw)
case CFG_METHOD_35:
case CFG_METHOD_36:
case CFG_METHOD_37:
- for (reg_addr = 0xFC28; reg_addr < 0xFC38; reg_addr += 2)
- rtl_mac_ocp_write(hw, reg_addr, 0x0000);
-
- rte_delay_ms(3);
- rtl_mac_ocp_write(hw, 0xFC26, 0x0000);
+ rtl_mac_ocp_write(hw, 0xFC38, 0x0000);
break;
case CFG_METHOD_48:
case CFG_METHOD_49:
@@ -1596,13 +1341,21 @@ rtl_hw_disable_mac_mcu_bps(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
+ rtl_mac_ocp_write(hw, 0xFC48, 0x0000);
+ break;
+ }
+
+ if (rtl_is_8125(hw)) {
for (reg_addr = 0xFC28; reg_addr < 0xFC48; reg_addr += 2)
rtl_mac_ocp_write(hw, reg_addr, 0x0000);
-
- rte_delay_ms(3);
- rtl_mac_ocp_write(hw, 0xFC26, 0x0000);
- break;
+ } else {
+ for (reg_addr = 0xFC28; reg_addr < 0xFC38; reg_addr += 2)
+ rtl_mac_ocp_write(hw, reg_addr, 0x0000);
}
+
+ rte_delay_ms(3);
+ rtl_mac_ocp_write(hw, 0xFC26, 0x0000);
}
static void
@@ -1647,12 +1400,37 @@ _rtl_write_mac_mcu_ram_code_with_page(struct rtl_hw *hw, const u16 *entry,
}
}
+static void
+_rtl_set_hw_mcu_patch_code_ver(struct rtl_hw *hw, u64 ver)
+{
+ int i;
+
+ /* Switch to page 2 */
+ rtl_switch_mac_mcu_ram_code_page(hw, 2);
+
+ for (i = 0; i < 8; i += 2) {
+ rtl_mac_ocp_write(hw, 0xF9F8 + 6 - i, (u16)ver);
+ ver >>= 16;
+ }
+
+ /* Switch back to page 0 */
+ rtl_switch_mac_mcu_ram_code_page(hw, 0);
+}
+
+static void
+rtl_set_hw_mcu_patch_code_ver(struct rtl_hw *hw, u64 ver)
+{
+ _rtl_set_hw_mcu_patch_code_ver(hw, ver);
+
+ hw->hw_mcu_patch_code_ver = ver;
+}
+
void
rtl_write_mac_mcu_ram_code(struct rtl_hw *hw, const u16 *entry, u16 entry_cnt)
{
- if (HW_SUPPORT_MAC_MCU(hw) == FALSE)
+ if (!HW_SUPPORT_MAC_MCU(hw))
return;
- if (entry == NULL || entry_cnt == 0)
+ if (!entry || entry_cnt == 0)
return;
if (hw->MacMcuPageSize > 0)
@@ -1660,12 +1438,16 @@ rtl_write_mac_mcu_ram_code(struct rtl_hw *hw, const u16 *entry, u16 entry_cnt)
hw->MacMcuPageSize);
else
_rtl_write_mac_mcu_ram_code(hw, entry, entry_cnt);
+
+ if (hw->bin_mcu_patch_code_ver > 0)
+ rtl_set_hw_mcu_patch_code_ver(hw, hw->bin_mcu_patch_code_ver);
}
bool
rtl_is_speed_mode_valid(u32 speed)
{
switch (speed) {
+ case SPEED_10000:
case SPEED_5000:
case SPEED_2500:
case SPEED_1000:
@@ -1708,7 +1490,7 @@ rtl_set_link_option(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex,
u64 adv;
if (!rtl_is_speed_mode_valid(speed))
- speed = SPEED_1000;
+ speed = hw->HwSuppMaxPhyLinkSpeed;
if (!rtl_is_duplex_mode_valid(duplex))
duplex = DUPLEX_FULL;
@@ -1720,6 +1502,9 @@ rtl_set_link_option(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex,
adv = 0;
switch (speed) {
+ case SPEED_10000:
+ adv |= ADVERTISE_10000_FULL;
+ /* Fall through */
case SPEED_5000:
adv |= ADVERTISE_5000_FULL;
/* Fall through */
@@ -1767,6 +1552,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_71:
speed_mode = SPEED_5000;
break;
+ case CFG_METHOD_91:
+ speed_mode = SPEED_10000;
+ break;
default:
speed_mode = SPEED_1000;
break;
@@ -1912,45 +1700,15 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_71:
hw->chipset_name = RTL8126A;
break;
+ case CFG_METHOD_91:
+ hw->chipset_name = RTL8127;
+ break;
default:
hw->chipset_name = UNKNOWN;
break;
}
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- hw->HwSuppNowIsOobVer = 1;
- break;
- }
+ hw->HwSuppNowIsOobVer = 1;
switch (hw->mcfg) {
case CFG_METHOD_21:
@@ -1985,6 +1743,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
hw->HwSuppCheckPhyDisableModeVer = 3;
break;
}
@@ -2005,6 +1764,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_71:
hw->HwSuppMaxPhyLinkSpeed = SPEED_5000;
break;
+ case CFG_METHOD_91:
+ hw->HwSuppMaxPhyLinkSpeed = SPEED_10000;
+ break;
default:
hw->HwSuppMaxPhyLinkSpeed = SPEED_1000;
break;
@@ -2023,6 +1785,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_91:
hw->HwSuppTxNoCloseVer = 6;
break;
case CFG_METHOD_69:
@@ -2140,6 +1903,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_71:
hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_71;
break;
+ case CFG_METHOD_91:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_91;
+ break;
}
if (hw->HwIcVerUnknown) {
@@ -2147,40 +1913,10 @@ rtl_init_software_variable(struct rtl_hw *hw)
hw->NotWrMcuPatchCode = TRUE;
}
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw)) {
hw->HwSuppMacMcuVer = 2;
- break;
- }
-
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
hw->MacMcuPageSize = RTL_MAC_MCU_PAGE_SIZE;
- break;
+ hw->mcu_pme_setting = rtl_mac_ocp_read(hw, 0xE00A);
}
switch (hw->mcfg) {
@@ -2208,6 +1944,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_91:
hw->HwSuppIntMitiVer = 6;
break;
case CFG_METHOD_70:
@@ -2218,24 +1955,6 @@ rtl_init_software_variable(struct rtl_hw *hw)
rtl_set_link_option(hw, autoneg_mode, speed_mode, duplex_mode, rtl_fc_full);
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- hw->mcu_pme_setting = rtl_mac_ocp_read(hw, 0xE00A);
- break;
- }
-
hw->mtu = RTL_DEFAULT_MTU;
}
@@ -2272,6 +1991,7 @@ rtl_exit_realwow(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_mac_ocp_write(hw, 0xC0BC, 0x00FF);
break;
}
@@ -2329,15 +2049,8 @@ rtl_wait_ll_share_fifo_ready(struct rtl_hw *hw)
static void
rtl8168_switch_to_sgmii_mode(struct rtl_hw *hw)
{
- if (!HW_SUPP_SERDES_PHY(hw))
- return;
-
- switch (hw->HwSuppSerDesPhyVer) {
- case 1:
- rtl_mac_ocp_write(hw, 0xEB00, 0x2);
- rtl8168_set_mcu_ocp_bit(hw, 0xEB16, BIT_1);
- break;
- }
+ rtl_mac_ocp_write(hw, 0xEB00, 0x2);
+ rtl8168_set_mcu_ocp_bit(hw, 0xEB16, BIT_1);
}
static void
@@ -2361,63 +2074,25 @@ rtl_exit_oob(struct rtl_hw *hw)
rtl_nic_reset(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- rtl_disable_now_is_oob(hw);
-
- data16 = rtl_mac_ocp_read(hw, 0xE8DE) & ~BIT_14;
- rtl_mac_ocp_write(hw, 0xE8DE, data16);
- rtl_wait_ll_share_fifo_ready(hw);
-
- data16 = rtl_mac_ocp_read(hw, 0xE8DE) | BIT_15;
- rtl_mac_ocp_write(hw, 0xE8DE, data16);
-
- rtl_wait_ll_share_fifo_ready(hw);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_disable_now_is_oob(hw);
+ rtl_disable_now_is_oob(hw);
- data16 = rtl_mac_ocp_read(hw, 0xE8DE) & ~BIT_14;
- rtl_mac_ocp_write(hw, 0xE8DE, data16);
- rtl_wait_ll_share_fifo_ready(hw);
+ data16 = rtl_mac_ocp_read(hw, 0xE8DE) & ~BIT_14;
+ rtl_mac_ocp_write(hw, 0xE8DE, data16);
+ rtl_wait_ll_share_fifo_ready(hw);
+ if (rtl_is_8125(hw)) {
rtl_mac_ocp_write(hw, 0xC0AA, 0x07D0);
rtl_mac_ocp_write(hw, 0xC0A6, 0x01B5);
rtl_mac_ocp_write(hw, 0xC01E, 0x5555);
- rtl_wait_ll_share_fifo_ready(hw);
- break;
+ } else {
+ data16 = rtl_mac_ocp_read(hw, 0xE8DE) | BIT_15;
+ rtl_mac_ocp_write(hw, 0xE8DE, data16);
}
+
+ rtl_wait_ll_share_fifo_ready(hw);
}
static void
@@ -2448,6 +2123,7 @@ rtl_disable_ups(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_mac_ocp_write(hw, 0xD40A,
rtl_mac_ocp_read(hw, 0xD40A) & ~BIT_4);
break;
@@ -2542,29 +2218,9 @@ rtl_hw_init(struct rtl_hw *hw)
rtl_disable_ocp_phy_power_saving(hw);
/* Set PCIE uncorrectable error status mask pcie 0x108 */
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- csi_tmp = rtl_csi_read(hw, 0x108);
- csi_tmp |= BIT_20;
- rtl_csi_write(hw, 0x108, csi_tmp);
- break;
- }
+ csi_tmp = rtl_csi_read(hw, 0x108);
+ csi_tmp |= BIT_20;
+ rtl_csi_write(hw, 0x108, csi_tmp);
/* MCU PME setting */
switch (hw->mcfg) {
@@ -2845,6 +2501,14 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
hw->HwIcVerUnknown = TRUE;
}
break;
+ case 0x6C800000:
+ if (ic_version_id == 0x100000) {
+ hw->mcfg = CFG_METHOD_91;
+ } else {
+ hw->mcfg = CFG_METHOD_91;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
default:
PMD_INIT_LOG(NOTICE, "unknown chip version (%x)", reg);
hw->mcfg = CFG_METHOD_DEFAULT;
@@ -2865,45 +2529,12 @@ rtl_get_mac_address(struct rtl_hw *hw, struct rte_ether_addr *ea)
{
u8 mac_addr[RTE_ETHER_ADDR_LEN] = {0};
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- *(u32 *)&mac_addr[0] = rtl_eri_read(hw, 0xE0, 4, ERIAR_ExGMAC);
- *(u16 *)&mac_addr[4] = rtl_eri_read(hw, 0xE4, 2, ERIAR_ExGMAC);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw)) {
*(u32 *)&mac_addr[0] = RTL_R32(hw, BACKUP_ADDR0_8125);
*(u16 *)&mac_addr[4] = RTL_R16(hw, BACKUP_ADDR1_8125);
- break;
- default:
- break;
+ } else {
+ *(u32 *)&mac_addr[0] = rtl_eri_read(hw, 0xE0, 4, ERIAR_ExGMAC);
+ *(u16 *)&mac_addr[4] = rtl_eri_read(hw, 0xE4, 2, ERIAR_ExGMAC);
}
rte_ether_addr_copy((struct rte_ether_addr *)mac_addr, ea);
@@ -3016,3 +2647,42 @@ rtl_is_8125(struct rtl_hw *hw)
{
return hw->mcfg >= CFG_METHOD_48;
}
+
+u64
+rtl_get_hw_mcu_patch_code_ver(struct rtl_hw *hw)
+{
+ u64 ver;
+ int i;
+
+ /* Switch to page 2 */
+ rtl_switch_mac_mcu_ram_code_page(hw, 2);
+
+ ver = 0;
+ for (i = 0; i < 8; i += 2) {
+ ver <<= 16;
+ ver |= rtl_mac_ocp_read(hw, 0xF9F8 + i);
+ }
+
+ /* Switch back to page 0 */
+ rtl_switch_mac_mcu_ram_code_page(hw, 0);
+
+ return ver;
+}
+
+u64
+rtl_get_bin_mcu_patch_code_ver(const u16 *entry, u16 entry_cnt)
+{
+ u64 ver;
+ int i;
+
+ if (!entry || entry_cnt == 0 || entry_cnt < 4)
+ return 0;
+
+ ver = 0;
+ for (i = 0; i < 4; i++) {
+ ver <<= 16;
+ ver |= entry[entry_cnt - 4 + i];
+ }
+
+ return ver;
+}
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index 36a7b57c97..f775c1a547 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -18,6 +18,9 @@
u16 rtl_mac_ocp_read(struct rtl_hw *hw, u16 addr);
void rtl_mac_ocp_write(struct rtl_hw *hw, u16 addr, u16 value);
+void rtl_clear_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
+void rtl_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
+
u32 rtl_ocp_read(struct rtl_hw *hw, u16 addr, u8 len);
void rtl_ocp_write(struct rtl_hw *hw, u16 addr, u8 len, u32 value);
@@ -73,6 +76,9 @@ void rtl8168_clear_and_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr,
void rtl8168_clear_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
void rtl8168_set_mcu_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
+u64 rtl_get_hw_mcu_patch_code_ver(struct rtl_hw *hw);
+u64 rtl_get_bin_mcu_patch_code_ver(const u16 *entry, u16 entry_cnt);
+
extern const struct rtl_hw_ops rtl8168g_ops;
extern const struct rtl_hw_ops rtl8168h_ops;
extern const struct rtl_hw_ops rtl8168ep_ops;
@@ -84,6 +90,7 @@ extern const struct rtl_hw_ops rtl8125bp_ops;
extern const struct rtl_hw_ops rtl8125d_ops;
extern const struct rtl_hw_ops rtl8126a_ops;
extern const struct rtl_hw_ops rtl8168kb_ops;
+extern const struct rtl_hw_ops rtl8127_ops;
#define NO_BASE_ADDRESS 0x00000000
#define RTL8168FP_OOBMAC_BASE 0xBAF70000
@@ -128,6 +135,7 @@ extern const struct rtl_hw_ops rtl8168kb_ops;
#define NIC_RAMCODE_VERSION_CFG_METHOD_69 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_70 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_71 (0x0060)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_91 (0x0015)
#define RTL_MAC_MCU_PAGE_SIZE 256
#define RTL_DEFAULT_MTU 1500
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index ce16ab3242..44ffd49a56 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -15,30 +15,6 @@
#include "r8169_logs.h"
#include "r8169_dash.h"
-static void
-rtl_clear_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 clearmask,
- u16 setmask)
-{
- u16 phy_reg_value;
-
- phy_reg_value = rtl_mac_ocp_read(hw, addr);
- phy_reg_value &= ~clearmask;
- phy_reg_value |= setmask;
- rtl_mac_ocp_write(hw, addr, phy_reg_value);
-}
-
-void
-rtl_clear_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
-{
- rtl_clear_set_mac_ocp_bit(hw, addr, mask, 0);
-}
-
-void
-rtl_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask)
-{
- rtl_clear_set_mac_ocp_bit(hw, addr, 0, mask);
-}
-
static u16
rtl_map_phy_ocp_addr(u16 PageNum, u8 RegNum)
{
@@ -172,12 +148,12 @@ void
rtl_clear_and_set_eth_phy_ocp_bit(struct rtl_hw *hw, u16 addr, u16 clearmask,
u16 setmask)
{
- u16 phy_reg_value;
+ u16 val;
- phy_reg_value = rtl_mdio_direct_read_phy_ocp(hw, addr);
- phy_reg_value &= ~clearmask;
- phy_reg_value |= setmask;
- rtl_mdio_direct_write_phy_ocp(hw, addr, phy_reg_value);
+ val = rtl_mdio_direct_read_phy_ocp(hw, addr);
+ val &= ~clearmask;
+ val |= setmask;
+ rtl_mdio_direct_write_phy_ocp(hw, addr, val);
}
void
@@ -208,18 +184,10 @@ rtl8168_check_ephy_addr(struct rtl_hw *hw, int addr)
return addr;
}
-void
-rtl_ephy_write(struct rtl_hw *hw, int addr, int value)
+static void
+_rtl_ephy_write(struct rtl_hw *hw, int addr, int value, unsigned int mask)
{
int i;
- unsigned int mask;
-
- if (rtl_is_8125(hw)) {
- mask = EPHYAR_Reg_Mask_v2;
- } else {
- mask = EPHYAR_Reg_Mask;
- addr = rtl8168_check_ephy_addr(hw, addr);
- }
RTL_W32(hw, EPHYAR, EPHYAR_Write | (addr & mask) << EPHYAR_Reg_shift |
(value & EPHYAR_Data_Mask));
@@ -235,20 +203,48 @@ rtl_ephy_write(struct rtl_hw *hw, int addr, int value)
rte_delay_us(RTL_CHANNEL_EXIT_DELAY_TIME);
}
-u16
-rtl_ephy_read(struct rtl_hw *hw, int addr)
+static void
+rtl8127_set_ephy_ext_addr(struct rtl_hw *hw, int addr)
+{
+ _rtl_ephy_write(hw, EPHYAR_EXT_ADDR, addr, EPHYAR_Reg_Mask_v2);
+}
+
+static int
+rtl8127_check_ephy_ext_addr(struct rtl_hw *hw, int addr)
+{
+ int data;
+
+ data = ((u16)addr >> 12);
+
+ rtl8127_set_ephy_ext_addr(hw, data);
+
+ return (addr & 0xfff);
+}
+
+void
+rtl_ephy_write(struct rtl_hw *hw, int addr, int value)
{
- int i;
- u16 value = 0xffff;
unsigned int mask;
- if (rtl_is_8125(hw)) {
- mask = EPHYAR_Reg_Mask_v2;
- } else {
+ if (!rtl_is_8125(hw)) {
mask = EPHYAR_Reg_Mask;
addr = rtl8168_check_ephy_addr(hw, addr);
+ } else if (hw->mcfg >= CFG_METHOD_91) {
+ mask = EPHYAR_Reg_Mask_v2;
+ addr = rtl8127_check_ephy_ext_addr(hw, addr);
+ } else {
+ mask = EPHYAR_Reg_Mask_v2;
}
+ _rtl_ephy_write(hw, addr, value, mask);
+}
+
+static u16
+_rtl_ephy_read(struct rtl_hw *hw, int addr, unsigned int mask)
+{
+ int i;
+ u16 value = 0xffff;
+
RTL_W32(hw, EPHYAR, EPHYAR_Read | (addr & mask) << EPHYAR_Reg_shift);
for (i = 0; i < RTL_CHANNEL_WAIT_COUNT; i++) {
@@ -266,6 +262,24 @@ rtl_ephy_read(struct rtl_hw *hw, int addr)
return value;
}
+u16
+rtl_ephy_read(struct rtl_hw *hw, int addr)
+{
+ unsigned int mask;
+
+ if (!rtl_is_8125(hw)) {
+ mask = EPHYAR_Reg_Mask;
+ addr = rtl8168_check_ephy_addr(hw, addr);
+ } else if (hw->mcfg >= CFG_METHOD_91) {
+ mask = EPHYAR_Reg_Mask_v2;
+ addr = rtl8127_check_ephy_ext_addr(hw, addr);
+ } else {
+ mask = EPHYAR_Reg_Mask_v2;
+ }
+
+ return _rtl_ephy_read(hw, addr, mask);
+}
+
void
rtl_clear_and_set_pcie_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
u16 setmask)
@@ -297,66 +311,36 @@ rtl_set_phy_mcu_patch_request(struct rtl_hw *hw)
u16 wait_cnt;
bool bool_success = TRUE;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- rtl_mdio_write(hw, 0x1f, 0x0B82);
- rtl_set_eth_phy_bit(hw, 0x10, BIT_4);
+ if (rtl_is_8125(hw)) {
+ rtl_set_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
- rtl_mdio_write(hw, 0x1f, 0x0B80);
wait_cnt = 0;
do {
- gphy_val = rtl_mdio_read(hw, 0x10);
+ gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
rte_delay_us(100);
wait_cnt++;
- } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
+ } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
if (!(gphy_val & BIT_6) && wait_cnt == 1000)
bool_success = FALSE;
+ } else {
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ rtl_set_eth_phy_bit(hw, 0x10, BIT_4);
- rtl_mdio_write(hw, 0x1f, 0x0000);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_set_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
-
+ rtl_mdio_write(hw, 0x1f, 0x0B80);
wait_cnt = 0;
do {
- gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
+ gphy_val = rtl_mdio_read(hw, 0x10);
rte_delay_us(100);
wait_cnt++;
- } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
+ } while (!(gphy_val & BIT_6) && (wait_cnt < 1000));
if (!(gphy_val & BIT_6) && wait_cnt == 1000)
bool_success = FALSE;
- break;
+
+ rtl_mdio_write(hw, 0x1f, 0x0000);
}
+
if (!bool_success)
PMD_INIT_LOG(NOTICE, "%s fail.", __func__);
@@ -370,65 +354,34 @@ rtl_clear_phy_mcu_patch_request(struct rtl_hw *hw)
u16 wait_cnt;
bool bool_success = TRUE;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- rtl_mdio_write(hw, 0x1f, 0x0B82);
- rtl_clear_eth_phy_bit(hw, 0x10, BIT_4);
+ if (rtl_is_8125(hw)) {
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
- rtl_mdio_write(hw, 0x1f, 0x0B80);
wait_cnt = 0;
do {
- gphy_val = rtl_mdio_read(hw, 0x10);
+ gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
rte_delay_us(100);
wait_cnt++;
} while ((gphy_val & BIT_6) && (wait_cnt < 1000));
if ((gphy_val & BIT_6) && wait_cnt == 1000)
bool_success = FALSE;
+ } else {
+ rtl_mdio_write(hw, 0x1f, 0x0B82);
+ rtl_clear_eth_phy_bit(hw, 0x10, BIT_4);
- rtl_mdio_write(hw, 0x1f, 0x0000);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_clear_eth_phy_ocp_bit(hw, 0xB820, BIT_4);
-
+ rtl_mdio_write(hw, 0x1f, 0x0B80);
wait_cnt = 0;
do {
- gphy_val = rtl_mdio_direct_read_phy_ocp(hw, 0xB800);
+ gphy_val = rtl_mdio_read(hw, 0x10);
rte_delay_us(100);
wait_cnt++;
} while ((gphy_val & BIT_6) && (wait_cnt < 1000));
if ((gphy_val & BIT_6) && wait_cnt == 1000)
bool_success = FALSE;
- break;
+
+ rtl_mdio_write(hw, 0x1f, 0x0000);
}
if (!bool_success)
@@ -545,6 +498,7 @@ rtl_wait_phy_ups_resume(struct rtl_hw *hw, u16 PhyState)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
do {
tmp_phy_state = rtl_mdio_direct_read_phy_ocp(hw, 0xA420);
tmp_phy_state &= 0x7;
@@ -597,6 +551,7 @@ rtl_phy_power_up(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_wait_phy_ups_resume(hw, 3);
break;
}
@@ -634,6 +589,7 @@ rtl_powerup_pll(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) | BIT_7 | BIT_6);
break;
}
@@ -699,6 +655,7 @@ rtl_phy_power_down(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_mdio_write(hw, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
break;
default:
@@ -745,6 +702,7 @@ rtl_powerdown_pll(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) & ~BIT_7);
break;
}
@@ -783,6 +741,7 @@ rtl_powerdown_pll(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
RTL_W8(hw, 0xF2, RTL_R8(hw, 0xF2) & ~BIT_6);
break;
}
@@ -813,31 +772,39 @@ rtl_wait_phy_reset_complete(struct rtl_hw *hw)
static void
rtl_xmii_reset_enable(struct rtl_hw *hw)
{
+ u32 val;
+
if (rtl_is_in_phy_disable_mode(hw))
return;
rtl_mdio_write(hw, 0x1F, 0x0000);
- rtl_mdio_write(hw, MII_ADVERTISE, rtl_mdio_read(hw, MII_ADVERTISE) &
- ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
- ADVERTISE_100HALF | ADVERTISE_100FULL));
- rtl_mdio_write(hw, MII_CTRL1000, rtl_mdio_read(hw, MII_CTRL1000) &
- ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
- if (rtl_is_8125(hw))
- rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4,
- rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4) &
- ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL));
+ val = rtl_mdio_read(hw, MII_ADVERTISE);
+ val &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | ADVERTISE_100HALF |
+ ADVERTISE_100FULL);
+ rtl_mdio_write(hw, MII_ADVERTISE, val);
+
+ val = rtl_mdio_read(hw, MII_CTRL1000);
+ val &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
+ rtl_mdio_write(hw, MII_CTRL1000, val);
+
+ if (rtl_is_8125(hw)) {
+ val = rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4);
+ val &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL |
+ RTK_ADVERTISE_10000FULL);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA5D4, val);
+ }
rtl_mdio_write(hw, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
- if (rtl_wait_phy_reset_complete(hw) == 0)
- return;
+ if (rtl_wait_phy_reset_complete(hw))
+ PMD_INIT_LOG(NOTICE, "PHY reset failed.");
}
static void
rtl8125_set_hw_phy_before_init_phy_mcu(struct rtl_hw *hw)
{
- u16 phy_reg_value;
+ u16 val;
switch (hw->mcfg) {
case CFG_METHOD_50:
@@ -846,11 +813,11 @@ rtl8125_set_hw_phy_before_init_phy_mcu(struct rtl_hw *hw)
rtl_set_eth_phy_ocp_bit(hw, 0xC402, BIT_10);
rtl_clear_eth_phy_ocp_bit(hw, 0xC402, BIT_10);
- phy_reg_value = rtl_mdio_direct_read_phy_ocp(hw, 0xBF86);
- phy_reg_value &= (BIT_1 | BIT_0);
- if (phy_reg_value != 0)
+ val = rtl_mdio_direct_read_phy_ocp(hw, 0xBF86);
+ val &= (BIT_1 | BIT_0);
+ if (val != 0)
PMD_INIT_LOG(NOTICE, "PHY watch dog not clear, value = 0x%x",
- phy_reg_value);
+ val);
rtl_mdio_direct_write_phy_ocp(hw, 0xBD86, 0x1010);
rtl_mdio_direct_write_phy_ocp(hw, 0xBD88, 0x1010);
@@ -867,45 +834,14 @@ rtl_get_hw_phy_mcu_code_ver(struct rtl_hw *hw)
{
u16 hw_ram_code_ver = ~0;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
+ if (rtl_is_8125(hw)) {
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
+ hw_ram_code_ver = rtl_mdio_direct_read_phy_ocp(hw, 0xA438);
+ } else {
rtl_mdio_write(hw, 0x1F, 0x0A43);
rtl_mdio_write(hw, 0x13, 0x801E);
hw_ram_code_ver = rtl_mdio_read(hw, 0x14);
rtl_mdio_write(hw, 0x1F, 0x0000);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
- hw_ram_code_ver = rtl_mdio_direct_read_phy_ocp(hw, 0xA438);
- break;
}
return hw_ram_code_ver;
@@ -931,47 +867,16 @@ rtl_check_hw_phy_mcu_code_ver(struct rtl_hw *hw)
static void
rtl_write_hw_phy_mcu_code_ver(struct rtl_hw *hw)
{
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
+ if (rtl_is_8125(hw)) {
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA438, hw->sw_ram_code_ver);
+ hw->hw_ram_code_ver = hw->sw_ram_code_ver;
+ } else {
rtl_mdio_write(hw, 0x1F, 0x0A43);
rtl_mdio_write(hw, 0x13, 0x801E);
rtl_mdio_write(hw, 0x14, hw->sw_ram_code_ver);
rtl_mdio_write(hw, 0x1F, 0x0000);
hw->hw_ram_code_ver = hw->sw_ram_code_ver;
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x801E);
- rtl_mdio_direct_write_phy_ocp(hw, 0xA438, hw->sw_ram_code_ver);
- hw->hw_ram_code_ver = hw->sw_ram_code_ver;
- break;
}
}
@@ -1010,25 +915,25 @@ rtl_disable_phy_disable_mode(struct rtl_hw *hw)
static int
rtl8168_phy_ram_code_check(struct rtl_hw *hw)
{
- u16 phy_reg_value;
+ u16 val;
int retval = TRUE;
if (hw->mcfg == CFG_METHOD_21) {
rtl_mdio_write(hw, 0x1f, 0x0A40);
- phy_reg_value = rtl_mdio_read(hw, 0x10);
- phy_reg_value &= ~BIT_11;
- rtl_mdio_write(hw, 0x10, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x10);
+ val &= ~BIT_11;
+ rtl_mdio_write(hw, 0x10, val);
rtl_mdio_write(hw, 0x1f, 0x0A00);
- phy_reg_value = rtl_mdio_read(hw, 0x10);
- phy_reg_value &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15);
- rtl_mdio_write(hw, 0x10, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x10);
+ val &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15);
+ rtl_mdio_write(hw, 0x10, val);
rtl_mdio_write(hw, 0x1f, 0x0A43);
rtl_mdio_write(hw, 0x13, 0x8010);
- phy_reg_value = rtl_mdio_read(hw, 0x14);
- phy_reg_value &= ~BIT_11;
- rtl_mdio_write(hw, 0x14, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x14);
+ val &= ~BIT_11;
+ rtl_mdio_write(hw, 0x14, val);
retval = rtl_set_phy_mcu_patch_request(hw);
@@ -1036,20 +941,20 @@ rtl8168_phy_ram_code_check(struct rtl_hw *hw)
rtl_mdio_write(hw, 0x10, 0x0140);
rtl_mdio_write(hw, 0x1f, 0x0A4A);
- phy_reg_value = rtl_mdio_read(hw, 0x13);
- phy_reg_value &= ~BIT_6;
- phy_reg_value |= BIT_7;
- rtl_mdio_write(hw, 0x13, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x13);
+ val &= ~BIT_6;
+ val |= BIT_7;
+ rtl_mdio_write(hw, 0x13, val);
rtl_mdio_write(hw, 0x1f, 0x0A44);
- phy_reg_value = rtl_mdio_read(hw, 0x14);
- phy_reg_value |= BIT_2;
- rtl_mdio_write(hw, 0x14, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x14);
+ val |= BIT_2;
+ rtl_mdio_write(hw, 0x14, val);
rtl_mdio_write(hw, 0x1f, 0x0A50);
- phy_reg_value = rtl_mdio_read(hw, 0x11);
- phy_reg_value |= (BIT_11 | BIT_12);
- rtl_mdio_write(hw, 0x11, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x11);
+ val |= (BIT_11 | BIT_12);
+ rtl_mdio_write(hw, 0x11, val);
retval = rtl_clear_phy_mcu_patch_request(hw);
@@ -1057,32 +962,32 @@ rtl8168_phy_ram_code_check(struct rtl_hw *hw)
rtl_mdio_write(hw, 0x10, 0x1040);
rtl_mdio_write(hw, 0x1f, 0x0A4A);
- phy_reg_value = rtl_mdio_read(hw, 0x13);
- phy_reg_value &= ~(BIT_6 | BIT_7);
- rtl_mdio_write(hw, 0x13, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x13);
+ val &= ~(BIT_6 | BIT_7);
+ rtl_mdio_write(hw, 0x13, val);
rtl_mdio_write(hw, 0x1f, 0x0A44);
- phy_reg_value = rtl_mdio_read(hw, 0x14);
- phy_reg_value &= ~BIT_2;
- rtl_mdio_write(hw, 0x14, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x14);
+ val &= ~BIT_2;
+ rtl_mdio_write(hw, 0x14, val);
rtl_mdio_write(hw, 0x1f, 0x0A50);
- phy_reg_value = rtl_mdio_read(hw, 0x11);
- phy_reg_value &= ~(BIT_11 | BIT_12);
- rtl_mdio_write(hw, 0x11, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x11);
+ val &= ~(BIT_11 | BIT_12);
+ rtl_mdio_write(hw, 0x11, val);
rtl_mdio_write(hw, 0x1f, 0x0A43);
rtl_mdio_write(hw, 0x13, 0x8010);
- phy_reg_value = rtl_mdio_read(hw, 0x14);
- phy_reg_value |= BIT_11;
- rtl_mdio_write(hw, 0x14, phy_reg_value);
+ val = rtl_mdio_read(hw, 0x14);
+ val |= BIT_11;
+ rtl_mdio_write(hw, 0x14, val);
retval = rtl_set_phy_mcu_patch_request(hw);
rtl_mdio_write(hw, 0x1f, 0x0A20);
- phy_reg_value = rtl_mdio_read(hw, 0x13);
- if (phy_reg_value & BIT_11) {
- if (phy_reg_value & BIT_10)
+ val = rtl_mdio_read(hw, 0x13);
+ if (val & BIT_11) {
+ if (val & BIT_10)
retval = FALSE;
}
@@ -1149,41 +1054,7 @@ rtl_disable_aldps(struct rtl_hw *hw)
u32 timeout = 0;
u32 wait_cnt = 200;
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
- tmp_ushort = rtl_mdio_real_direct_read_phy_ocp(hw, 0xA430);
- if (tmp_ushort & BIT_2)
- rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw)) {
tmp_ushort = rtl_mdio_real_direct_read_phy_ocp(hw, 0xA430);
if (tmp_ushort & BIT_2) {
rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
@@ -1194,7 +1065,10 @@ rtl_disable_aldps(struct rtl_hw *hw)
timeout++;
} while (!(tmp_ushort & BIT_7) && timeout < wait_cnt);
}
- break;
+ } else {
+ tmp_ushort = rtl_mdio_real_direct_read_phy_ocp(hw, 0xA430);
+ if (tmp_ushort & BIT_2)
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_2);
}
}
@@ -1232,6 +1106,7 @@ rtl_is_adv_eee_enabled(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
if (rtl_mdio_direct_read_phy_ocp(hw, 0xA430) & BIT_15)
enabled = true;
break;
@@ -1315,6 +1190,7 @@ _rtl_disable_adv_eee(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_clear_mac_ocp_bit(hw, 0xE052, BIT_0);
rtl_clear_eth_phy_ocp_bit(hw, 0xA442, (BIT_12 | BIT_13));
rtl_clear_eth_phy_ocp_bit(hw, 0xA430, BIT_15);
@@ -1372,6 +1248,7 @@ static void
rtl_disable_eee(struct rtl_hw *hw)
{
u16 data;
+ u16 mask;
u32 csi_tmp;
switch (hw->mcfg) {
@@ -1438,12 +1315,16 @@ rtl_disable_eee(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
rtl_clear_mac_ocp_bit(hw, 0xE040, (BIT_1 | BIT_0));
- rtl_clear_eth_phy_ocp_bit(hw, 0xA5D0, (MDIO_EEE_100TX | MDIO_EEE_1000T));
- rtl_clear_eth_phy_ocp_bit(hw, 0xA6D4, MDIO_EEE_2_5GT);
- if (HW_SUPP_PHY_LINK_SPEED_5000M(hw))
- rtl_clear_eth_phy_ocp_bit(hw, 0xA6D4, MDIO_EEE_5GT);
+ if (HW_SUPP_PHY_LINK_SPEED_10000M(hw))
+ mask = MDIO_EEE_100TX | MDIO_EEE_1000T | MDIO_EEE_10GT;
+ else
+ mask = MDIO_EEE_100TX | MDIO_EEE_1000T;
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5D0, mask);
+
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA6D4, MDIO_EEE_2_5GT | MDIO_EEE_5GT);
rtl_clear_eth_phy_ocp_bit(hw, 0xA6D8, BIT_4);
rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_7);
@@ -1488,23 +1369,8 @@ rtl_hw_phy_config(struct rtl_hw *hw)
rtl_disable_aldps(hw);
/* Legacy force mode (chap 22) */
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ if (rtl_is_8125(hw))
rtl_clear_eth_phy_ocp_bit(hw, 0xA5B4, BIT_15);
- break;
- }
rtl_mdio_write(hw, 0x1F, 0x0000);
@@ -1550,8 +1416,9 @@ rtl_phy_setup_force_mode(struct rtl_hw *hw, u32 speed, u8 duplex)
}
static int
-rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
+rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u64 adv)
{
+ u16 mask = 0;
int auto_nego = 0;
int giga_ctrl = 0;
int ctrl_2500 = 0;
@@ -1577,6 +1444,14 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
rtl_mdio_write(hw, 0x1F, 0x0A40);
rtl_mdio_write(hw, 0x1F, 0x0000);
break;
+ case CFG_METHOD_91:
+ mask |= BIT_2;
+ /* Fall through */
+ case CFG_METHOD_69:
+ case CFG_METHOD_70:
+ case CFG_METHOD_71:
+ mask |= BIT_1;
+ /* Fall through */
case CFG_METHOD_48:
case CFG_METHOD_49:
case CFG_METHOD_50:
@@ -1587,14 +1462,9 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
+ mask |= BIT_0;
rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_9);
- rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_0);
-
- if (HW_SUPP_PHY_LINK_SPEED_5000M(hw))
- rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, BIT_1);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, mask);
break;
}
@@ -1608,7 +1478,8 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
if (rtl_is_8125(hw)) {
ctrl_2500 = rtl_mdio_direct_read_phy_ocp(hw, 0xA5D4);
- ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL);
+ ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL |
+ RTK_ADVERTISE_10000FULL);
}
if (autoneg == AUTONEG_ENABLE) {
@@ -1634,6 +1505,8 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u32 adv)
ctrl_2500 |= RTK_ADVERTISE_2500FULL;
if (adv & ADVERTISE_5000_FULL)
ctrl_2500 |= RTK_ADVERTISE_5000FULL;
+ if (adv & ADVERTISE_10000_FULL)
+ ctrl_2500 |= RTK_ADVERTISE_10000FULL;
/* Flow control */
if (hw->fcpause == rtl_fc_full)
@@ -1678,12 +1551,12 @@ void
rtl_clear_and_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
u16 setmask)
{
- u16 phy_reg_value;
+ u16 val;
- phy_reg_value = rtl_mdio_read(hw, addr);
- phy_reg_value &= ~clearmask;
- phy_reg_value |= setmask;
- rtl_mdio_write(hw, addr, phy_reg_value);
+ val = rtl_mdio_read(hw, addr);
+ val &= ~clearmask;
+ val |= setmask;
+ rtl_mdio_write(hw, addr, val);
}
void
@@ -1697,3 +1570,9 @@ rtl_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask)
{
rtl_clear_and_set_eth_phy_bit(hw, addr, 0, mask);
}
+
+void
+rtl8127_clear_ephy_ext_addr(struct rtl_hw *hw)
+{
+ rtl8127_set_ephy_ext_addr(hw, 0x0000);
+}
diff --git a/drivers/net/r8169/r8169_phy.h b/drivers/net/r8169/r8169_phy.h
index ea1facba5b..0a91515883 100644
--- a/drivers/net/r8169/r8169_phy.h
+++ b/drivers/net/r8169/r8169_phy.h
@@ -102,18 +102,17 @@
#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0)
+#define HW_SUPP_PHY_LINK_SPEED_10000M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 10000)
#define HW_SUPP_PHY_LINK_SPEED_5000M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 5000)
#define MDIO_EEE_100TX 0x0002
#define MDIO_EEE_1000T 0x0004
#define MDIO_EEE_2_5GT 0x0001
#define MDIO_EEE_5GT 0x0002
+#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */
#define HW_SUPP_SERDES_PHY(_M) ((_M)->HwSuppSerDesPhyVer > 0)
-void rtl_clear_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
-void rtl_set_mac_ocp_bit(struct rtl_hw *hw, u16 addr, u16 mask);
-
u32 rtl_mdio_direct_read_phy_ocp(struct rtl_hw *hw, u32 RegAddr);
void rtl_mdio_direct_write_phy_ocp(struct rtl_hw *hw, u32 RegAddr, u32 value);
@@ -155,4 +154,6 @@ void rtl_clear_and_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 clearmask,
void rtl_clear_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask);
void rtl_set_eth_phy_bit(struct rtl_hw *hw, u8 addr, u16 mask);
+void rtl8127_clear_ephy_ext_addr(struct rtl_hw *hw);
+
#endif /* R8169_PHY_H */
diff --git a/drivers/net/r8169/r8169_rxtx.c b/drivers/net/r8169/r8169_rxtx.c
index eee91a639e..7bb2ab9cee 100644
--- a/drivers/net/r8169/r8169_rxtx.c
+++ b/drivers/net/r8169/r8169_rxtx.c
@@ -501,24 +501,7 @@ rtl_rx_init(struct rte_eth_dev *dev)
rtl_enable_cfg9346_write(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
+ if (!rtl_is_8125(hw)) {
/* RX ftr mcu enable */
csi_tmp = rtl_eri_read(hw, 0xDC, 1, ERIAR_ExGMAC);
csi_tmp &= ~BIT_0;
@@ -529,7 +512,6 @@ rtl_rx_init(struct rte_eth_dev *dev)
/* RSS disable */
rtl_eri_write(hw, 0xC0, 2, 0x0000, ERIAR_ExGMAC); /* queue num = 1 */
rtl_eri_write(hw, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
- break;
}
/* RX accept type and csum vlan offload */
@@ -1090,6 +1072,9 @@ rtl8125_set_tx_tag_num(struct rtl_hw *hw)
else
mac_ocp_data |= (3 << 8);
break;
+ case CFG_METHOD_91:
+ mac_ocp_data |= (15 << 8);
+ break;
default:
mac_ocp_data |= (3 << 8);
break;
@@ -1122,47 +1107,14 @@ rtl_tx_init(struct rte_eth_dev *dev)
rtl_enable_cfg9346_write(hw);
- if (rtl_is_8125(hw))
+ if (rtl_is_8125(hw)) {
rtl8125_set_tx_tag_num(hw);
- else
+
+ RTL_W8(hw, TDFNR, 0x10);
+ } else {
rtl8168_set_mtps(hw);
- /* Set TDFNR: TX Desc Fetch NumbeR */
- switch (hw->mcfg) {
- case CFG_METHOD_21:
- case CFG_METHOD_22:
- case CFG_METHOD_23:
- case CFG_METHOD_24:
- case CFG_METHOD_25:
- case CFG_METHOD_26:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_37:
RTL_W8(hw, TDFNR, 0x4);
- break;
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- RTL_W8(hw, TDFNR, 0x10);
- break;
}
rtl_disable_cfg9346_write(hw);
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/8] net/r8169: remove cmac feature for RTL8125AP
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
2025-06-10 6:01 ` [PATCH 2/8] net/r8169: update HW configurations for 8125 and 8126 Howard Wang
2025-06-10 6:01 ` [PATCH 3/8] net/r8169: add support for RTL8127 Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 5/8] net/r8169: add RTL8127AP dash support Howard Wang
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/r8169_dash.c | 23 +++++++++++------------
drivers/net/r8169/r8169_dash.h | 1 +
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c
index c26d7a5280..1fdbe5c4ae 100644
--- a/drivers/net/r8169/r8169_dash.c
+++ b/drivers/net/r8169/r8169_dash.c
@@ -63,18 +63,23 @@ _rtl_check_dash(struct rtl_hw *hw)
if (!hw->AllowAccessDashOcp)
return 0;
- if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_3(hw) ||
- HW_DASH_SUPPORT_TYPE_4(hw)) {
+ switch (hw->HwSuppDashVer) {
+ case 2:
+ if (rtl_is_8125(hw))
+ return 0;
+ /* Fall through */
+ case 3:
+ case 4:
if (rtl_ocp_read(hw, 0x128, 1) & BIT_0)
return 1;
else
return 0;
- } else if (HW_DASH_SUPPORT_TYPE_1(hw)) {
+ case 1:
if (rtl_ocp_read(hw, 0x10, 2) & 0x00008000)
return 1;
else
return 0;
- } else {
+ default:
return 0;
}
}
@@ -193,7 +198,7 @@ rtl8168_csi_to_cmac_w8(struct rtl_hw *hw, u32 reg, u8 value)
static void
rtl_cmac_w8(struct rtl_hw *hw, u32 reg, u8 value)
{
- if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_4(hw))
+ if (HW_DASH_SUPPORT_TYPE_2(hw))
RTL_CMAC_W8(hw, reg, value);
else if (HW_DASH_SUPPORT_TYPE_3(hw))
rtl8168_csi_to_cmac_w8(hw, reg, value);
@@ -202,7 +207,7 @@ rtl_cmac_w8(struct rtl_hw *hw, u32 reg, u8 value)
static u8
rtl_cmac_r8(struct rtl_hw *hw, u32 reg)
{
- if (HW_DASH_SUPPORT_TYPE_2(hw) || HW_DASH_SUPPORT_TYPE_4(hw))
+ if (HW_DASH_SUPPORT_TYPE_2(hw))
return RTL_CMAC_R8(hw, reg);
else if (HW_DASH_SUPPORT_TYPE_3(hw))
return rtl8168_csi_to_cmac_r8(hw, reg);
@@ -270,9 +275,6 @@ rtl8125_notify_dash_oob_cmac(struct rtl_hw *hw, u32 cmd)
static void
rtl8125_notify_dash_oob_ipc2(struct rtl_hw *hw, u32 cmd)
{
- if (!HW_DASH_SUPPORT_TYPE_4(hw))
- return;
-
rtl_ocp_write(hw, IB2SOC_DATA, 4, cmd);
rtl_ocp_write(hw, IB2SOC_CMD, 4, 0x00);
rtl_ocp_write(hw, IB2SOC_SET, 4, 0x01);
@@ -554,9 +556,6 @@ rtl8125_driver_stop(struct rtl_hw *hw)
if (!hw->AllowAccessDashOcp)
return;
- if (HW_DASH_SUPPORT_CMAC(hw))
- rtl_dash2_disable_txrx(hw);
-
rtl8125_notify_dash_oob(hw, OOB_CMD_DRIVER_STOP);
rtl_wait_dash_fw_ready(hw);
diff --git a/drivers/net/r8169/r8169_dash.h b/drivers/net/r8169/r8169_dash.h
index 47c5d6906e..7c31658573 100644
--- a/drivers/net/r8169/r8169_dash.h
+++ b/drivers/net/r8169/r8169_dash.h
@@ -20,6 +20,7 @@
#define HW_DASH_SUPPORT_TYPE_3(_M) ((_M)->HwSuppDashVer == 3)
#define HW_DASH_SUPPORT_TYPE_4(_M) ((_M)->HwSuppDashVer == 4)
#define HW_DASH_SUPPORT_CMAC(_M) (HW_DASH_SUPPORT_TYPE_2(_M) || HW_DASH_SUPPORT_TYPE_3(_M))
+#define HW_DASH_SUPPORT_IPC2(_M) (HW_DASH_SUPPORT_TYPE_4(_M))
#define HW_DASH_SUPPORT_GET_FIRMWARE_VERSION(_M) (HW_DASH_SUPPORT_TYPE_2(_M) || \
HW_DASH_SUPPORT_TYPE_3(_M) || \
HW_DASH_SUPPORT_TYPE_4(_M))
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 5/8] net/r8169: add RTL8127AP dash support
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
` (2 preceding siblings ...)
2025-06-10 6:01 ` [PATCH 4/8] net/r8169: remove cmac feature for RTL8125AP Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 6/8] net/r8169: add support for RTL8125CP Howard Wang
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/r8169_dash.c | 1 +
drivers/net/r8169/r8169_hw.c | 32 ++++++++++----------------------
drivers/net/r8169/r8169_phy.c | 34 ++--------------------------------
3 files changed, 13 insertions(+), 54 deletions(-)
diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c
index 1fdbe5c4ae..384344373f 100644
--- a/drivers/net/r8169/r8169_dash.c
+++ b/drivers/net/r8169/r8169_dash.c
@@ -32,6 +32,7 @@ rtl_is_allow_access_dash_ocp(struct rtl_hw *hw)
break;
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_91:
mac_ocp_data = rtl_mac_ocp_read(hw, 0xd4c0);
if (mac_ocp_data == 0xffff || (mac_ocp_data & BIT_3))
allow_access = false;
diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c
index 002dc25ef7..e5a45f6810 100644
--- a/drivers/net/r8169/r8169_hw.c
+++ b/drivers/net/r8169/r8169_hw.c
@@ -334,6 +334,7 @@ rtl_oob_mutex_lock(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_91:
ocp_reg_mutex_oob = 0x110;
ocp_reg_mutex_ib = 0x114;
ocp_reg_mutex_prio = 0x11C;
@@ -392,6 +393,7 @@ rtl_oob_mutex_unlock(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_91:
ocp_reg_mutex_ib = 0x114;
ocp_reg_mutex_prio = 0x11C;
break;
@@ -1057,15 +1059,7 @@ rtl8125_hw_config(struct rtl_hw *hw)
mac_ocp_data |= BIT_0;
rtl_mac_ocp_write(hw, 0xEA1C, mac_ocp_data);
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_lock(hw);
- break;
- }
+ rtl_oob_mutex_lock(hw);
/* MAC_PWRDWN_CR0 */
rtl_mac_ocp_write(hw, 0xE0C0, 0x4000);
@@ -1073,15 +1067,7 @@ rtl8125_hw_config(struct rtl_hw *hw)
rtl_set_mac_ocp_bit(hw, 0xE052, (BIT_6 | BIT_5));
rtl_clear_mac_ocp_bit(hw, 0xE052, (BIT_3 | BIT_7));
- switch (hw->mcfg) {
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_unlock(hw);
- break;
- }
+ rtl_oob_mutex_unlock(hw);
/*
* DMY_PWR_REG_0
@@ -1574,9 +1560,12 @@ rtl_init_software_variable(struct rtl_hw *hw)
break;
case CFG_METHOD_48:
case CFG_METHOD_49:
+ case CFG_METHOD_91:
tmp = (u8)rtl_mac_ocp_read(hw, 0xD006);
if (tmp == 0x02 || tmp == 0x04)
hw->HwSuppDashVer = 2;
+ else if (tmp == 0x03)
+ hw->HwSuppDashVer = 4;
break;
case CFG_METHOD_54:
case CFG_METHOD_55:
@@ -1615,6 +1604,8 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_23:
case CFG_METHOD_27:
case CFG_METHOD_28:
+ case CFG_METHOD_54:
+ case CFG_METHOD_55:
hw->HwSuppOcpChannelVer = 2;
break;
case CFG_METHOD_31:
@@ -1625,13 +1616,10 @@ rtl_init_software_variable(struct rtl_hw *hw)
break;
case CFG_METHOD_48:
case CFG_METHOD_49:
+ case CFG_METHOD_91:
if (HW_DASH_SUPPORT_DASH(hw))
hw->HwSuppOcpChannelVer = 2;
break;
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- hw->HwSuppOcpChannelVer = 2;
- break;
default:
hw->HwSuppOcpChannelVer = 0;
break;
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index 44ffd49a56..677bca7800 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -1207,41 +1207,11 @@ rtl_disable_adv_eee(struct rtl_hw *hw)
if (hw->mcfg < CFG_METHOD_25 || hw->mcfg == CFG_METHOD_37)
return;
- switch (hw->mcfg) {
- case CFG_METHOD_23:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_lock(hw);
- break;
- }
+ rtl_oob_mutex_lock(hw);
_rtl_disable_adv_eee(hw);
- switch (hw->mcfg) {
- case CFG_METHOD_23:
- case CFG_METHOD_27:
- case CFG_METHOD_28:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_52:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- rtl_oob_mutex_unlock(hw);
- break;
- }
+ rtl_oob_mutex_unlock(hw);
}
static void
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 6/8] net/r8169: add support for RTL8125CP
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
` (3 preceding siblings ...)
2025-06-10 6:01 ` [PATCH 5/8] net/r8169: add RTL8127AP dash support Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 7/8] net/r8169: add support for RTL8127ATF serdes interface Howard Wang
2025-06-10 6:01 ` [PATCH 8/8] net/r8169: update HW configuration for 8127 Howard Wang
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/base/rtl8125cp.c | 73 ++++++++++++++++++++++++
drivers/net/r8169/base/rtl8125cp_mcu.c | 78 ++++++++++++++++++++++++++
drivers/net/r8169/base/rtl8125cp_mcu.h | 10 ++++
drivers/net/r8169/meson.build | 2 +
drivers/net/r8169/r8169_compat.h | 1 +
drivers/net/r8169/r8169_ethdev.c | 2 +
drivers/net/r8169/r8169_hw.c | 43 ++++++++++++--
drivers/net/r8169/r8169_hw.h | 2 +
drivers/net/r8169/r8169_phy.c | 38 ++++---------
9 files changed, 217 insertions(+), 32 deletions(-)
create mode 100644 drivers/net/r8169/base/rtl8125cp.c
create mode 100644 drivers/net/r8169/base/rtl8125cp_mcu.c
create mode 100644 drivers/net/r8169/base/rtl8125cp_mcu.h
diff --git a/drivers/net/r8169/base/rtl8125cp.c b/drivers/net/r8169/base/rtl8125cp.c
new file mode 100644
index 0000000000..aabee94f4c
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8125cp.c
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_ethdev.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8125cp_mcu.h"
+
+/* For RTL8125CP, CFG_METHOD_58 */
+
+static void
+hw_init_rxcfg_8125cp(struct rtl_hw *hw)
+{
+ RTL_W32(hw, RxConfig, Rx_Fetch_Number_8 | Rx_Close_Multiple |
+ RxCfg_pause_slot_en | (RX_DMA_BURST_256 << RxCfgDMAShift));
+}
+
+static void
+hw_ephy_config_8125cp(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_58:
+ /* nothing to do */
+ break;
+ }
+}
+
+static void
+rtl_hw_phy_config_8125cp_1(struct rtl_hw *hw)
+{
+ rtl_set_eth_phy_ocp_bit(hw, 0xA442, BIT_11);
+
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xad0e, 0x007F, 0x000B);
+ rtl_set_eth_phy_ocp_bit(hw, 0xad78, BIT_4);
+}
+
+static void
+hw_phy_config_8125cp(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_58:
+ rtl_hw_phy_config_8125cp_1(hw);
+ break;
+ }
+}
+
+static void
+hw_mac_mcu_config_8125cp(struct rtl_hw *hw)
+{
+ if (hw->NotWrMcuPatchCode)
+ return;
+
+ rtl_hw_disable_mac_mcu_bps(hw);
+}
+
+static void
+hw_phy_mcu_config_8125cp(struct rtl_hw *hw)
+{
+ switch (hw->mcfg) {
+ case CFG_METHOD_58:
+ rtl_set_phy_mcu_8125cp_1(hw);
+ break;
+ }
+}
+
+const struct rtl_hw_ops rtl8125cp_ops = {
+ .hw_init_rxcfg = hw_init_rxcfg_8125cp,
+ .hw_ephy_config = hw_ephy_config_8125cp,
+ .hw_phy_config = hw_phy_config_8125cp,
+ .hw_mac_mcu_config = hw_mac_mcu_config_8125cp,
+ .hw_phy_mcu_config = hw_phy_mcu_config_8125cp,
+};
diff --git a/drivers/net/r8169/base/rtl8125cp_mcu.c b/drivers/net/r8169/base/rtl8125cp_mcu.c
new file mode 100644
index 0000000000..e4609f46de
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8125cp_mcu.c
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include "../r8169_ethdev.h"
+#include "../r8169_hw.h"
+#include "../r8169_phy.h"
+#include "rtl8125cp_mcu.h"
+
+/* For RTL8125CP, CFG_METHOD_58 */
+
+/* ------------------------------------MAC 8125CP------------------------------------- */
+
+/* No mac mcu patch code */
+
+/* ------------------------------------PHY 8125CP------------------------------------- */
+
+static const u16 phy_mcu_ram_code_8125cp_1_1[] = {
+ 0xa436, 0x8023, 0xa438, 0x2300, 0xa436, 0xB82E, 0xa438, 0x0001,
+ 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012,
+ 0xa438, 0x07f8, 0xa436, 0xA014, 0xa438, 0xcc01, 0xa438, 0x2166,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000,
+ 0xa438, 0x0000, 0xa438, 0x0000, 0xa436, 0xA152, 0xa438, 0x021c,
+ 0xa436, 0xA154, 0xa438, 0x2170, 0xa436, 0xA156, 0xa438, 0x3fff,
+ 0xa436, 0xA158, 0xa438, 0x3fff, 0xa436, 0xA15A, 0xa438, 0x3fff,
+ 0xa436, 0xA15C, 0xa438, 0x3fff, 0xa436, 0xA15E, 0xa438, 0x3fff,
+ 0xa436, 0xA160, 0xa438, 0x3fff, 0xa436, 0xA150, 0xa438, 0x0003,
+ 0xa436, 0xA016, 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000,
+ 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800,
+ 0xa438, 0x801b, 0xa438, 0x1800, 0xa438, 0x802b, 0xa438, 0x1800,
+ 0xa438, 0x8031, 0xa438, 0x1800, 0xa438, 0x8031, 0xa438, 0x1800,
+ 0xa438, 0x8031, 0xa438, 0x1800, 0xa438, 0x8031, 0xa438, 0x1800,
+ 0xa438, 0x8031, 0xa438, 0x800a, 0xa438, 0x8530, 0xa438, 0x0c03,
+ 0xa438, 0x1502, 0xa438, 0x8d10, 0xa438, 0x9503, 0xa438, 0xd700,
+ 0xa438, 0x6050, 0xa438, 0xaa20, 0xa438, 0x1800, 0xa438, 0x0d53,
+ 0xa438, 0xd707, 0xa438, 0x40f6, 0xa438, 0x8901, 0xa438, 0xd704,
+ 0xa438, 0x6091, 0xa438, 0x8306, 0xa438, 0x8b02, 0xa438, 0x8290,
+ 0xa438, 0x1000, 0xa438, 0x0e4d, 0xa438, 0x1000, 0xa438, 0x1277,
+ 0xa438, 0xd704, 0xa438, 0x7e77, 0xa438, 0x1800, 0xa438, 0x0dc5,
+ 0xa438, 0xd700, 0xa438, 0x4063, 0xa438, 0x1800, 0xa438, 0x0d15,
+ 0xa438, 0x1800, 0xa438, 0x0d18, 0xa436, 0xA10E, 0xa438, 0xffff,
+ 0xa436, 0xA10C, 0xa438, 0xffff, 0xa436, 0xA10A, 0xa438, 0xffff,
+ 0xa436, 0xA108, 0xa438, 0xffff, 0xa436, 0xA106, 0xa438, 0xffff,
+ 0xa436, 0xA104, 0xa438, 0x0d13, 0xa436, 0xA102, 0xa438, 0x0dbf,
+ 0xa436, 0xA100, 0xa438, 0x0d52, 0xa436, 0xA110, 0xa438, 0x0007,
+ 0xa436, 0xb87c, 0xa438, 0x85bd, 0xa436, 0xb87e, 0xa438, 0xaf85,
+ 0xa438, 0xd5af, 0xa438, 0x85fb, 0xa438, 0xaf85, 0xa438, 0xfbaf,
+ 0xa438, 0x85fb, 0xa438, 0xaf85, 0xa438, 0xfbaf, 0xa438, 0x85fb,
+ 0xa438, 0xaf85, 0xa438, 0xfbaf, 0xa438, 0x85fb, 0xa438, 0xac28,
+ 0xa438, 0x0bd4, 0xa438, 0x0294, 0xa438, 0xbf85, 0xa438, 0xf802,
+ 0xa438, 0x61c2, 0xa438, 0xae09, 0xa438, 0xd414, 0xa438, 0x50bf,
+ 0xa438, 0x85f8, 0xa438, 0x0261, 0xa438, 0xc2bf, 0xa438, 0x60de,
+ 0xa438, 0x0261, 0xa438, 0xe1bf, 0xa438, 0x80cf, 0xa438, 0xaf24,
+ 0xa438, 0xe8f0, 0xa438, 0xac52, 0xa436, 0xb85e, 0xa438, 0x24e5,
+ 0xa436, 0xb860, 0xa438, 0xffff, 0xa436, 0xb862, 0xa438, 0xffff,
+ 0xa436, 0xb864, 0xa438, 0xffff, 0xa436, 0xb886, 0xa438, 0xffff,
+ 0xa436, 0xb888, 0xa438, 0xffff, 0xa436, 0xb88a, 0xa438, 0xffff,
+ 0xa436, 0xb88c, 0xa438, 0xffff, 0xa436, 0xb838, 0xa438, 0x0001,
+ 0xb820, 0x0010, 0xB82E, 0x0000, 0xa436, 0x8023, 0xa438, 0x0000,
+ 0xB820, 0x0000, 0xFFFF, 0xFFFF
+};
+
+static void
+rtl_real_set_phy_mcu_8125cp_1_1(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_ram_code(hw, phy_mcu_ram_code_8125cp_1_1,
+ ARRAY_SIZE(phy_mcu_ram_code_8125cp_1_1));
+}
+
+void
+rtl_set_phy_mcu_8125cp_1(struct rtl_hw *hw)
+{
+ rtl_set_phy_mcu_patch_request(hw);
+
+ rtl_real_set_phy_mcu_8125cp_1_1(hw);
+
+ rtl_clear_phy_mcu_patch_request(hw);
+}
diff --git a/drivers/net/r8169/base/rtl8125cp_mcu.h b/drivers/net/r8169/base/rtl8125cp_mcu.h
new file mode 100644
index 0000000000..8114dab2b9
--- /dev/null
+++ b/drivers/net/r8169/base/rtl8125cp_mcu.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef RTL8125CP_MCU_H
+#define RTL8125CP_MCU_H
+
+void rtl_set_phy_mcu_8125cp_1(struct rtl_hw *hw);
+
+#endif /* RTL8125CP_MCU_H */
diff --git a/drivers/net/r8169/meson.build b/drivers/net/r8169/meson.build
index 5662ecf0f5..e139452416 100644
--- a/drivers/net/r8169/meson.build
+++ b/drivers/net/r8169/meson.build
@@ -15,6 +15,8 @@ sources = files(
'base/rtl8125bp_mcu.c',
'base/rtl8125d.c',
'base/rtl8125d_mcu.c',
+ 'base/rtl8125cp.c',
+ 'base/rtl8125cp_mcu.c',
'base/rtl8126a.c',
'base/rtl8126a_mcu.c',
'base/rtl8168kb.c',
diff --git a/drivers/net/r8169/r8169_compat.h b/drivers/net/r8169/r8169_compat.h
index 8d06120518..e085f6242a 100644
--- a/drivers/net/r8169/r8169_compat.h
+++ b/drivers/net/r8169/r8169_compat.h
@@ -514,6 +514,7 @@ enum RTL_chipset_name {
RTL8168KB,
RTL8125BP,
RTL8125D,
+ RTL8125CP,
RTL8126A,
RTL8168EP,
RTL8168FP,
diff --git a/drivers/net/r8169/r8169_ethdev.c b/drivers/net/r8169/r8169_ethdev.c
index 1f4c7eb885..8071e14412 100644
--- a/drivers/net/r8169/r8169_ethdev.c
+++ b/drivers/net/r8169/r8169_ethdev.c
@@ -160,6 +160,7 @@ _rtl_setup_link(struct rte_eth_dev *dev)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
speed_mode = SPEED_2500;
break;
case CFG_METHOD_69:
@@ -435,6 +436,7 @@ rtl_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
case RTL8125B:
case RTL8125BP:
case RTL8125D:
+ case RTL8125CP:
dev_info->speed_capa |= RTE_ETH_LINK_SPEED_2_5G;
break;
}
diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c
index e5a45f6810..c131353ef8 100644
--- a/drivers/net/r8169/r8169_hw.c
+++ b/drivers/net/r8169/r8169_hw.c
@@ -334,6 +334,7 @@ rtl_oob_mutex_lock(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_58:
case CFG_METHOD_91:
ocp_reg_mutex_oob = 0x110;
ocp_reg_mutex_ib = 0x114;
@@ -393,6 +394,7 @@ rtl_oob_mutex_unlock(struct rtl_hw *hw)
case CFG_METHOD_52:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_58:
case CFG_METHOD_91:
ocp_reg_mutex_ib = 0x114;
ocp_reg_mutex_prio = 0x11C;
@@ -645,6 +647,7 @@ rtl_stop_all_request(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -698,6 +701,7 @@ rtl_wait_txrx_fifo_empty(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -807,6 +811,7 @@ rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
if (enable) {
RTL_W8(hw, Config2, RTL_R8(hw, Config2) | BIT_7);
@@ -818,6 +823,7 @@ rtl_enable_aspm_clkreq_lock(struct rtl_hw *hw, bool enable)
break;
case CFG_METHOD_70:
case CFG_METHOD_71:
+ case CFG_METHOD_91:
if (enable) {
RTL_W8(hw, INT_CFG0_8125, RTL_R8(hw, INT_CFG0_8125) | BIT_3);
RTL_W8(hw, Config5, RTL_R8(hw, Config5) | BIT_0);
@@ -877,6 +883,7 @@ rtl_hw_clear_timer_int(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -999,6 +1006,7 @@ rtl8125_hw_config(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_70:
case CFG_METHOD_71:
case CFG_METHOD_91:
@@ -1006,18 +1014,14 @@ rtl8125_hw_config(struct rtl_hw *hw)
break;
}
- if (hw->mcfg >= CFG_METHOD_91) {
+ if (hw->mcfg == CFG_METHOD_58 || hw->mcfg == CFG_METHOD_91) {
rtl_clear_mac_ocp_bit(hw, 0xE00C, BIT_12);
rtl_clear_mac_ocp_bit(hw, 0xC0C2, BIT_6);
}
mac_ocp_data = rtl_mac_ocp_read(hw, 0xE63E);
mac_ocp_data &= ~(BIT_5 | BIT_4);
- if (hw->mcfg == CFG_METHOD_48 || hw->mcfg == CFG_METHOD_49 ||
- hw->mcfg == CFG_METHOD_52 || hw->mcfg == CFG_METHOD_69 ||
- hw->mcfg == CFG_METHOD_70 || hw->mcfg == CFG_METHOD_71 ||
- hw->mcfg == CFG_METHOD_91)
- mac_ocp_data |= ((0x02 & 0x03) << 4);
+ mac_ocp_data |= ((0x02 & 0x03) << 4);
rtl_mac_ocp_write(hw, 0xE63E, mac_ocp_data);
/*
@@ -1279,6 +1283,10 @@ rtl_set_hw_ops(struct rtl_hw *hw)
case CFG_METHOD_57:
hw->hw_ops = rtl8125d_ops;
return 0;
+ /* 8125CP */
+ case CFG_METHOD_58:
+ hw->hw_ops = rtl8125cp_ops;
+ return 0;
/* 8126A */
case CFG_METHOD_69:
case CFG_METHOD_70:
@@ -1324,6 +1332,7 @@ rtl_hw_disable_mac_mcu_bps(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1531,6 +1540,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
speed_mode = SPEED_2500;
break;
case CFG_METHOD_69:
@@ -1606,6 +1616,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_28:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_58:
hw->HwSuppOcpChannelVer = 2;
break;
case CFG_METHOD_31:
@@ -1683,6 +1694,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_57:
hw->chipset_name = RTL8125D;
break;
+ case CFG_METHOD_58:
+ hw->chipset_name = RTL8125CP;
+ break;
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1728,6 +1742,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1745,6 +1760,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
hw->HwSuppMaxPhyLinkSpeed = SPEED_2500;
break;
case CFG_METHOD_69:
@@ -1773,6 +1789,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_91:
hw->HwSuppTxNoCloseVer = 6;
break;
@@ -1882,6 +1899,9 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_57:
hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_57;
break;
+ case CFG_METHOD_58:
+ hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_58;
+ break;
case CFG_METHOD_69:
hw->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_69;
break;
@@ -1932,6 +1952,7 @@ rtl_init_software_variable(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_91:
hw->HwSuppIntMitiVer = 6;
break;
@@ -1976,6 +1997,7 @@ rtl_exit_realwow(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -2108,6 +2130,7 @@ rtl_disable_ups(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -2477,6 +2500,14 @@ rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev)
hw->HwIcVerUnknown = TRUE;
}
break;
+ case 0x70800000:
+ if (ic_version_id == 0x00000000) {
+ hw->mcfg = CFG_METHOD_58;
+ } else {
+ hw->mcfg = CFG_METHOD_58;
+ hw->HwIcVerUnknown = TRUE;
+ }
+ break;
case 0x64800000:
if (ic_version_id == 0x00000000) {
hw->mcfg = CFG_METHOD_69;
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index f775c1a547..6f2d38ac81 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -91,6 +91,7 @@ extern const struct rtl_hw_ops rtl8125d_ops;
extern const struct rtl_hw_ops rtl8126a_ops;
extern const struct rtl_hw_ops rtl8168kb_ops;
extern const struct rtl_hw_ops rtl8127_ops;
+extern const struct rtl_hw_ops rtl8125cp_ops;
#define NO_BASE_ADDRESS 0x00000000
#define RTL8168FP_OOBMAC_BASE 0xBAF70000
@@ -132,6 +133,7 @@ extern const struct rtl_hw_ops rtl8127_ops;
#define NIC_RAMCODE_VERSION_CFG_METHOD_55 (0x0001)
#define NIC_RAMCODE_VERSION_CFG_METHOD_56 (0x0027)
#define NIC_RAMCODE_VERSION_CFG_METHOD_57 (0x0027)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_58 (0x0008)
#define NIC_RAMCODE_VERSION_CFG_METHOD_69 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_70 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_71 (0x0060)
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index 677bca7800..cc06c7b55a 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -495,6 +495,7 @@ rtl_wait_phy_ups_resume(struct rtl_hw *hw, u16 PhyState)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -529,32 +530,7 @@ rtl_phy_power_up(struct rtl_hw *hw)
}
/* Wait ups resume (phy state 3) */
- switch (hw->mcfg) {
- case CFG_METHOD_29:
- case CFG_METHOD_30:
- case CFG_METHOD_31:
- case CFG_METHOD_32:
- case CFG_METHOD_33:
- case CFG_METHOD_34:
- case CFG_METHOD_35:
- case CFG_METHOD_36:
- case CFG_METHOD_48:
- case CFG_METHOD_49:
- case CFG_METHOD_50:
- case CFG_METHOD_51:
- case CFG_METHOD_52:
- case CFG_METHOD_53:
- case CFG_METHOD_54:
- case CFG_METHOD_55:
- case CFG_METHOD_56:
- case CFG_METHOD_57:
- case CFG_METHOD_69:
- case CFG_METHOD_70:
- case CFG_METHOD_71:
- case CFG_METHOD_91:
- rtl_wait_phy_ups_resume(hw, 3);
- break;
- }
+ rtl_wait_phy_ups_resume(hw, 3);
}
void
@@ -586,6 +562,7 @@ rtl_powerup_pll(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -652,6 +629,7 @@ rtl_phy_power_down(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -699,6 +677,7 @@ rtl_powerdown_pll(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -738,6 +717,7 @@ rtl_powerdown_pll(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1103,6 +1083,7 @@ rtl_is_adv_eee_enabled(struct rtl_hw *hw)
case CFG_METHOD_53:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1187,6 +1168,9 @@ _rtl_disable_adv_eee(struct rtl_hw *hw)
case CFG_METHOD_53:
case CFG_METHOD_54:
case CFG_METHOD_55:
+ case CFG_METHOD_56:
+ case CFG_METHOD_57:
+ case CFG_METHOD_58:
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
@@ -1272,6 +1256,7 @@ rtl_disable_eee(struct rtl_hw *hw)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
rtl_clear_mac_ocp_bit(hw, 0xE040, (BIT_1 | BIT_0));
rtl_set_eth_phy_ocp_bit(hw, 0xA432, BIT_4);
@@ -1432,6 +1417,7 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u64 adv)
case CFG_METHOD_55:
case CFG_METHOD_56:
case CFG_METHOD_57:
+ case CFG_METHOD_58:
mask |= BIT_0;
rtl_clear_eth_phy_ocp_bit(hw, 0xA428, BIT_9);
rtl_clear_eth_phy_ocp_bit(hw, 0xA5EA, mask);
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 7/8] net/r8169: add support for RTL8127ATF serdes interface
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
` (4 preceding siblings ...)
2025-06-10 6:01 ` [PATCH 6/8] net/r8169: add support for RTL8125CP Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
2025-06-10 6:01 ` [PATCH 8/8] net/r8169: update HW configuration for 8127 Howard Wang
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/meson.build | 1 +
drivers/net/r8169/r8169_ethdev.h | 3 +
drivers/net/r8169/r8169_fiber.c | 201 +++++++++++++++++++++++++++++++
drivers/net/r8169/r8169_fiber.h | 42 +++++++
drivers/net/r8169/r8169_hw.c | 93 +++++++++-----
drivers/net/r8169/r8169_hw.h | 2 +-
drivers/net/r8169/r8169_phy.c | 14 ++-
7 files changed, 324 insertions(+), 32 deletions(-)
create mode 100644 drivers/net/r8169/r8169_fiber.c
create mode 100644 drivers/net/r8169/r8169_fiber.h
diff --git a/drivers/net/r8169/meson.build b/drivers/net/r8169/meson.build
index e139452416..ed644059f5 100644
--- a/drivers/net/r8169/meson.build
+++ b/drivers/net/r8169/meson.build
@@ -7,6 +7,7 @@ sources = files(
'r8169_rxtx.c',
'r8169_phy.c',
'r8169_dash.c',
+ 'r8169_fiber.c',
'base/rtl8125a.c',
'base/rtl8125a_mcu.c',
'base/rtl8125b.c',
diff --git a/drivers/net/r8169/r8169_ethdev.h b/drivers/net/r8169/r8169_ethdev.h
index bc65ccf68a..84a233dfed 100644
--- a/drivers/net/r8169/r8169_ethdev.h
+++ b/drivers/net/r8169/r8169_ethdev.h
@@ -90,6 +90,9 @@ struct rtl_hw {
u8 AllowAccessDashOcp;
u8 HwPkgDet;
u8 HwSuppSerDesPhyVer;
+
+ /* Fiber */
+ u32 HwFiberModeVer;
};
struct rtl_sw_stats {
diff --git a/drivers/net/r8169/r8169_fiber.c b/drivers/net/r8169/r8169_fiber.c
new file mode 100644
index 0000000000..9108fa6bba
--- /dev/null
+++ b/drivers/net/r8169/r8169_fiber.c
@@ -0,0 +1,201 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+
+#include <rte_ether.h>
+#include <ethdev_driver.h>
+
+#include "r8169_fiber.h"
+
+static bool
+rtl8127_wait_8127_sds_cmd_done(struct rtl_hw *hw)
+{
+ u32 timeout = 0;
+ u32 waitcount = 100;
+
+ do {
+ if (RTL_R16(hw, R8127_SDS_8127_CMD) & R8127_SDS_8127_CMD_IN)
+ rte_delay_us(1);
+ else
+ return true;
+ } while (++timeout < waitcount);
+
+ return false;
+}
+
+static u16
+rtl8127_sds_phy_read_8127(struct rtl_hw *hw, u16 index, u16 page, u16 reg)
+{
+ RTL_W16(hw, R8127_SDS_8127_ADDR,
+ R8127_MAKE_SDS_8127_ADDR(index, page, reg));
+ RTL_W16(hw, R8127_SDS_8127_CMD, R8127_SDS_8127_CMD_IN);
+
+ if (rtl8127_wait_8127_sds_cmd_done(hw))
+ return RTL_R16(hw, R8127_SDS_8127_DATA_OUT);
+ else
+ return 0xffff;
+}
+
+static void
+rtl8127_sds_phy_write_8127(struct rtl_hw *hw, u16 index, u16 page, u16 reg,
+ u16 val)
+{
+ RTL_W16(hw, R8127_SDS_8127_DATA_IN, val);
+ RTL_W16(hw, R8127_SDS_8127_ADDR,
+ R8127_MAKE_SDS_8127_ADDR(index, page, reg));
+ RTL_W16(hw, R8127_SDS_8127_CMD,
+ R8127_SDS_8127_CMD_IN | R8127_SDS_8127_WE_IN);
+
+ rtl8127_wait_8127_sds_cmd_done(hw);
+}
+
+static void
+rtl8127_clear_and_set_sds_phy_bit(struct rtl_hw *hw, u16 index, u16 page,
+ u16 addr, u16 clearmask, u16 setmask)
+{
+ u16 val;
+
+ val = rtl8127_sds_phy_read_8127(hw, index, page, addr);
+ val &= ~clearmask;
+ val |= setmask;
+ rtl8127_sds_phy_write_8127(hw, index, page, addr, val);
+}
+
+static void
+rtl8127_clear_sds_phy_bit(struct rtl_hw *hw, u16 index, u16 page,
+ u16 addr, u16 mask)
+{
+ rtl8127_clear_and_set_sds_phy_bit(hw, index, page, addr, mask, 0);
+}
+
+static void
+rtl8127_set_sds_phy_bit(struct rtl_hw *hw, u16 index, u16 page, u16 addr,
+ u16 mask)
+{
+ rtl8127_clear_and_set_sds_phy_bit(hw, index, page, addr, 0, mask);
+}
+
+static void
+rtl8127_sds_phy_reset_8127(struct rtl_hw *hw)
+{
+ RTL_W8(hw, 0x2350, RTL_R8(hw, 0x2350) & ~BIT_0);
+ rte_delay_us(1);
+
+ RTL_W16(hw, 0x233A, 0x801F);
+ RTL_W8(hw, 0x2350, RTL_R8(hw, 0x2350) | BIT_0);
+ rte_delay_us(10);
+}
+
+static void
+rtl8127_sds_phy_reset(struct rtl_hw *hw)
+{
+ switch (hw->HwFiberModeVer) {
+ case FIBER_MODE_RTL8127ATF:
+ rtl8127_sds_phy_reset_8127(hw);
+ break;
+ default:
+ break;
+ }
+}
+
+static void
+rtl8127_set_sds_phy_caps_1g_8127(struct rtl_hw *hw)
+{
+ u16 val;
+
+ rtl8127_set_sds_phy_bit(hw, 0, 1, 31, BIT_3);
+ rtl8127_clear_and_set_sds_phy_bit(hw, 0, 2, 0, BIT_13 | BIT_12 | BIT_6,
+ BIT_12 | BIT_6);
+ RTL_W16(hw, 0x233A, 0x8004);
+
+ val = RTL_R16(hw, 0x233E);
+ val &= (BIT_13 | BIT_12 | BIT_1 | BIT_0);
+ val |= BIT_1;
+ RTL_W16(hw, 0x233E, val);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC40A, 0x0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC466, 0x0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC808, 0x0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC80A, 0x0);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xC804, 0x000F, 0x000C);
+}
+
+static void
+rtl8127_sds_phy_exit_1g_8127(struct rtl_hw *hw)
+{
+ rtl8127_clear_sds_phy_bit(hw, 0, 1, 31, BIT_3);
+ rtl8127_clear_and_set_sds_phy_bit(hw, 0, 2, 0, BIT_13 | BIT_12 | BIT_6,
+ BIT_6);
+
+ rtl8127_sds_phy_reset(hw);
+}
+
+static void
+rtl8127_set_sds_phy_caps_10g_8127(struct rtl_hw *hw)
+{
+ u16 val;
+
+ RTL_W16(hw, 0x233A, 0x801A);
+
+ val = RTL_R16(hw, 0x233E);
+ val &= (BIT_13 | BIT_12 | BIT_1 | BIT_0);
+ val |= BIT_12;
+ RTL_W16(hw, 0x233E, val);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC40A, 0x0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC466, 0x3);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC808, 0x0);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xC80A, 0x0);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xC804, 0x000F, 0x000C);
+}
+
+static void
+rtl8127_set_sds_phy_caps_8127(struct rtl_hw *hw)
+{
+ rtl8127_sds_phy_exit_1g_8127(hw);
+
+ switch (hw->speed) {
+ case SPEED_10000:
+ rtl8127_set_sds_phy_caps_10g_8127(hw);
+ break;
+ case SPEED_1000:
+ rtl8127_set_sds_phy_caps_1g_8127(hw);
+ break;
+ default:
+ break;
+ }
+}
+
+static void
+rtl8127_set_sds_phy_caps(struct rtl_hw *hw)
+{
+ switch (hw->HwFiberModeVer) {
+ case FIBER_MODE_RTL8127ATF:
+ rtl8127_set_sds_phy_caps_8127(hw);
+ break;
+ default:
+ break;
+ }
+}
+
+static void
+rtl8127_hw_sds_phy_config(struct rtl_hw *hw)
+{
+ rtl8127_set_sds_phy_caps(hw);
+}
+
+void
+rtl8127_hw_fiber_phy_config(struct rtl_hw *hw)
+{
+ switch (hw->HwFiberModeVer) {
+ case FIBER_MODE_RTL8127ATF:
+ rtl8127_hw_sds_phy_config(hw);
+ break;
+ default:
+ break;
+ }
+}
diff --git a/drivers/net/r8169/r8169_fiber.h b/drivers/net/r8169/r8169_fiber.h
new file mode 100644
index 0000000000..52bafc7e4c
--- /dev/null
+++ b/drivers/net/r8169/r8169_fiber.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Realtek Corporation. All rights reserved
+ */
+
+#ifndef R8169_FIBER_H
+#define R8169_FIBER_H
+
+#include <stdint.h>
+
+#include <bus_pci_driver.h>
+#include <rte_ethdev.h>
+#include <rte_ethdev_core.h>
+
+#include "r8169_compat.h"
+#include "r8169_ethdev.h"
+#include "r8169_phy.h"
+#include "r8169_hw.h"
+
+enum {
+ FIBER_MODE_NIC_ONLY = 0,
+ FIBER_MODE_RTL8127ATF,
+ FIBER_MODE_MAX
+};
+
+#define HW_FIBER_MODE_ENABLED(_M) ((_M)->HwFiberModeVer > 0)
+
+/* sds address */
+#define R8127_SDS_8127_CMD 0x2348
+#define R8127_SDS_8127_ADDR 0x234A
+#define R8127_SDS_8127_DATA_IN 0x234C
+#define R8127_SDS_8127_DATA_OUT 0x234E
+
+#define R8127_MAKE_SDS_8127_ADDR(_index, _page, _reg) \
+ (((_index) << 11) | ((_page) << 5) | (_reg))
+
+/* sds command */
+#define R8127_SDS_8127_CMD_IN BIT_0
+#define R8127_SDS_8127_WE_IN BIT_1
+
+void rtl8127_hw_fiber_phy_config(struct rtl_hw *hw);
+
+#endif /* R8169_FIBER_H */
diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c
index c131353ef8..e25336ac19 100644
--- a/drivers/net/r8169/r8169_hw.c
+++ b/drivers/net/r8169/r8169_hw.c
@@ -12,6 +12,7 @@
#include "r8169_hw.h"
#include "r8169_logs.h"
#include "r8169_dash.h"
+#include "r8169_fiber.h"
static u32
rtl_eri_read_with_oob_base_address(struct rtl_hw *hw, int addr, int len,
@@ -1439,18 +1440,28 @@ rtl_write_mac_mcu_ram_code(struct rtl_hw *hw, const u16 *entry, u16 entry_cnt)
}
bool
-rtl_is_speed_mode_valid(u32 speed)
-{
- switch (speed) {
- case SPEED_10000:
- case SPEED_5000:
- case SPEED_2500:
- case SPEED_1000:
- case SPEED_100:
- case SPEED_10:
- return true;
- default:
- return false;
+rtl_is_speed_mode_valid(struct rtl_hw *hw, u32 speed)
+{
+ if (HW_FIBER_MODE_ENABLED(hw)) {
+ switch (speed) {
+ case SPEED_10000:
+ case SPEED_1000:
+ return true;
+ default:
+ return false;
+ }
+ } else {
+ switch (speed) {
+ case SPEED_10000:
+ case SPEED_5000:
+ case SPEED_2500:
+ case SPEED_1000:
+ case SPEED_100:
+ case SPEED_10:
+ return true;
+ default:
+ return false;
+ }
}
}
@@ -1482,9 +1493,9 @@ void
rtl_set_link_option(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex,
enum rtl_fc_mode fc)
{
- u64 adv;
+ u64 adv = 0;
- if (!rtl_is_speed_mode_valid(speed))
+ if (!rtl_is_speed_mode_valid(hw, speed))
speed = hw->HwSuppMaxPhyLinkSpeed;
if (!rtl_is_duplex_mode_valid(duplex))
@@ -1495,22 +1506,34 @@ rtl_set_link_option(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex,
speed = RTE_MIN(speed, hw->HwSuppMaxPhyLinkSpeed);
- adv = 0;
- switch (speed) {
- case SPEED_10000:
- adv |= ADVERTISE_10000_FULL;
- /* Fall through */
- case SPEED_5000:
- adv |= ADVERTISE_5000_FULL;
- /* Fall through */
- case SPEED_2500:
- adv |= ADVERTISE_2500_FULL;
- /* Fall through */
- default:
- adv |= (ADVERTISE_10_HALF | ADVERTISE_10_FULL |
- ADVERTISE_100_HALF | ADVERTISE_100_FULL |
- ADVERTISE_1000_HALF | ADVERTISE_1000_FULL);
- break;
+ if (HW_FIBER_MODE_ENABLED(hw)) {
+ switch (speed) {
+ case SPEED_10000:
+ adv |= ADVERTISE_10000_FULL;
+ /* Fall through */
+ case SPEED_1000:
+ adv |= ADVERTISE_1000_FULL;
+ break;
+ default:
+ break;
+ }
+ } else {
+ switch (speed) {
+ case SPEED_10000:
+ adv |= ADVERTISE_10000_FULL;
+ /* Fall through */
+ case SPEED_5000:
+ adv |= ADVERTISE_5000_FULL;
+ /* Fall through */
+ case SPEED_2500:
+ adv |= ADVERTISE_2500_FULL;
+ /* Fall through */
+ default:
+ adv |= (ADVERTISE_10_HALF | ADVERTISE_10_FULL |
+ ADVERTISE_100_HALF | ADVERTISE_100_FULL |
+ ADVERTISE_1000_HALF | ADVERTISE_1000_FULL);
+ break;
+ }
}
hw->autoneg = autoneg;
@@ -1962,6 +1985,16 @@ rtl_init_software_variable(struct rtl_hw *hw)
break;
}
+ switch (hw->mcfg) {
+ case CFG_METHOD_91:
+ tmp = (u8)rtl_mac_ocp_read(hw, 0xD006);
+ if (tmp == 0x07)
+ hw->HwFiberModeVer = FIBER_MODE_RTL8127ATF;
+ break;
+ default:
+ break;
+ }
+
rtl_set_link_option(hw, autoneg_mode, speed_mode, duplex_mode, rtl_fc_full);
hw->mtu = RTL_DEFAULT_MTU;
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index 6f2d38ac81..558ffaac95 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -47,7 +47,7 @@ void rtl_write_mac_mcu_ram_code(struct rtl_hw *hw, const u16 *entry,
void rtl_hw_initialize(struct rtl_hw *hw);
-bool rtl_is_speed_mode_valid(u32 speed);
+bool rtl_is_speed_mode_valid(struct rtl_hw *hw, u32 speed);
void rtl_get_mac_version(struct rtl_hw *hw, struct rte_pci_device *pci_dev);
int rtl_get_mac_address(struct rtl_hw *hw, struct rte_ether_addr *ea);
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index cc06c7b55a..e547b44137 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -14,6 +14,7 @@
#include "r8169_phy.h"
#include "r8169_logs.h"
#include "r8169_dash.h"
+#include "r8169_fiber.h"
static u16
rtl_map_phy_ocp_addr(u16 PageNum, u8 RegNum)
@@ -1327,6 +1328,9 @@ rtl_hw_phy_config(struct rtl_hw *hw)
if (rtl_is_8125(hw))
rtl_clear_eth_phy_ocp_bit(hw, 0xA5B4, BIT_15);
+ if (HW_FIBER_MODE_ENABLED(hw))
+ rtl8127_hw_fiber_phy_config(hw);
+
rtl_mdio_write(hw, 0x1F, 0x0000);
if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(hw))
@@ -1424,12 +1428,15 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u64 adv)
break;
}
- if (!rtl_is_speed_mode_valid(speed)) {
+ if (!rtl_is_speed_mode_valid(hw, speed)) {
speed = hw->HwSuppMaxPhyLinkSpeed;
duplex = DUPLEX_FULL;
adv |= hw->advertising;
}
+ if (HW_FIBER_MODE_ENABLED(hw))
+ goto set_speed;
+
giga_ctrl = rtl_mdio_read(hw, MII_CTRL1000);
giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
if (rtl_is_8125(hw)) {
@@ -1482,11 +1489,16 @@ rtl_set_speed_xmii(struct rtl_hw *hw, u8 autoneg, u32 speed, u8 duplex, u64 adv)
else
goto out;
}
+
+set_speed:
hw->autoneg = autoneg;
hw->speed = speed;
hw->duplex = duplex;
hw->advertising = adv;
+ if (HW_FIBER_MODE_ENABLED(hw))
+ rtl8127_hw_fiber_phy_config(hw);
+
rc = 0;
out:
return rc;
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 8/8] net/r8169: update HW configuration for 8127
2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
` (5 preceding siblings ...)
2025-06-10 6:01 ` [PATCH 7/8] net/r8169: add support for RTL8127ATF serdes interface Howard Wang
@ 2025-06-10 6:01 ` Howard Wang
6 siblings, 0 replies; 8+ messages in thread
From: Howard Wang @ 2025-06-10 6:01 UTC (permalink / raw)
To: dev; +Cc: pro_nic_dpdk, Howard Wang
Signed-off-by: Howard Wang <howard_wang@realsil.com.cn>
---
drivers/net/r8169/base/rtl8127.c | 44 ++++++++---
drivers/net/r8169/base/rtl8127_mcu.c | 109 ++++++++++++---------------
drivers/net/r8169/r8169_hw.h | 2 +-
drivers/net/r8169/r8169_phy.c | 1 -
4 files changed, 80 insertions(+), 76 deletions(-)
diff --git a/drivers/net/r8169/base/rtl8127.c b/drivers/net/r8169/base/rtl8127.c
index fac6165931..9e79255e3c 100644
--- a/drivers/net/r8169/base/rtl8127.c
+++ b/drivers/net/r8169/base/rtl8127.c
@@ -102,6 +102,13 @@ rtl_hw_phy_config_8127a_1(struct rtl_hw *hw)
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x83EF);
rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0x0E00);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBF38, 0x01F0, 0x0160);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBF3A, 0x001F, 0x0014);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBF28, 0x6000);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xBF2C, 0xC000);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBF28, 0x1FFF, 0x0187);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xBF2A, 0x003F, 0x0003);
+
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8173);
rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x8620);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8175);
@@ -205,7 +212,7 @@ rtl_hw_phy_config_8127a_1(struct rtl_hw *hw)
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8015);
rtl_set_eth_phy_ocp_bit(hw, 0xB87E, BIT_9);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8016);
- rtl_set_eth_phy_ocp_bit(hw, 0xB87E, BIT_11);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, BIT_11);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FE6);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0800);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FE4);
@@ -241,6 +248,16 @@ rtl_hw_phy_config_8127a_1(struct rtl_hw *hw)
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0x3F00, 0x2A00);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x81B1);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0B00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FED);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x4E00);
+
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88AC);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x2300);
+ rtl_set_eth_phy_ocp_bit(hw, 0xBF0C, 0x3800);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88DE);
+ rtl_clear_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x80B4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x5195);
rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x8370);
rtl_mdio_direct_write_phy_ocp(hw, 0xA438, 0x8671);
@@ -300,21 +317,24 @@ rtl_hw_phy_config_8127a_1(struct rtl_hw *hw)
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FEE);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFDF);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF0);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFDF);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF1);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xDF0A);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF3);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x4AAA);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF5);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x5A0A);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF7);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x4AAA);
- rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF9);
- rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x5A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xFFFF);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF2);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0A4A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF4);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xAA5A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF6);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0x0A4A);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x8FF8);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xB87E, 0xAA5A);
rtl_mdio_direct_write_phy_ocp(hw, 0xB87C, 0x88D5);
rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xB87E, 0xFF00, 0x0200);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x84BB);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x0A00);
+ rtl_mdio_direct_write_phy_ocp(hw, 0xA436, 0x84C0);
+ rtl_clear_and_set_eth_phy_ocp_bit(hw, 0xA438, 0xFF00, 0x1600);
+
rtl_set_eth_phy_ocp_bit(hw, 0xA430, BIT_1 | BIT_0);
}
diff --git a/drivers/net/r8169/base/rtl8127_mcu.c b/drivers/net/r8169/base/rtl8127_mcu.c
index 44e6d96d9e..facbae8132 100644
--- a/drivers/net/r8169/base/rtl8127_mcu.c
+++ b/drivers/net/r8169/base/rtl8127_mcu.c
@@ -11,58 +11,47 @@
/* ------------------------------------MAC 8127------------------------------------- */
-static void
-_rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
+void
+rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
{
u16 entry_cnt;
static const u16 mcu_patch_code[] = {
- 0xE010, 0xE012, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE0CF, 0xE180, 0xE182,
- 0xE184, 0xE186, 0xE188, 0xE18A, 0xE18C, 0xE18E, 0xE190, 0xC602, 0xBE00,
- 0x0000, 0xC602, 0xBE00, 0x0000, 0xC502, 0xBD00, 0x0000, 0xC502, 0xBD00,
- 0x0000, 0xC502, 0xBD00, 0x0000, 0xC643, 0x76C0, 0x49E1, 0xF13F, 0xC140,
- 0x7720, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006,
- 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A0E, 0x44DA, 0xE893,
- 0x481C, 0xE884, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003,
- 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A12,
- 0x44DA, 0xE87F, 0x481F, 0xE870, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A,
- 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C,
- 0x21B8, 0x1A1C, 0x44DA, 0xE86B, 0x481F, 0xE85C, 0xE004, 0xE04F, 0xDD98,
- 0xD450, 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006,
- 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A0E, 0x44DA, 0xE854,
- 0x489E, 0x481F, 0xE844, 0xE001, 0x1908, 0xE83E, 0x49E0, 0xF003, 0x1B00,
- 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002,
- 0x1B0C, 0x21B8, 0x1A8A, 0x44DA, 0xE83D, 0x4813, 0xE82E, 0x49F9, 0xF106,
- 0x4838, 0xE837, 0x4813, 0xE828, 0xE001, 0x49E0, 0xF003, 0x1B00, 0xE00A,
- 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002, 0x1B0C,
- 0x21B8, 0x1A84, 0x44DA, 0xE823, 0x4890, 0x4811, 0xE813, 0x49F9, 0xF106,
- 0x4838, 0xE81C, 0x4890, 0x4811, 0xE80C, 0xC207, 0x7440, 0xC602, 0xBE00,
- 0x1600, 0x0FFE, 0xDE20, 0xE092, 0xC3FD, 0xE802, 0xFF80, 0xC0FB, 0x7202,
- 0x49AE, 0xF1FE, 0x9900, 0x44D3, 0x4413, 0x482F, 0x9A02, 0x7202, 0x49AE,
- 0xF1FE, 0xFF80, 0xC0EE, 0x7202, 0x49AE, 0xF1FE, 0x44D3, 0x4413, 0x48AF,
- 0x9A02, 0x7202, 0x49AE, 0xF1FE, 0x7100, 0xFF80, 0xB401, 0xB402, 0xB404,
- 0xB407, 0xC61F, 0x76C0, 0x49E1, 0xF164, 0xC11C, 0x7720, 0x1906, 0xE88A,
- 0x1B0C, 0x21B8, 0x1A40, 0x44DA, 0xE895, 0x4810, 0xE886, 0x190C, 0xE881,
- 0x1B08, 0x21B8, 0x1A26, 0x44DA, 0xE88C, 0x4890, 0x4891, 0xE87C, 0x49F9,
- 0xF107, 0x4898, 0x4899, 0xE877, 0xE003, 0xDD98, 0xD450, 0x1908, 0xE86F,
- 0x49E0, 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E2,
- 0xF003, 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A5C, 0x44DA, 0xE86E, 0x4897,
- 0x4898, 0x4819, 0x481A, 0xE85C, 0x49F9, 0xF109, 0x4838, 0xE865, 0x4897,
- 0x4898, 0x4819, 0x481A, 0xE853, 0xE001, 0x190A, 0xE84D, 0x1B00, 0xE85B,
- 0x44E1, 0x4838, 0xE858, 0x44E9, 0x1908, 0xE845, 0x49E0, 0xF003, 0x1B00,
- 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003, 0x1B08, 0xE002,
- 0x1B0C, 0x21B8, 0x1A86, 0x44DA, 0xE844, 0x44CC, 0xE835, 0x49F9, 0xF108,
- 0x4838, 0xE83E, 0x44CD, 0xE82F, 0xE003, 0xE021, 0xFFC0, 0x190A, 0xE827,
- 0x1B00, 0x4839, 0xE834, 0x249A, 0x1C00, 0x44E1, 0x1909, 0xE81F, 0x49E0,
- 0xF003, 0x1B00, 0xE00A, 0x49E2, 0xF003, 0x1B04, 0xE006, 0x49E4, 0xF003,
- 0x1B08, 0xE002, 0x1B0C, 0x21B8, 0x1A1A, 0x44DA, 0xE81E, 0xC5E4, 0x414D,
- 0x418C, 0xE80D, 0xB007, 0xB004, 0xB002, 0xB001, 0xC602, 0xBE00, 0x15E6,
- 0x0FFE, 0xDE20, 0xC3FE, 0xE802, 0xFF80, 0xC0FC, 0x7202, 0x49AE, 0xF1FE,
- 0x9900, 0x44D3, 0x4413, 0x482F, 0x9A02, 0x7202, 0x49AE, 0xF1FE, 0xFF80,
- 0xC0EF, 0x7202, 0x49AE, 0xF1FE, 0x44D3, 0x4413, 0x48AF, 0x9A02, 0x7202,
- 0x49AE, 0xF1FE, 0x7100, 0xFF80, 0xC502, 0xBD00, 0x0000, 0xC502, 0xBD00,
- 0x0000, 0xC502, 0xBD00, 0x0000, 0xC302, 0xBB00, 0x0000, 0xC602, 0xBE00,
- 0x0000, 0xC102, 0xB900, 0x0000, 0xC102, 0xB900, 0x0000, 0xC602, 0xBE00,
- 0x0000, 0xC602, 0xBE00, 0x0000, 0x6961, 0x0018, 0x0C11, 0x0A38
+ 0xE010, 0xE023, 0xE036, 0xE049, 0xE05C, 0xE075, 0xE0B1, 0xE117, 0xE11B,
+ 0xE11D, 0xE11F, 0xE121, 0xE123, 0xE125, 0xE127, 0xE129, 0x7020, 0xB405,
+ 0xB404, 0xC50F, 0x74A0, 0xC50E, 0x4025, 0xF005, 0x4850, 0x4025, 0xF002,
+ 0xE002, 0x4809, 0xB004, 0xB005, 0xC502, 0xBD00, 0x1522, 0xD006, 0x0004,
+ 0x7760, 0xB405, 0xB404, 0xC50F, 0x74A0, 0xC50E, 0x4025, 0xF005, 0x4850,
+ 0x4025, 0xF002, 0xE002, 0x4879, 0xB004, 0xB005, 0xC002, 0xB800, 0x41E2,
+ 0xD006, 0x0004, 0x7160, 0xB405, 0xB404, 0xC50F, 0x74A0, 0xC50E, 0x4025,
+ 0xF005, 0x4850, 0x4025, 0xF002, 0xE002, 0x4819, 0xB004, 0xB005, 0xC302,
+ 0xBB00, 0x508E, 0xD006, 0x0004, 0x7720, 0xB405, 0xB404, 0xC50F, 0x74A0,
+ 0xC50E, 0x4025, 0xF005, 0x4850, 0x4025, 0xF002, 0xE002, 0x4879, 0xB004,
+ 0xB005, 0xC102, 0xB900, 0x50F8, 0xD006, 0x0004, 0x61A9, 0xB403, 0xB404,
+ 0xC313, 0x7460, 0xC312, 0x4023, 0xF005, 0x4830, 0x4023, 0xF002, 0xE003,
+ 0x4997, 0xF003, 0xC00A, 0xE002, 0xC009, 0xB004, 0xB003, 0xC102, 0xB900,
+ 0x34FC, 0xD006, 0x0004, 0x02AF, 0x041F, 0xB407, 0xB406, 0xB405, 0xB404,
+ 0xB403, 0xB402, 0xB401, 0xB400, 0x49D2, 0xF116, 0xC62F, 0x77C0, 0x49F9,
+ 0xF020, 0x49FA, 0xF11E, 0x49F2, 0xF102, 0xE01B, 0x48F2, 0x9FC0, 0xC625,
+ 0x75C2, 0x4852, 0x9DC2, 0xC122, 0x7020, 0x4801, 0x4802, 0x9820, 0xE00F,
+ 0xC61A, 0x77C0, 0x49F2, 0xF10B, 0xC618, 0x77C0, 0x49F2, 0xF007, 0x48F2,
+ 0x9FC0, 0xC611, 0x75C2, 0x48D2, 0x9DC2, 0xB000, 0xB001, 0xB002, 0xB003,
+ 0xB004, 0xB005, 0xB006, 0xB007, 0x9D6C, 0xC502, 0xBD00, 0x0168, 0xE024,
+ 0xC010, 0xD410, 0xD460, 0xB407, 0xB406, 0xB405, 0xB404, 0xB403, 0xB402,
+ 0xB401, 0xB400, 0xC152, 0x7020, 0x4981, 0xF043, 0xC050, 0x7100, 0xB401,
+ 0xC14C, 0x489E, 0x481D, 0x9900, 0xC24A, 0x7340, 0x49B7, 0xF135, 0xC144,
+ 0x9900, 0xC245, 0x7340, 0xC447, 0x401C, 0xF109, 0x734C, 0x1301, 0xF12B,
+ 0xC343, 0x9B40, 0xC33E, 0x9B40, 0xE022, 0xC63A, 0x77C0, 0x48F4, 0x48F5,
+ 0x48F9, 0x48FA, 0x9FC0, 0xC231, 0x7344, 0x48B4, 0x9B44, 0xC22E, 0x7340,
+ 0x4830, 0x48B1, 0x4832, 0x483C, 0x48BD, 0x48BE, 0x48BF, 0x9B40, 0xC223,
+ 0xC32A, 0x9B48, 0xC327, 0x9B46, 0xC324, 0x9B40, 0xC321, 0x9B42, 0xC31E,
+ 0x9B40, 0xE005, 0xC113, 0x7020, 0x4881, 0x9820, 0xB001, 0xC010, 0x9900,
+ 0xB000, 0xB001, 0xB002, 0xB003, 0xB004, 0xB005, 0xB006, 0xB007, 0x2125,
+ 0xC102, 0xB900, 0x1A6C, 0xD410, 0xC000, 0xE86C, 0xB600, 0xB800, 0xB40A,
+ 0xE024, 0x5A00, 0x5A81, 0x0073, 0x5A80, 0x0042, 0x0001, 0xC104, 0xC202,
+ 0xBA00, 0x1A2E, 0xC896, 0xC302, 0xBB00, 0x0000, 0xC002, 0xB800, 0x0000,
+ 0xC002, 0xB800, 0x0000, 0xC502, 0xBD00, 0x0000, 0xC102, 0xB900, 0x0000,
+ 0xC102, 0xB900, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+ 0x6961, 0x0019, 0x050C, 0x140C
};
entry_cnt = ARRAY_SIZE(mcu_patch_code);
@@ -76,20 +65,16 @@ _rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
rtl_mac_ocp_write(hw, 0xFC26, 0x8000);
- rtl_mac_ocp_write(hw, 0xFC32, 0x15FE);
- rtl_mac_ocp_write(hw, 0xFC34, 0x15E4);
-
- rtl_mac_ocp_write(hw, 0xFC48, 0x0060);
-}
-
-void
-rtl_set_mac_mcu_8127a_1(struct rtl_hw *hw)
-{
- u8 tmp = (u8)rtl_mac_ocp_read(hw, 0xD006);
+ rtl_mac_ocp_write(hw, 0xFC28, 0x1520);
+ rtl_mac_ocp_write(hw, 0xFC2A, 0x41E0);
+ rtl_mac_ocp_write(hw, 0xFC2C, 0x508C);
+ rtl_mac_ocp_write(hw, 0xFC2E, 0x50F6);
+ rtl_mac_ocp_write(hw, 0xFC30, 0x34FA);
+ rtl_mac_ocp_write(hw, 0xFC32, 0x0166);
+ rtl_mac_ocp_write(hw, 0xFC34, 0x1A6A);
+ rtl_mac_ocp_write(hw, 0xFC36, 0x1A2C);
- if (tmp != 0x04)
- return;
- _rtl_set_mac_mcu_8127a_1(hw);
+ rtl_mac_ocp_write(hw, 0xFC48, 0x00FF);
}
/* ------------------------------------PHY 8127------------------------------------- */
diff --git a/drivers/net/r8169/r8169_hw.h b/drivers/net/r8169/r8169_hw.h
index 558ffaac95..ffd2914b10 100644
--- a/drivers/net/r8169/r8169_hw.h
+++ b/drivers/net/r8169/r8169_hw.h
@@ -137,7 +137,7 @@ extern const struct rtl_hw_ops rtl8125cp_ops;
#define NIC_RAMCODE_VERSION_CFG_METHOD_69 (0x0023)
#define NIC_RAMCODE_VERSION_CFG_METHOD_70 (0x0033)
#define NIC_RAMCODE_VERSION_CFG_METHOD_71 (0x0060)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_91 (0x0015)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_91 (0x0036)
#define RTL_MAC_MCU_PAGE_SIZE 256
#define RTL_DEFAULT_MTU 1500
diff --git a/drivers/net/r8169/r8169_phy.c b/drivers/net/r8169/r8169_phy.c
index e547b44137..9da3a9d41b 100644
--- a/drivers/net/r8169/r8169_phy.c
+++ b/drivers/net/r8169/r8169_phy.c
@@ -682,7 +682,6 @@ rtl_powerdown_pll(struct rtl_hw *hw)
case CFG_METHOD_69:
case CFG_METHOD_70:
case CFG_METHOD_71:
- case CFG_METHOD_91:
RTL_W8(hw, PMCH, RTL_R8(hw, PMCH) & ~BIT_7);
break;
}
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-06-10 6:02 UTC | newest]
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2025-06-10 6:01 [PATCH 1/8] net/r8169: add support for RTL8168 series Howard Wang
2025-06-10 6:01 ` [PATCH 2/8] net/r8169: update HW configurations for 8125 and 8126 Howard Wang
2025-06-10 6:01 ` [PATCH 3/8] net/r8169: add support for RTL8127 Howard Wang
2025-06-10 6:01 ` [PATCH 4/8] net/r8169: remove cmac feature for RTL8125AP Howard Wang
2025-06-10 6:01 ` [PATCH 5/8] net/r8169: add RTL8127AP dash support Howard Wang
2025-06-10 6:01 ` [PATCH 6/8] net/r8169: add support for RTL8125CP Howard Wang
2025-06-10 6:01 ` [PATCH 7/8] net/r8169: add support for RTL8127ATF serdes interface Howard Wang
2025-06-10 6:01 ` [PATCH 8/8] net/r8169: update HW configuration for 8127 Howard Wang
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