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([10.138.182.122]) by fmviesa009.fm.intel.com with ESMTP; 17 Jun 2025 23:45:43 -0700 From: Soumyadeep Hore <soumyadeep.hore@intel.com> To: dev@dpdk.org, bruce.richardson@intel.com Cc: aman.deep.singh@intel.com, manoj.kumar.subbarao@intel.com, Paul Greenwalt <paul.greenwalt@intel.com> Subject: [PATCH v7 1/4] net/ice: update E830 Tx Time Queue Context Structure Date: Tue, 17 Jun 2025 22:36:11 +0000 Message-ID: <20250617223614.568996-2-soumyadeep.hore@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250617223614.568996-1-soumyadeep.hore@intel.com> References: <20250617051337.563233-5-soumyadeep.hore@intel.com> <20250617223614.568996-1-soumyadeep.hore@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org From: Paul Greenwalt <paul.greenwalt@intel.com> Updated the Tx Time Queue Context Structure to align with HAS. Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com> Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com> --- drivers/net/intel/ice/base/ice_common.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/net/intel/ice/base/ice_common.c b/drivers/net/intel/ice/base/ice_common.c index 4de9f37989..dfc2fd69e7 100644 --- a/drivers/net/intel/ice/base/ice_common.c +++ b/drivers/net/intel/ice/base/ice_common.c @@ -1671,17 +1671,17 @@ const struct ice_ctx_ele ice_txtime_ctx_info[] = { ICE_CTX_STORE(ice_txtime_ctx, cpuid, 8, 82), ICE_CTX_STORE(ice_txtime_ctx, tphrd_desc, 1, 90), ICE_CTX_STORE(ice_txtime_ctx, qlen, 13, 91), - ICE_CTX_STORE(ice_txtime_ctx, timer_num, 3, 104), - ICE_CTX_STORE(ice_txtime_ctx, txtime_ena_q, 1, 107), - ICE_CTX_STORE(ice_txtime_ctx, drbell_mode_32, 1, 108), - ICE_CTX_STORE(ice_txtime_ctx, ts_res, 4, 109), - ICE_CTX_STORE(ice_txtime_ctx, ts_round_type, 2, 113), - ICE_CTX_STORE(ice_txtime_ctx, ts_pacing_slot, 3, 115), - ICE_CTX_STORE(ice_txtime_ctx, merging_ena, 1, 118), - ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_prof_id, 4, 119), - ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_cache_line_aln_thld, 4, 123), - ICE_CTX_STORE(ice_txtime_ctx, tx_pipe_delay_mode, 1, 127), - ICE_CTX_STORE(ice_txtime_ctx, int_q_state, 70, 128), + ICE_CTX_STORE(ice_txtime_ctx, timer_num, 1, 104), + ICE_CTX_STORE(ice_txtime_ctx, txtime_ena_q, 1, 105), + ICE_CTX_STORE(ice_txtime_ctx, drbell_mode_32, 1, 106), + ICE_CTX_STORE(ice_txtime_ctx, ts_res, 4, 107), + ICE_CTX_STORE(ice_txtime_ctx, ts_round_type, 2, 111), + ICE_CTX_STORE(ice_txtime_ctx, ts_pacing_slot, 3, 113), + ICE_CTX_STORE(ice_txtime_ctx, merging_ena, 1, 116), + ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_prof_id, 4, 117), + ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_cache_line_aln_thld, 4, 121), + ICE_CTX_STORE(ice_txtime_ctx, tx_pipe_delay_mode, 1, 125), + ICE_CTX_STORE(ice_txtime_ctx, int_q_state, 70, 126), { 0 } }; -- 2.43.0