From: Nithinsen Kaithakadan <nkaithakadan@marvell.com>
To: <dev@dpdk.org>
Cc: <adwivedi@marvell.com>, <anoobj@marvell.com>,
<ktejasree@marvell.com>, <gakhil@marvell.com>,
<pbhagavatula@marvell.com>
Subject: [PATCH v3 2/2] crypto/cnxk: add sessionless asym cn20k support
Date: Wed, 18 Jun 2025 08:36:50 +0000 [thread overview]
Message-ID: <20250618083651.637234-3-nkaithakadan@marvell.com> (raw)
In-Reply-To: <20250618083651.637234-1-nkaithakadan@marvell.com>
Add support for sessionless asymmetric operations for cn20k.
Signed-off-by: Nithinsen Kaithakadan <nkaithakadan@marvell.com>
---
doc/guides/cryptodevs/features/cn20k.ini | 1 +
drivers/crypto/cnxk/cn20k_cryptodev_ops.c | 91 +++++++++++++++++++++--
2 files changed, 87 insertions(+), 5 deletions(-)
diff --git a/doc/guides/cryptodevs/features/cn20k.ini b/doc/guides/cryptodevs/features/cn20k.ini
index 76553d190e..ff00a8a107 100644
--- a/doc/guides/cryptodevs/features/cn20k.ini
+++ b/doc/guides/cryptodevs/features/cn20k.ini
@@ -17,6 +17,7 @@ Symmetric sessionless = Y
RSA PRIV OP KEY EXP = Y
RSA PRIV OP KEY QT = Y
Digest encrypted = Y
+Asymmetric sessionless = Y
Sym raw data path API = Y
Inner checksum = Y
Rx inject = Y
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
index f94ab3750c..6ef7c5bb22 100644
--- a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
@@ -79,6 +79,55 @@ cn20k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)
return NULL;
}
+static inline struct cnxk_ae_sess *
+cn20k_cpt_asym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)
+{
+ struct rte_crypto_asym_op *asym_op = op->asym;
+ struct roc_cpt *roc_cpt = qp->lf.roc_cpt;
+ struct rte_cryptodev_asym_session *sess;
+ struct cnxk_ae_sess *priv;
+ struct cnxk_cpt_vf *vf;
+ union cpt_inst_w7 w7;
+ struct hw_ctx_s *hwc;
+
+ /* Create temporary session */
+ if (rte_mempool_get(qp->sess_mp, (void **)&sess) < 0)
+ return NULL;
+
+ priv = (struct cnxk_ae_sess *)sess;
+ if (cnxk_ae_fill_session_parameters(priv, asym_op->xform))
+ goto sess_put;
+
+ priv->lf = &qp->lf;
+
+ if (roc_errata_cpt_hang_on_mixed_ctx_val()) {
+ hwc = &priv->hw_ctx;
+ hwc->w0.s.aop_valid = 1;
+ hwc->w0.s.ctx_hdr_size = 0;
+ hwc->w0.s.ctx_size = 1;
+ hwc->w0.s.ctx_push_size = 1;
+
+ w7.s.ctx_val = 1;
+ w7.s.cptr = (uint64_t)hwc;
+ }
+
+ w7.u64 = 0;
+ w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_AE];
+
+ vf = container_of(roc_cpt, struct cnxk_cpt_vf, cpt);
+ priv->cpt_inst_w7 = w7.u64;
+ priv->cnxk_fpm_iova = vf->cnxk_fpm_iova;
+ priv->ec_grp = vf->ec_grp;
+
+ asym_op->session = sess;
+
+ return priv;
+
+sess_put:
+ rte_mempool_put(qp->sess_mp, sess);
+ return NULL;
+}
+
static __rte_always_inline int __rte_hot
cpt_sec_ipsec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
struct cn20k_sec_session *sess, struct cpt_inst_s *inst,
@@ -178,7 +227,6 @@ cn20k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct
w7 = sess->cpt_inst_w7;
}
} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
-
if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
asym_op = op->asym;
ae_sess = (struct cnxk_ae_sess *)asym_op->session;
@@ -187,9 +235,22 @@ cn20k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct
return 0;
w7 = ae_sess->cpt_inst_w7;
} else {
- plt_dp_err("Not supported Asym op without session");
- return 0;
+ ae_sess = cn20k_cpt_asym_temp_sess_create(qp, op);
+ if (unlikely(ae_sess == NULL)) {
+ plt_dp_err("Could not create temp session");
+ return 0;
+ }
+
+ ret = cnxk_ae_enqueue(qp, op, infl_req, &inst[0], ae_sess);
+ if (unlikely(ret)) {
+ cnxk_ae_session_clear(NULL,
+ (struct rte_cryptodev_asym_session *)ae_sess);
+ rte_mempool_put(qp->sess_mp, ae_sess);
+ return 0;
+ }
+ w7 = ae_sess->cpt_inst_w7;
}
+
} else {
plt_dp_err("Unsupported op type");
return 0;
@@ -395,8 +456,23 @@ cn20k_ca_meta_info_extract(struct rte_crypto_op *op, struct cnxk_cpt_qp **qp, ui
priv = (struct cnxk_ae_sess *)op->asym->session;
*qp = priv->qp;
*w2 = priv->cpt_inst_w2;
- } else
- return -EINVAL;
+ } else {
+ union rte_event_crypto_metadata *ec_mdata;
+ struct rte_event *rsp_info;
+ uint8_t cdev_id;
+ uint16_t qp_id;
+
+ if (unlikely(op->private_data_offset == 0))
+ return -EINVAL;
+ ec_mdata = (union rte_event_crypto_metadata *)((uint8_t *)op +
+ op->private_data_offset);
+ rsp_info = &ec_mdata->response_info;
+ cdev_id = ec_mdata->request_info.cdev_id;
+ qp_id = ec_mdata->request_info.queue_pair_id;
+ *qp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];
+ *w2 = CNXK_CPT_INST_W2((RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,
+ rsp_info->sched_type, rsp_info->queue_id, 0);
+ }
} else
return -EINVAL;
@@ -1083,6 +1159,11 @@ cn20k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop
rte_mempool_put(qp->sess_mp, cop->sym->session);
cop->sym->session = NULL;
}
+ if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
+ cnxk_ae_session_clear(NULL, cop->asym->session);
+ rte_mempool_put(qp->sess_mp, cop->asym->session);
+ cop->asym->session = NULL;
+ }
}
}
--
2.48.1
prev parent reply other threads:[~2025-06-18 8:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 8:36 [PATCH v3 0/2] add crypto adapter support in cn20k Nithinsen Kaithakadan
2025-06-18 8:36 ` [PATCH v3 1/2] crypto/cnxk: add crypto adapter for cn20k Nithinsen Kaithakadan
2025-06-18 8:36 ` Nithinsen Kaithakadan [this message]
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