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From: Shani Peretz <shperetz@nvidia.com>
To: <dev@dpdk.org>
Cc: Shani Peretz <shperetz@nvidia.com>,
	Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
	Dariusz Sosnowski <dsosnowski@nvidia.com>,
	"Bing Zhao" <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
	Suanming Mou <suanmingm@nvidia.com>,
	Matan Azrad <matan@nvidia.com>
Subject: [PATCH] net/mlx5: fix inline data size adjustment for Verbs API
Date: Wed, 2 Jul 2025 12:34:59 +0300	[thread overview]
Message-ID: <20250702093459.102142-1-shperetz@nvidia.com> (raw)

This fix ensures that when using Verbs for queue creation,
the maximum inline data size is adjusted to prevent rejection
in mlx5_calc_send_wqe() from the rdma_core library.
The adjustment is achieved by reducing the Ethernet minimal inline
size and adding the data minimal inline size,
there for decreasing the maximum inline data size to fit within
acceptable limits.

Fixes: 0c2f7837c673 ("net/mlx5: mitigate Tx queue parameter adjustment")

Signed-off-by: Shani Peretz <shperetz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_txq.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 1948a700f1..0981091acd 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -1009,6 +1009,8 @@ txq_adjust_params(struct mlx5_txq_ctrl *txq_ctrl)
 			"txq_inline_mpw requirements (%u) are not satisfied (%u) on port %u",
 			txq_ctrl->txq.inlen_empw, max_inline, priv->dev_data->port_id);
 	}
+	MLX5_ASSERT(max_inline >= (MLX5_ESEG_MIN_INLINE_SIZE - MLX5_DSEG_MIN_INLINE_SIZE));
+	max_inline -= MLX5_ESEG_MIN_INLINE_SIZE - MLX5_DSEG_MIN_INLINE_SIZE;
 	if (txq_ctrl->txq.tso_en && max_inline < MLX5_MAX_TSO_HEADER) {
 		DRV_LOG(WARNING,
 			"tso header inline requirements (%u) are not satisfied (%u) on port %u",
-- 
2.34.1


                 reply	other threads:[~2025-07-02  9:35 UTC|newest]

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