From: Joshua Washington <joshwash@google.com>
To: Jeroen de Borst <jeroendb@google.com>,
Joshua Washington <joshwash@google.com>,
Junfeng Guo <junfengg@nvidia.com>,
Rushil Gupta <rushilg@google.com>
Cc: dev@dpdk.org, junfeng.guo@intel.com, stable@dpdk.org,
Ankit Garg <nktgrg@google.com>
Subject: [PATCH 5/7] net/gve: add DQO Tx descriptor limit
Date: Mon, 7 Jul 2025 16:18:09 -0700 [thread overview]
Message-ID: <20250707231812.1937260-6-joshwash@google.com> (raw)
In-Reply-To: <20250707231812.1937260-1-joshwash@google.com>
The hardware supports at most 10 data descriptors per MTU-sized segment.
GVE_TX_MAX_DATA_DESCS was defined in the initial implmenentation, but
the descriptor limit was never actually enforced.
Fixes: 4022f9999f56 ("net/gve: support basic Tx data path for DQO")
Cc: junfeng.guo@intel.com
Cc: stable@dpdk.org
Signed-off-by: Joshua Washington <joshwash@google.com>
Reviewed-by: Ankit Garg <nktgrg@google.com>
---
drivers/net/gve/gve_ethdev.c | 1 +
drivers/net/gve/gve_ethdev.h | 1 +
drivers/net/gve/gve_tx_dqo.c | 6 ++++++
3 files changed, 8 insertions(+)
diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c
index bdb7f1d075..81325ba98c 100644
--- a/drivers/net/gve/gve_ethdev.c
+++ b/drivers/net/gve/gve_ethdev.c
@@ -603,6 +603,7 @@ gve_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
.nb_max = priv->max_tx_desc_cnt,
.nb_min = priv->min_tx_desc_cnt,
.nb_align = 1,
+ .nb_mtu_seg_max = GVE_TX_MAX_DATA_DESCS,
};
dev_info->flow_type_rss_offloads = GVE_RTE_RSS_OFFLOAD_ALL;
diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h
index 35cb9062b1..195dadc4d4 100644
--- a/drivers/net/gve/gve_ethdev.h
+++ b/drivers/net/gve/gve_ethdev.h
@@ -102,6 +102,7 @@ struct gve_tx_stats {
uint64_t packets;
uint64_t bytes;
uint64_t errors;
+ uint64_t too_many_descs;
};
struct gve_rx_stats {
diff --git a/drivers/net/gve/gve_tx_dqo.c b/drivers/net/gve/gve_tx_dqo.c
index 7e03e75b20..27f98cdeb3 100644
--- a/drivers/net/gve/gve_tx_dqo.c
+++ b/drivers/net/gve/gve_tx_dqo.c
@@ -165,6 +165,12 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
break;
}
+ /* Drop packet if it doesn't adhere to hardware limits. */
+ if (!tso && nb_descs > GVE_TX_MAX_DATA_DESCS) {
+ txq->stats.too_many_descs++;
+ break;
+ }
+
if (tso) {
txd = &txr[tx_id];
gve_tx_fill_seg_desc_dqo(txd, tx_pkt);
--
2.50.0.727.gbf7dc18ff4-goog
next prev parent reply other threads:[~2025-07-07 23:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-07 23:18 [PATCH 0/7] net/gve: Tx datapath fixes for GVE DQO Joshua Washington
2025-07-07 23:18 ` [PATCH 1/7] net/gve: send whole packet when mbuf is large Joshua Washington
2025-07-07 23:18 ` [PATCH 2/7] net/gve: clean when there are insufficient Tx descs Joshua Washington
2025-07-07 23:18 ` [PATCH 3/7] net/gve: don't write zero-length descriptors Joshua Washington
2025-07-07 23:18 ` [PATCH 4/7] net/gve: validate Tx packet before sending Joshua Washington
2025-07-07 23:18 ` Joshua Washington [this message]
2025-07-07 23:18 ` [PATCH 6/7] net/gve: fix DQO TSO descriptor limit Joshua Washington
2025-07-07 23:18 ` [PATCH 7/7] net/gve: clear DQO Tx descriptors before writing Joshua Washington
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