[PATCH net] net/vmxnet3: fix mapping of mempools to queues

[Ronak Doshi <ronak.doshi@broadcom.com>]

Index bitmask variable used was uint8_t, too small for bitmask with
9 or more queues. This patch changes it to uint16_t for now, to be
same as in the Vmxnet3_MemoryRegion structure. This way txQueues
can be lesser than rxQueues and have correct mapping of memory regions.

Also, the patch fixes memory region check as 16 queues are allowed on
both RX and TX.

Fixes: 6a113992060e ("net/vmxnet3: add cmd to register memory region")
Cc: stable@dpdk.org
Signed-off-by: Ronak Doshi <ronak.doshi@broadcom.com>
Acked-by: Jochen Behrens <jochen.behrens@broadcom.com>
---
 drivers/net/vmxnet3/base/vmxnet3_defs.h |  3 +++
 drivers/net/vmxnet3/vmxnet3_ethdev.c    | 23 ++++++++++++++---------
 2 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/drivers/net/vmxnet3/base/vmxnet3_defs.h b/drivers/net/vmxnet3/base/vmxnet3_defs.h
index a6bb281d8d..15d4d88c5c 100644
--- a/drivers/net/vmxnet3/base/vmxnet3_defs.h
+++ b/drivers/net/vmxnet3/base/vmxnet3_defs.h
@@ -598,6 +598,9 @@ enum vmxnet3_intr_type {
 /* addition 1 for events */
 #define VMXNET3_MAX_INTRS      25
 
+/* Max number of queues that can request memreg, for both RX and TX. */
+#define VMXNET3_MAX_MEMREG_QUEUES  16
+
 /* Version 6 and later will use below macros */
 #define VMXNET3_EXT_MAX_TX_QUEUES  32
 #define VMXNET3_EXT_MAX_RX_QUEUES  32
diff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c
index 15ca25b187..e19aa43888 100644
--- a/drivers/net/vmxnet3/vmxnet3_ethdev.c
+++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c
@@ -801,14 +801,15 @@ vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 	Vmxnet3_DriverShared *shared = hw->shared;
 	Vmxnet3_CmdInfo *cmdInfo;
 	struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
-	uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
-	uint32_t num, i, j, size;
+	uint16_t index[VMXNET3_MAX_MEMREG_QUEUES];
+	uint16_t tx_index_mask;
+	uint32_t num, tx_num, i, j, size;
 
 	if (hw->memRegsPA == 0) {
 		const struct rte_memzone *mz;
 
 		size = sizeof(Vmxnet3_MemRegs) +
-			(VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
+			(2 * VMXNET3_MAX_MEMREG_QUEUES) *
 			sizeof(Vmxnet3_MemoryRegion);
 
 		mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
@@ -822,7 +823,9 @@ vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 		hw->memRegsPA = mz->iova;
 	}
 
-	num = hw->num_rx_queues;
+	num = RTE_MIN(hw->num_rx_queues, VMXNET3_MAX_MEMREG_QUEUES);
+	tx_num = RTE_MIN(hw->num_tx_queues, VMXNET3_MAX_MEMREG_QUEUES);
+	tx_index_mask = (uint16_t)((1UL << tx_num) - 1);
 
 	for (i = 0; i < num; i++) {
 		vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
@@ -857,13 +860,15 @@ vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 			(uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 		mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 			STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
-		mr->txQueueBits = index[i];
 		mr->rxQueueBits = index[i];
+		/* tx uses same pool, but there may be fewer tx queues */
+		mr->txQueueBits = index[i] & tx_index_mask;
 
 		PMD_INIT_LOG(INFO,
 			     "index: %u startPA: %" PRIu64 " length: %u, "
-			     "rxBits: %x",
-			     j, mr->startPA, mr->length, mr->rxQueueBits);
+			     "rxBits: %x, txBits: %x",
+			     j, mr->startPA, mr->length,
+			     mr->rxQueueBits, mr->txQueueBits);
 		j++;
 	}
 	hw->memRegs->numRegs = j;
@@ -1087,8 +1092,8 @@ vmxnet3_dev_start(struct rte_eth_dev *dev)
 	}
 
 	/* Check memregs restrictions first */
-	if (dev->data->nb_rx_queues <= VMXNET3_MAX_RX_QUEUES &&
-	    dev->data->nb_tx_queues <= VMXNET3_MAX_TX_QUEUES) {
+	if (dev->data->nb_rx_queues <= VMXNET3_MAX_MEMREG_QUEUES &&
+	    dev->data->nb_tx_queues <= VMXNET3_MAX_MEMREG_QUEUES) {
 		ret = vmxnet3_dev_setup_memreg(dev);
 		if (ret == 0) {
 			VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
-- 
2.45.2