From: Stephen Hemminger <stephen@networkplumber.org>
To: Joshua Washington <joshwash@google.com>
Cc: Jeroen de Borst <jeroendb@google.com>,
Junfeng Guo <junfengg@nvidia.com>,
dev@dpdk.org, stable@dpdk.org,
Praveen Kaligineedi <pkaligineedi@google.com>
Subject: Re: [PATCH] net/gve: properly disable interrupts on DQ
Date: Thu, 7 Aug 2025 11:06:42 -0700 [thread overview]
Message-ID: <20250807110642.3138f7eb@hermes.local> (raw)
In-Reply-To: <20250804205024.873414-1-joshwash@google.com>
On Mon, 4 Aug 2025 13:50:24 -0700
Joshua Washington <joshwash@google.com> wrote:
> When starting RX and TX queues in the DQ queue format, the driver was
> erroneously writing GVE_IRQ_MASK to the IRQ doorbell. GQ and DQ have
> different interrupt register layouts, so writing this bit is incorrect.
> Update the register write to properly enable NO_INT_MODE for DQO.
>
> Fixes: b044845bb015 ("net/gve: support queue start/stop")
> Cc: stable@dpdk.org
>
> Signed-off-by: Joshua Washington <joshwash@google.com>
> Reviewed-by: Praveen Kaligineedi <pkaligineedi@google.com>
> ---
Queued to next-net for 25.11
prev parent reply other threads:[~2025-08-07 18:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-04 20:50 Joshua Washington
2025-08-07 18:06 ` Stephen Hemminger [this message]
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