* [PATCH 1/5] common/cnxk: add CPT CQ configuration
@ 2025-10-06 5:13 Rakesh Kudurumalla
2025-10-06 5:13 ` [PATCH 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Rakesh Kudurumalla @ 2025-10-06 5:13 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
Harman Kalra
Cc: dev, jerinj, Rakesh Kudurumalla
Add new structures to used initialize and enable & disable
CPT CQ
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/hw/cpt.h | 77 ++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)
diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index e542f3a3d4..19a1b87ae6 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -36,6 +36,10 @@
#define CPT_LF_Q_SIZE (0x100ull)
#define CPT_LF_Q_INST_PTR (0x110ull)
#define CPT_LF_Q_GRP_PTR (0x120ull)
+#define CPT_LF_CQ_BASE (0x200ull)
+#define CPT_LF_CQ_SIZE (0x210ull)
+#define CPT_LF_CQ_PTR (0x220ull)
+#define CPT_LF_CQ_CTL (0x230ull)
#define CPT_LF_NQX(a) (0x400ull | (uint64_t)(a) << 3)
#define CPT_LF_CTX_CTL (0x500ull)
#define CPT_LF_CTX_FLUSH (0x510ull)
@@ -87,6 +91,24 @@ union cpt_eng_caps {
};
};
+union cpt_lf_cq_ctl {
+ uint64_t u;
+ struct cpt_lf_cq_ctl_s {
+ uint64_t ena : 1;
+ uint64_t fc_ena : 1;
+ uint64_t fc_up_crossing : 1;
+ uint64_t reserved_3_3 : 1;
+ uint64_t fc_hyst_bits : 4;
+ uint64_t reserved_8_15 : 8;
+ uint64_t entry_size : 2;
+ uint64_t reserved_18_23 : 6;
+ uint64_t dq_ack_ena : 1;
+ uint64_t cq_all : 1;
+ uint64_t reserved_26_43 : 18;
+ uint64_t busy_count : 20;
+ } s;
+};
+
union cpt_lf_ctl {
uint64_t u;
struct cpt_lf_ctl_s {
@@ -161,6 +183,16 @@ union cpt_lf_q_inst_ptr {
} s;
};
+union cpt_lf_cq_ptr {
+ uint64_t u;
+ struct cpt_lf_cq_ptr_s {
+ uint64_t count : 20;
+ uint64_t reserved_20_31 : 12;
+ uint64_t nq_ptr : 20;
+ uint64_t reserved_52_63 : 12;
+ } s;
+};
+
union cpt_lf_q_base {
uint64_t u;
struct cpt_lf_q_base_s {
@@ -180,6 +212,23 @@ union cpt_lf_q_size {
} s;
};
+union cpt_lf_cq_base {
+ uint64_t u;
+ struct cpt_lf_cq_base_s {
+ uint64_t reserved_0_6 : 7;
+ uint64_t addr : 46;
+ uint64_t reserved_53_63 : 11;
+ } s;
+};
+
+union cpt_lf_cq_size {
+ uint64_t u;
+ struct cpt_lf_cq_size_s {
+ uint64_t size : 20;
+ uint64_t reserved_20_63 : 44;
+ } s;
+};
+
union cpt_lf_misc_int {
uint64_t u;
struct cpt_lf_misc_int_s {
@@ -297,6 +346,34 @@ struct cpt_inst_s {
union cpt_inst_w7 w7;
};
+struct cpt_cq_s {
+ union cpt_cq_w0 {
+ struct {
+ uint64_t compcode : 7;
+ uint64_t doneint : 1;
+ uint64_t uc_compcode : 8;
+ uint64_t uc_info : 48;
+ } s;
+ uint64_t u64;
+ } w0;
+
+ struct {
+ uint64_t esn : 64;
+ } w1;
+
+ union cpt_cq_w2 {
+ struct {
+ uint64_t fmt : 2;
+ uint64_t rsv : 14;
+ uint64_t uc_info2 : 48;
+ } s;
+ } w2;
+
+ struct {
+ uint64_t comp_ptr : 64;
+ } w3;
+};
+
union cpt_res_s {
struct cpt_cn20k_res_s {
uint64_t compcode : 7;
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/5] common/cnxk: add params to register IRQ handler
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
@ 2025-10-06 5:13 ` Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 3/5] common/cnxk: add routines to operate CPT CQ Rakesh Kudurumalla
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Rakesh Kudurumalla @ 2025-10-06 5:13 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
Harman Kalra
Cc: dev, jerinj, Rakesh Kudurumalla
modified cpt_lf_unregister_irqs cpt_lf_register_irqs()
parameters to register and unregister call back handlers.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 53 ++++++++++++++-------------
drivers/common/cnxk/roc_cpt_priv.h | 10 ++++-
drivers/common/cnxk/roc_nix_inl.c | 6 +--
drivers/common/cnxk/roc_nix_inl_dev.c | 6 +--
4 files changed, 42 insertions(+), 33 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index d1ba2b8858..9f67a3c78c 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -44,7 +44,7 @@ cpt_lf_misc_intr_enb_dis(struct roc_cpt_lf *lf, bool enb)
lf->rbase + CPT_LF_MISC_INT_ENA_W1C);
}
-static void
+void
cpt_lf_misc_irq(void *param)
{
struct roc_cpt_lf *lf = (struct roc_cpt_lf *)param;
@@ -70,7 +70,7 @@ cpt_lf_misc_irq(void *param)
}
static int
-cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)
+cpt_lf_register_misc_irq(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb)
{
struct plt_pci_device *pci_dev = lf->pci_dev;
struct plt_intr_handle *handle;
@@ -82,7 +82,7 @@ cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)
/* Clear err interrupt */
cpt_lf_misc_intr_enb_dis(lf, false);
/* Set used interrupt vectors */
- rc = dev_irq_register(handle, cpt_lf_misc_irq, lf, vec);
+ rc = dev_irq_register(handle, misc_cb, lf, vec);
/* Enable all dev interrupt except for RQ_DISABLED */
cpt_lf_misc_intr_enb_dis(lf, true);
@@ -90,7 +90,7 @@ cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)
}
static void
-cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf)
+cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb)
{
struct plt_pci_device *pci_dev = lf->pci_dev;
struct plt_intr_handle *handle;
@@ -101,7 +101,7 @@ cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf)
vec = lf->msixoff + CPT_LF_INT_VEC_MISC;
/* Clear err interrupt */
cpt_lf_misc_intr_enb_dis(lf, false);
- dev_irq_unregister(handle, cpt_lf_misc_irq, lf, vec);
+ dev_irq_unregister(handle, misc_cb, lf, vec);
}
static void
@@ -134,7 +134,7 @@ cpt_lf_done_irq(void *param)
}
static int
-cpt_lf_register_done_irq(struct roc_cpt_lf *lf)
+cpt_lf_register_done_irq(struct roc_cpt_lf *lf, done_irq_cb_t done_cb)
{
struct plt_pci_device *pci_dev = lf->pci_dev;
struct plt_intr_handle *handle;
@@ -148,7 +148,7 @@ cpt_lf_register_done_irq(struct roc_cpt_lf *lf)
cpt_lf_done_intr_enb_dis(lf, false);
/* Set used interrupt vectors */
- rc = dev_irq_register(handle, cpt_lf_done_irq, lf, vec);
+ rc = dev_irq_register(handle, done_cb, lf, vec);
/* Enable done interrupt */
cpt_lf_done_intr_enb_dis(lf, true);
@@ -157,7 +157,7 @@ cpt_lf_register_done_irq(struct roc_cpt_lf *lf)
}
static void
-cpt_lf_unregister_done_irq(struct roc_cpt_lf *lf)
+cpt_lf_unregister_done_irq(struct roc_cpt_lf *lf, done_irq_cb_t done_cb)
{
struct plt_pci_device *pci_dev = lf->pci_dev;
struct plt_intr_handle *handle;
@@ -169,11 +169,11 @@ cpt_lf_unregister_done_irq(struct roc_cpt_lf *lf)
/* Clear done interrupt */
cpt_lf_done_intr_enb_dis(lf, false);
- dev_irq_unregister(handle, cpt_lf_done_irq, lf, vec);
+ dev_irq_unregister(handle, done_cb, lf, vec);
}
-static int
-cpt_lf_register_irqs(struct roc_cpt_lf *lf)
+int
+cpt_lf_register_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb)
{
int rc;
@@ -184,22 +184,22 @@ cpt_lf_register_irqs(struct roc_cpt_lf *lf)
}
/* Register lf err interrupt */
- rc = cpt_lf_register_misc_irq(lf);
+ rc = cpt_lf_register_misc_irq(lf, misc_cb);
if (rc)
plt_err("Error registering IRQs");
- rc = cpt_lf_register_done_irq(lf);
+ rc = cpt_lf_register_done_irq(lf, done_cb);
if (rc)
plt_err("Error registering IRQs");
return rc;
}
-static void
-cpt_lf_unregister_irqs(struct roc_cpt_lf *lf)
+void
+cpt_lf_unregister_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb)
{
- cpt_lf_unregister_misc_irq(lf);
- cpt_lf_unregister_done_irq(lf);
+ cpt_lf_unregister_misc_irq(lf, misc_cb);
+ cpt_lf_unregister_done_irq(lf, done_cb);
}
static void
@@ -685,7 +685,7 @@ cpt_get_blkaddr(struct dev *dev)
}
int
-cpt_lf_init(struct roc_cpt_lf *lf)
+cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq)
{
struct dev *dev = lf->dev;
uint64_t blkaddr;
@@ -710,9 +710,11 @@ cpt_lf_init(struct roc_cpt_lf *lf)
/* Initialize instruction queue */
cpt_iq_init(lf);
- rc = cpt_lf_register_irqs(lf);
- if (rc)
- goto disable_iq;
+ if (!skip_register_irq) {
+ rc = cpt_lf_register_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
+ if (rc)
+ goto disable_iq;
+ }
return 0;
@@ -733,7 +735,7 @@ roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf)
lf->msixoff = cpt->lf_msix_off[lf->lf_id];
lf->pci_dev = cpt->pci_dev;
- rc = cpt_lf_init(lf);
+ rc = cpt_lf_init(lf, false);
if (rc)
return rc;
@@ -943,10 +945,11 @@ roc_cpt_iq_reset(struct roc_cpt_lf *lf)
}
void
-cpt_lf_fini(struct roc_cpt_lf *lf)
+cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq)
{
/* Unregister IRQ's */
- cpt_lf_unregister_irqs(lf);
+ if (!skip_register_irq)
+ cpt_lf_unregister_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
/* Disable IQ */
roc_cpt_iq_disable(lf);
@@ -977,7 +980,7 @@ roc_cpt_lf_fini(struct roc_cpt_lf *lf)
if (lf == NULL)
return;
lf->roc_cpt->lf[lf->lf_id] = NULL;
- cpt_lf_fini(lf);
+ cpt_lf_fini(lf, false);
}
int
diff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h
index 0bd956e373..c46ef143ab 100644
--- a/drivers/common/cnxk/roc_cpt_priv.h
+++ b/drivers/common/cnxk/roc_cpt_priv.h
@@ -18,14 +18,20 @@ roc_cpt_to_cpt_priv(struct roc_cpt *roc_cpt)
return (struct cpt *)&roc_cpt->reserved[0];
}
+typedef void (*misc_irq_cb_t)(void *params);
+typedef void (*done_irq_cb_t)(void *params);
int cpt_lfs_attach(struct dev *dev, uint8_t blkaddr, bool modify,
uint16_t nb_lf);
int cpt_lfs_detach(struct dev *dev);
int cpt_lfs_alloc(struct dev *dev, uint8_t eng_grpmsk, uint8_t blk, bool inl_dev_sso,
bool ctx_ilen_valid, uint8_t ctx_ilen, bool rxc_ena, uint16_t rx_inject_qp);
int cpt_lfs_free(struct dev *dev);
-int cpt_lf_init(struct roc_cpt_lf *lf);
-void cpt_lf_fini(struct roc_cpt_lf *lf);
+int cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq);
+void cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq);
+int cpt_lf_register_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
+void cpt_lf_unregister_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
+void cpt_lf_cq_init(struct roc_cpt_lf *lf);
+void cpt_lf_misc_irq(void *params);
int cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,
uint8_t lf_id, bool ena);
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index c7637ddbdc..bc63f4ee62 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -1588,7 +1588,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)
lf->pci_dev = nix->pci_dev;
/* Setup CPT LF instruction queue */
- rc = cpt_lf_init(lf);
+ rc = cpt_lf_init(lf, false);
if (rc) {
plt_err("Failed to initialize CPT LF, rc=%d", rc);
goto lf_fini;
@@ -1678,7 +1678,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)
lf_fini:
for (j = i - 1; j >= 0; j--)
- cpt_lf_fini(&lf_base[j]);
+ cpt_lf_fini(&lf_base[j], false);
plt_free(lf_base);
lf_free:
rc |= cpt_lfs_free(dev);
@@ -1705,7 +1705,7 @@ roc_nix_inl_outb_fini(struct roc_nix *roc_nix)
/* Cleanup CPT LF instruction queue */
for (i = 0; i < nix->nb_cpt_lf; i++)
- cpt_lf_fini(&lf_base[i]);
+ cpt_lf_fini(&lf_base[i], false);
/* Free LF resources */
rc = cpt_lfs_free(dev);
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c
index 75d03c1077..dcfb893215 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev.c
@@ -451,7 +451,7 @@ nix_inl_cpt_setup(struct nix_inl_dev *inl_dev, bool inl_dev_sso)
lf->msixoff = inl_dev->cpt_msixoff[i];
lf->pci_dev = inl_dev->pci_dev;
- rc = cpt_lf_init(lf);
+ rc = cpt_lf_init(lf, false);
if (rc) {
plt_err("Failed to initialize CPT LF, rc=%d", rc);
goto lf_free;
@@ -477,7 +477,7 @@ nix_inl_cpt_setup(struct nix_inl_dev *inl_dev, bool inl_dev_sso)
return 0;
lf_fini:
for (i = 0; i < inl_dev->nb_cptlf; i++)
- cpt_lf_fini(&inl_dev->cpt_lf[i]);
+ cpt_lf_fini(&inl_dev->cpt_lf[i], false);
lf_free:
rc |= cpt_lfs_free(dev);
return rc;
@@ -501,7 +501,7 @@ nix_inl_cpt_release(struct nix_inl_dev *inl_dev)
/* Cleanup CPT LF queue */
for (i = 0; i < inl_dev->nb_cptlf; i++)
- cpt_lf_fini(&inl_dev->cpt_lf[i]);
+ cpt_lf_fini(&inl_dev->cpt_lf[i], false);
/* Free LF resources */
rc = cpt_lfs_free(dev);
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/5] common/cnxk: add routines to operate CPT CQ
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
2025-10-06 5:13 ` [PATCH 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
@ 2025-10-06 5:14 ` Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 5/5] net/cnxk: enable CPT CQ for outbound traffic Rakesh Kudurumalla
3 siblings, 0 replies; 6+ messages in thread
From: Rakesh Kudurumalla @ 2025-10-06 5:14 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
Harman Kalra
Cc: dev, jerinj, Rakesh Kudurumalla
Added routines to enable, disable and initialize
CPT CQ if cpt_cq_ena is set
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 74 ++++++++++++++++++-
drivers/common/cnxk/roc_cpt.h | 8 ++
drivers/common/cnxk/roc_cpt_priv.h | 3 +-
.../common/cnxk/roc_platform_base_symbols.c | 2 +
4 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 9f67a3c78c..5e19832b11 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -24,6 +24,7 @@
#define CPT_LF_MAX_NB_DESC 128000
#define CPT_LF_DEFAULT_NB_DESC 1024
#define CPT_LF_FC_MIN_THRESHOLD 32
+#define CQ_ENTRY_SIZE_UNIT 32
static struct cpt_int_cb {
roc_cpt_int_misc_cb_t cb;
@@ -684,6 +685,37 @@ cpt_get_blkaddr(struct dev *dev)
return reg & 0x1FFULL ? RVU_BLOCK_ADDR_CPT1 : RVU_BLOCK_ADDR_CPT0;
}
+int
+cpt_lf_cq_init(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_size lf_cq_size = {.u = 0x0};
+ union cpt_lf_cq_base lf_cq_base = {.u = 0x0};
+ uint8_t max_cq_entry_size = 0x3;
+ uintptr_t addr;
+ uint32_t len;
+
+ if (!lf->cq_size || lf->cq_entry_size > max_cq_entry_size)
+ return -EINVAL;
+
+ /* Disable CPT completion queue */
+ roc_cpt_cq_disable(lf);
+
+ /* Set command queue base address */
+ len = PLT_ALIGN(lf->cq_size * (CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
+ lf->cq_vaddr = plt_zmalloc(len, ROC_ALIGN);
+ if (lf->cq_vaddr == NULL)
+ return -ENOMEM;
+
+ addr = (uintptr_t)lf->cq_vaddr;
+
+ lf_cq_base.s.addr = addr >> 7;
+ plt_write64(lf_cq_base.u, lf->rbase + CPT_LF_CQ_BASE);
+ lf_cq_size.s.size = PLT_ALIGN(len, ROC_ALIGN);
+ plt_write64(lf_cq_size.u, lf->rbase + CPT_LF_CQ_SIZE);
+
+ return 0;
+}
+
int
cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq)
{
@@ -710,14 +742,22 @@ cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq)
/* Initialize instruction queue */
cpt_iq_init(lf);
+ if (lf->cpt_cq_ena) {
+ rc = cpt_lf_cq_init(lf);
+ if (rc)
+ goto disable_iq;
+ }
+
if (!skip_register_irq) {
rc = cpt_lf_register_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
if (rc)
- goto disable_iq;
+ goto disable_cq;
}
return 0;
+disable_cq:
+ cpt_lf_cq_fini(lf);
disable_iq:
roc_cpt_iq_disable(lf);
plt_free(iq_mem);
@@ -951,6 +991,7 @@ cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq)
if (!skip_register_irq)
cpt_lf_unregister_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
+ cpt_lf_cq_fini(lf);
/* Disable IQ */
roc_cpt_iq_disable(lf);
roc_cpt_iq_reset(lf);
@@ -960,6 +1001,17 @@ cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq)
lf->iq_vaddr = NULL;
}
+void
+cpt_lf_cq_fini(struct roc_cpt_lf *lf)
+{
+ if (!lf->cpt_cq_ena)
+ return;
+
+ roc_cpt_cq_disable(lf);
+ plt_free(lf->cq_vaddr);
+ lf->cq_vaddr = NULL;
+}
+
void
roc_cpt_lf_reset(struct roc_cpt_lf *lf)
{
@@ -1071,6 +1123,26 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
return ret;
}
+void
+roc_cpt_cq_enable(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_ctl lf_cq_ctl = {.u = 0x0};
+
+ lf_cq_ctl.s.ena = 1;
+ lf_cq_ctl.s.dq_ack_ena = lf->dq_ack_ena;
+ lf_cq_ctl.s.entry_size = lf->cq_entry_size;
+ lf_cq_ctl.s.cq_all = lf->cq_all;
+ plt_write64(lf_cq_ctl.u, lf->rbase + CPT_LF_CQ_CTL);
+}
+
+void
+roc_cpt_cq_disable(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_ctl lf_cq_ctl = {.u = 0x0};
+
+ plt_write64(lf_cq_ctl.u, lf->rbase + CPT_LF_CQ_CTL);
+}
+
void
roc_cpt_iq_disable(struct roc_cpt_lf *lf)
{
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 02f49c06b7..28dbcd0ef1 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -148,10 +148,16 @@ struct roc_cpt_lf {
/* Input parameters */
uint16_t lf_id;
uint32_t nb_desc;
+ bool dq_ack_ena;
+ bool cq_all;
+ bool cpt_cq_ena;
+ uint8_t cq_entry_size;
+ uint32_t cq_size;
/* End of Input parameters */
struct plt_pci_device *pci_dev;
struct dev *dev;
struct roc_cpt *roc_cpt;
+ uint16_t *cq_vaddr;
uintptr_t rbase;
uintptr_t lmt_base;
uint16_t msixoff;
@@ -226,6 +232,8 @@ int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
void __roc_api roc_cpt_iq_enable(struct roc_cpt_lf *lf);
+void __roc_api roc_cpt_cq_disable(struct roc_cpt_lf *lf);
+void __roc_api roc_cpt_cq_enable(struct roc_cpt_lf *lf);
int __roc_api roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, struct roc_cpt_lmtline *lmtline,
int lf_id, bool is_dual);
diff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h
index c46ef143ab..39afa1c7ff 100644
--- a/drivers/common/cnxk/roc_cpt_priv.h
+++ b/drivers/common/cnxk/roc_cpt_priv.h
@@ -30,7 +30,8 @@ int cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq);
void cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq);
int cpt_lf_register_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
void cpt_lf_unregister_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
-void cpt_lf_cq_init(struct roc_cpt_lf *lf);
+int cpt_lf_cq_init(struct roc_cpt_lf *lf);
+void cpt_lf_cq_fini(struct roc_cpt_lf *lf);
void cpt_lf_misc_irq(void *params);
int cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,
diff --git a/drivers/common/cnxk/roc_platform_base_symbols.c b/drivers/common/cnxk/roc_platform_base_symbols.c
index 7f0fe601ad..e6fa3b540b 100644
--- a/drivers/common/cnxk/roc_platform_base_symbols.c
+++ b/drivers/common/cnxk/roc_platform_base_symbols.c
@@ -50,6 +50,8 @@ RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_ctx_reload)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_reset)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_fini)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_dev_fini)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_cq_disable)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_cq_enable)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_dev_clear)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_eng_grp_add)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_iq_disable)
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 4/5] net/cnxk: handle soft expiry support
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
2025-10-06 5:13 ` [PATCH 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 3/5] common/cnxk: add routines to operate CPT CQ Rakesh Kudurumalla
@ 2025-10-06 5:14 ` Rakesh Kudurumalla
2025-10-07 6:56 ` Jerin Jacob
2025-10-06 5:14 ` [PATCH 5/5] net/cnxk: enable CPT CQ for outbound traffic Rakesh Kudurumalla
3 siblings, 1 reply; 6+ messages in thread
From: Rakesh Kudurumalla @ 2025-10-06 5:14 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
Harman Kalra
Cc: dev, jerinj, Rakesh Kudurumalla
Add routines to handle soft expiry for outbound packets
using CPT CQ mechanism. Added devargs support to inline device
to use CPT CQ.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_features.h | 5 +
drivers/common/cnxk/roc_nix_inl.h | 18 ++-
drivers/common/cnxk/roc_nix_inl_dev.c | 29 +++--
drivers/common/cnxk/roc_nix_inl_dev_irq.c | 75 +++++++++++-
drivers/common/cnxk/roc_nix_inl_priv.h | 2 +
drivers/net/cnxk/cn10k_ethdev.h | 4 +-
drivers/net/cnxk/cn10k_ethdev_sec.c | 8 +-
drivers/net/cnxk/cn20k_ethdev.h | 3 +-
drivers/net/cnxk/cn20k_ethdev_sec.c | 132 +++++++++++++++-------
drivers/net/cnxk/cnxk_ethdev_sec.c | 4 +
10 files changed, 221 insertions(+), 59 deletions(-)
diff --git a/drivers/common/cnxk/roc_features.h b/drivers/common/cnxk/roc_features.h
index 48ba2fade7..00e8b180f0 100644
--- a/drivers/common/cnxk/roc_features.h
+++ b/drivers/common/cnxk/roc_features.h
@@ -120,4 +120,9 @@ roc_feature_nix_has_plain_pkt_reassembly(void)
return roc_model_is_cn20k();
}
+static inline bool
+roc_feature_nix_has_cpt_cq_support(void)
+{
+ return roc_model_is_cn20k();
+}
#endif
diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h
index 4ef1908696..4bae261848 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -41,6 +41,19 @@
#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF
#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10
+enum nix_inl_event_type {
+ NIX_INL_CPT_CQ = 1,
+ NIX_INL_SSO,
+ NIX_INL_SOFT_EXPIRY_THRD,
+};
+
+enum comp_ptr {
+ WQE_PTR_CPTR,
+ CPTR_WQE_PTR,
+ WQE_PTR_ANTI_REPLAY,
+ CPTR_ANTI_REPLAY,
+};
+
static inline struct roc_ie_on_inb_sa *
roc_nix_inl_on_ipsec_inb_sa(uintptr_t base, uint64_t idx)
{
@@ -70,8 +83,8 @@ roc_nix_inl_on_ipsec_outb_sa_sw_rsvd(void *sa)
}
/* Inline device SSO Work callback */
-typedef void (*roc_nix_inl_sso_work_cb_t)(uint64_t *gw, void *args,
- uint32_t soft_exp_event);
+typedef void (*roc_nix_inl_sso_work_cb_t)(uint64_t *gw, void *args, enum nix_inl_event_type type,
+ void *cq_s, uint32_t port_id);
typedef int (*roc_nix_inl_meta_pool_cb_t)(uint64_t *aura_handle, uintptr_t *mpool,
uint32_t blk_sz, uint32_t nb_bufs, bool destroy,
@@ -93,6 +106,7 @@ struct roc_nix_inl_dev {
uint8_t spb_drop_pc;
uint8_t lpb_drop_pc;
uint32_t soft_exp_poll_freq; /* Polling disabled if 0 */
+ uint8_t cpt_cq_enable;
uint32_t nb_meta_bufs;
uint32_t meta_buf_sz;
uint32_t max_ipsec_rules;
diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c
index dcfb893215..bc3aa60ab9 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev.c
@@ -37,11 +37,14 @@ nix_inl_dev_pffunc_get(void)
}
static void
-nix_inl_selftest_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
+nix_inl_selftest_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type, void *cq_s,
+ uint32_t port_id)
{
uintptr_t work = gw[1];
- (void)soft_exp_event;
+ (void)type;
+ (void)cq_s;
+ (void)port_id;
*((uintptr_t *)args + (gw[0] & 0x1)) = work;
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
@@ -476,8 +479,10 @@ nix_inl_cpt_setup(struct nix_inl_dev *inl_dev, bool inl_dev_sso)
return 0;
lf_fini:
- for (i = 0; i < inl_dev->nb_cptlf; i++)
- cpt_lf_fini(&inl_dev->cpt_lf[i], false);
+ for (i = 0; i < inl_dev->nb_cptlf; i++) {
+ struct roc_cpt_lf *lf = &inl_dev->cpt_lf[i];
+ cpt_lf_fini(lf, lf->cpt_cq_ena);
+ }
lf_free:
rc |= cpt_lfs_free(dev);
return rc;
@@ -500,9 +505,12 @@ nix_inl_cpt_release(struct nix_inl_dev *inl_dev)
/* TODO: Wait for CPT/RXC queue to drain */
/* Cleanup CPT LF queue */
- for (i = 0; i < inl_dev->nb_cptlf; i++)
- cpt_lf_fini(&inl_dev->cpt_lf[i], false);
-
+ for (i = 0; i < inl_dev->nb_cptlf; i++) {
+ struct roc_cpt_lf *lf = &inl_dev->cpt_lf[i];
+ cpt_lf_fini(lf, lf->cpt_cq_ena);
+ if (lf->cpt_cq_ena)
+ cpt_lf_unregister_irqs(lf, cpt_lf_misc_irq, nix_inl_cpt_done_irq);
+ }
/* Free LF resources */
rc = cpt_lfs_free(dev);
if (!rc) {
@@ -1162,7 +1170,7 @@ inl_outb_soft_exp_poll(struct nix_inl_dev *inl_dev, uint32_t ring_idx)
if (sa != NULL) {
uint64_t tmp = ~(uint32_t)0x0;
- inl_dev->work_cb(&tmp, sa, (port_id << 8) | 0x1);
+ inl_dev->work_cb(&tmp, sa, NIX_INL_SOFT_EXPIRY_THRD, NULL, port_id);
__atomic_store_n(ring_base + tail_l + 1, 0ULL,
__ATOMIC_RELAXED);
__atomic_fetch_add((uint32_t *)ring_base, 1,
@@ -1381,6 +1389,7 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev)
inl_dev->nb_meta_bufs = roc_inl_dev->nb_meta_bufs;
inl_dev->meta_buf_sz = roc_inl_dev->meta_buf_sz;
inl_dev->soft_exp_poll_freq = roc_inl_dev->soft_exp_poll_freq;
+ inl_dev->cpt_cq_ena = roc_inl_dev->cpt_cq_enable;
inl_dev->custom_inb_sa = roc_inl_dev->custom_inb_sa;
inl_dev->nix_inb_q_bpid = -1;
inl_dev->nb_cptlf = 1;
@@ -1401,6 +1410,10 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev)
inl_dev->nb_cptlf++;
}
+ if (roc_feature_nix_has_cpt_cq_support() && inl_dev->cpt_cq_ena) {
+ inl_dev->soft_exp_poll_freq = 0;
+ inl_dev->set_soft_exp_poll = 0;
+ }
/* Attach inline inbound CPT LF to NIX has multi queue support */
if (roc_feature_nix_has_inl_multi_queue() && roc_inl_dev->nb_inb_cptlfs) {
inl_dev->nb_inb_cptlfs = roc_inl_dev->nb_inb_cptlfs;
diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
index becd7907f2..1c4822925c 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
@@ -32,7 +32,7 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)
/* Do we have any work? */
if (work) {
if (inl_dev->work_cb)
- inl_dev->work_cb(gw.u64, inl_dev->cb_args, false);
+ inl_dev->work_cb(gw.u64, inl_dev->cb_args, NIX_INL_SSO, NULL, false);
else
plt_warn("Undelivered inl dev work gw0: %p gw1: %p",
(void *)gw.u64[0], (void *)gw.u64[1]);
@@ -45,6 +45,60 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
}
+static void
+nix_inl_cpt_cq_cb(struct roc_cpt_lf *lf)
+{
+ struct roc_nix *roc_nix = (struct roc_nix *)lf->dev->roc_nix;
+ struct idev_cfg *idev = idev_get_cfg();
+ uint32_t port_id = roc_nix->port_id;
+ struct nix_inl_dev *inl_dev = NULL;
+ struct roc_ow_ipsec_outb_sa *sa;
+ union cpt_lf_cq_base cq_base;
+ union cpt_lf_cq_ptr cq_ptr;
+ struct cpt_cq_s *cq_s;
+ uint8_t fmt_msk = 0x3;
+ uint64_t nq_ptr;
+ uint32_t count;
+ uint64_t i;
+
+ if (idev)
+ inl_dev = idev->nix_inl_dev;
+
+ if (!inl_dev) {
+ plt_nix_dbg("Inline Device could not be detected");
+ return;
+ }
+
+ cq_base.u = plt_read64(lf->rbase + CPT_LF_CQ_BASE);
+ cq_ptr.u = plt_read64(lf->rbase + CPT_LF_CQ_PTR);
+ count = cq_ptr.s.count;
+
+ nq_ptr = (((cq_base.s.addr << 7)) + ((cq_ptr.s.nq_ptr - count) << 5));
+ cq_s = (struct cpt_cq_s *)nq_ptr;
+
+ for (i = 0; i < count; i++) {
+ if (cq_s->w0.s.uc_compcode && cq_s->w0.s.compcode) {
+ switch (cq_s->w2.s.fmt & fmt_msk) {
+ case WQE_PTR_CPTR:
+ sa = (struct roc_ow_ipsec_outb_sa *)cq_s->w1.esn;
+ break;
+ case CPTR_WQE_PTR:
+ sa = (struct roc_ow_ipsec_outb_sa *)cq_s->w3.comp_ptr;
+ break;
+ default:
+ plt_err("Invalid event Received ");
+ goto done;
+ }
+ uint64_t tmp = ~(uint32_t)0x0;
+ inl_dev->work_cb(&tmp, sa, NIX_INL_CPT_CQ, (void *)cq_s, port_id);
+ }
+done:
+ cq_s = cq_s + 1;
+ }
+ /* Acknowledge the number of completed requests */
+ plt_write64(count, lf->rbase + CPT_LF_DONE_ACK);
+}
+
static int
nix_inl_nix_reg_dump(struct nix_inl_dev *inl_dev)
{
@@ -102,6 +156,25 @@ nix_inl_sso_hws_irq(void *param)
plt_write64(intr, ssow_base + SSOW_LF_GWS_INT);
}
+void
+nix_inl_cpt_done_irq(void *param)
+{
+ struct roc_cpt_lf *lf = param;
+ uint64_t done_wait;
+ uint64_t intr;
+
+ /* Read the number of completed requests */
+ intr = plt_read64(lf->rbase + CPT_LF_DONE);
+ if (intr == 0)
+ return;
+
+ done_wait = plt_read64(lf->rbase + CPT_LF_DONE_WAIT);
+
+ nix_inl_cpt_cq_cb(lf);
+
+ plt_write64(done_wait, lf->rbase + CPT_LF_DONE_WAIT);
+}
+
int
nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)
{
diff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h
index 5c12fb1160..402b1514e7 100644
--- a/drivers/common/cnxk/roc_nix_inl_priv.h
+++ b/drivers/common/cnxk/roc_nix_inl_priv.h
@@ -78,6 +78,7 @@ struct nix_inl_dev {
uint32_t soft_exp_poll_freq;
uint64_t *sa_soft_exp_ring;
bool set_soft_exp_poll;
+ uint8_t cpt_cq_ena;
/* Soft expiry ring bitmap */
struct plt_bitmap *soft_exp_ring_bmap;
@@ -136,6 +137,7 @@ struct nix_inl_dev {
(BIT_ULL(51) | (ROC_CPT_DFLT_ENG_GRP_SE << 48) | \
(ROC_IE_OW_MAJOR_OP_PROCESS_INBOUND_REASS << 32 | ROC_IE_OW_INPLACE_BIT << 32))
+void nix_inl_cpt_done_irq(void *params);
int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);
void nix_inl_sso_unregister_irqs(struct nix_inl_dev *inl_dev);
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index 55d7f88716..5542217ddd 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -27,7 +27,7 @@ void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
void cn10k_eth_sec_ops_override(void);
/* SSO Work callback */
-void cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args,
- uint32_t soft_exp_event);
+void cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type, void *cq_s,
+ uint32_t port_id);
#endif /* __CN10K_ETHDEV_H__ */
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 110630596e..1327df639d 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -528,7 +528,8 @@ cnxk_pktmbuf_free_no_cache(struct rte_mbuf *mbuf)
}
void
-cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
+cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type, void *cq_s,
+ uint32_t port_id)
{
struct rte_eth_event_ipsec_desc desc;
struct cn10k_sec_sess_priv sess_priv;
@@ -545,6 +546,7 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
uint8_t port;
RTE_SET_USED(args);
+ RTE_SET_USED(cq_s);
switch ((gw[0] >> 28) & 0xF) {
case RTE_EVENT_TYPE_ETHDEV:
@@ -562,7 +564,7 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
}
/* Fall through */
default:
- if (soft_exp_event & 0x1) {
+ if (type == NIX_INL_SOFT_EXPIRY_THRD) {
sa = (struct roc_ot_ipsec_outb_sa *)args;
priv = roc_nix_inl_ot_ipsec_outb_sa_sw_rsvd(sa);
desc.metadata = (uint64_t)priv->userdata;
@@ -572,7 +574,7 @@ cn10k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
else
desc.subtype =
RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY;
- eth_dev = &rte_eth_devices[soft_exp_event >> 8];
+ eth_dev = &rte_eth_devices[port_id];
rte_eth_dev_callback_process(eth_dev,
RTE_ETH_EVENT_IPSEC, &desc);
} else {
diff --git a/drivers/net/cnxk/cn20k_ethdev.h b/drivers/net/cnxk/cn20k_ethdev.h
index 74b03b23d2..d247064964 100644
--- a/drivers/net/cnxk/cn20k_ethdev.h
+++ b/drivers/net/cnxk/cn20k_ethdev.h
@@ -27,6 +27,7 @@ void cn20k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
void cn20k_eth_sec_ops_override(void);
/* SSO Work callback */
-void cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event);
+void cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type, void *cq_s,
+ uint32_t port_id);
#endif /* __CN20K_ETHDEV_H__ */
diff --git a/drivers/net/cnxk/cn20k_ethdev_sec.c b/drivers/net/cnxk/cn20k_ethdev_sec.c
index 4284b726ee..5b0aa8a34f 100644
--- a/drivers/net/cnxk/cn20k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn20k_ethdev_sec.c
@@ -437,8 +437,79 @@ cnxk_pktmbuf_free_no_cache(struct rte_mbuf *mbuf)
} while (mbuf != NULL);
}
+static void
+cn20k_eth_sec_post_event(struct rte_eth_dev *eth_dev, struct roc_ow_ipsec_outb_sa *sa,
+ uint16_t uc_compcode, uint16_t compcode, struct rte_mbuf *mbuf)
+{
+ struct rte_eth_event_ipsec_desc desc;
+ struct cn20k_sec_sess_priv sess_priv;
+ struct cn20k_outb_priv_data *priv;
+ static uint64_t warn_cnt;
+
+ memset(&desc, 0, sizeof(desc));
+ priv = roc_nix_inl_ow_ipsec_outb_sa_sw_rsvd(sa);
+ sess_priv.u64 = 0;
+
+ if (mbuf)
+ sess_priv.u64 = *rte_security_dynfield(mbuf);
+
+ switch (uc_compcode) {
+ case ROC_IE_OW_UCC_ERR_SA_OVERFLOW:
+ desc.subtype = RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW;
+ break;
+ case ROC_IE_OW_UCC_ERR_SA_EXPIRED:
+ if (sa->w2.s.life_unit == ROC_IE_OW_SA_LIFE_UNIT_PKTS)
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_HARD_EXPIRY;
+ else
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_HARD_EXPIRY;
+ break;
+ case ROC_IE_OW_UCC_SUCCESS_SA_SOFTEXP_FIRST:
+ if (sa->w2.s.life_unit == ROC_IE_OW_SA_LIFE_UNIT_PKTS)
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY;
+ else
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY;
+ break;
+ case ROC_IE_OW_UCC_ERR_PKT_IP:
+ warn_cnt++;
+ if (warn_cnt % 10000 == 0)
+ plt_warn("Outbound error, bad ip pkt, mbuf %p,"
+ "sa_index %u (total warnings %" PRIu64 ")",
+ mbuf, sess_priv.sa_idx, warn_cnt);
+ desc.subtype = -uc_compcode;
+ break;
+ default:
+ warn_cnt++;
+ if (warn_cnt % 10000 == 0)
+ plt_warn("Outbound error, mbuf %p, sa_index %u,"
+ " compcode %x uc %x,"
+ " (total warnings %" PRIu64 ")",
+ mbuf, sess_priv.sa_idx, compcode, uc_compcode, warn_cnt);
+ desc.subtype = -uc_compcode;
+ break;
+ }
+
+ desc.metadata = (uint64_t)priv->userdata;
+ rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
+}
+
+static const char *
+get_inl_event_type(enum nix_inl_event_type type)
+{
+ switch (type) {
+ case NIX_INL_CPT_CQ:
+ return "NIX_INL_CPT_CQ";
+ case NIX_INL_SSO:
+ return "NIX_INL_SSO";
+ case NIX_INL_SOFT_EXPIRY_THRD:
+ return "NIX_INL_SOFT_EXPIRY_THRD";
+ default:
+ return "Unknown event";
+ }
+}
+
void
-cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
+cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, enum nix_inl_event_type type, void *cq_s,
+ uint32_t port_id)
{
struct rte_eth_event_ipsec_desc desc;
struct cn20k_sec_sess_priv sess_priv;
@@ -447,7 +518,6 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
struct cpt_cn20k_res_s *res;
struct rte_eth_dev *eth_dev;
struct cnxk_eth_dev *dev;
- static uint64_t warn_cnt;
uint16_t dlen_adj, rlen;
struct rte_mbuf *mbuf;
uintptr_t sa_base;
@@ -455,6 +525,7 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
uint8_t port;
RTE_SET_USED(args);
+ plt_nix_dbg("Received %s event", get_inl_event_type(type));
switch ((gw[0] >> 28) & 0xF) {
case RTE_EVENT_TYPE_ETHDEV:
@@ -472,15 +543,25 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
}
/* Fall through */
default:
- if (soft_exp_event & 0x1) {
+ if (type) {
sa = (struct roc_ow_ipsec_outb_sa *)args;
priv = roc_nix_inl_ow_ipsec_outb_sa_sw_rsvd(sa);
desc.metadata = (uint64_t)priv->userdata;
- if (sa->w2.s.life_unit == ROC_IE_OT_SA_LIFE_UNIT_PKTS)
- desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY;
- else
- desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY;
- eth_dev = &rte_eth_devices[soft_exp_event >> 8];
+ eth_dev = &rte_eth_devices[port_id];
+ if (type == NIX_INL_CPT_CQ) {
+ struct cpt_cq_s *cqs = (struct cpt_cq_s *)cq_s;
+
+ cn20k_eth_sec_post_event(eth_dev, sa,
+ (uint16_t)cqs->w0.s.uc_compcode,
+ (uint16_t)cqs->w0.s.compcode, NULL);
+ return;
+ }
+ if (type == NIX_INL_SOFT_EXPIRY_THRD) {
+ if (sa->w2.s.life_unit == ROC_IE_OW_SA_LIFE_UNIT_PKTS)
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_EXPIRY;
+ else
+ desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY;
+ }
rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
} else {
plt_err("Unknown event gw[0] = 0x%016lx, gw[1] = 0x%016lx", gw[0], gw[1]);
@@ -514,41 +595,9 @@ cn20k_eth_sec_sso_work_cb(uint64_t *gw, void *args, uint32_t soft_exp_event)
sa_base = dev->outb.sa_base;
sa = roc_nix_inl_ow_ipsec_outb_sa(sa_base, sess_priv.sa_idx);
- priv = roc_nix_inl_ow_ipsec_outb_sa_sw_rsvd(sa);
-
- memset(&desc, 0, sizeof(desc));
- switch (res->uc_compcode) {
- case ROC_IE_OT_UCC_ERR_SA_OVERFLOW:
- desc.subtype = RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW;
- break;
- case ROC_IE_OT_UCC_ERR_SA_EXPIRED:
- if (sa->w2.s.life_unit == ROC_IE_OT_SA_LIFE_UNIT_PKTS)
- desc.subtype = RTE_ETH_EVENT_IPSEC_SA_PKT_HARD_EXPIRY;
- else
- desc.subtype = RTE_ETH_EVENT_IPSEC_SA_BYTE_HARD_EXPIRY;
- break;
- case ROC_IE_OT_UCC_ERR_PKT_IP:
- warn_cnt++;
- if (warn_cnt % 10000 == 0)
- plt_warn("Outbound error, bad ip pkt, mbuf %p,"
- " sa_index %u (total warnings %" PRIu64 ")",
- mbuf, sess_priv.sa_idx, warn_cnt);
- desc.subtype = -res->uc_compcode;
- break;
- default:
- warn_cnt++;
- if (warn_cnt % 10000 == 0)
- plt_warn("Outbound error, mbuf %p, sa_index %u,"
- " compcode %x uc %x,"
- " (total warnings %" PRIu64 ")",
- mbuf, sess_priv.sa_idx, res->compcode, res->uc_compcode, warn_cnt);
- desc.subtype = -res->uc_compcode;
- break;
- }
+ cn20k_eth_sec_post_event(eth_dev, sa, res->uc_compcode, res->compcode, mbuf);
- desc.metadata = (uint64_t)priv->userdata;
- rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_IPSEC, &desc);
cnxk_pktmbuf_free_no_cache(mbuf);
}
@@ -625,7 +674,6 @@ cn20k_eth_sec_outb_sa_misc_fill(struct roc_nix *roc_nix, struct roc_ow_ipsec_out
sa->ctx.err_ctl.s.address = ring_addr >> 3;
sa->w0.s.ctx_id = ((uintptr_t)sa_cptr >> 51) & 0x1ff;
}
-
return 0;
}
diff --git a/drivers/net/cnxk/cnxk_ethdev_sec.c b/drivers/net/cnxk/cnxk_ethdev_sec.c
index ac6ee79f78..59a00408ad 100644
--- a/drivers/net/cnxk/cnxk_ethdev_sec.c
+++ b/drivers/net/cnxk/cnxk_ethdev_sec.c
@@ -22,6 +22,7 @@
#define CNXK_NIX_INL_RX_INJ_ENABLE "rx_inj_ena"
#define CNXK_NIX_CUSTOM_INB_SA "custom_inb_sa"
#define CNXK_NIX_NB_INL_INB_QS "nb_inl_inb_qs"
+#define CNXK_NIX_INL_CPT_CQ_ENABLE "cpt_cq_enable"
/* Default soft expiry poll freq in usec */
#define CNXK_NIX_SOFT_EXP_POLL_FREQ_DFLT 100
@@ -567,6 +568,7 @@ nix_inl_parse_devargs(struct rte_devargs *devargs,
uint32_t meta_buf_sz = 0;
uint8_t rx_inj_ena = 0;
uint8_t selftest = 0;
+ uint8_t cpt_cq_enable = 0;
memset(&cpt_channel, 0, sizeof(cpt_channel));
@@ -595,6 +597,7 @@ nix_inl_parse_devargs(struct rte_devargs *devargs,
rte_kvargs_process(kvlist, CNXK_NIX_INL_RX_INJ_ENABLE, &parse_val_u8, &rx_inj_ena);
rte_kvargs_process(kvlist, CNXK_NIX_CUSTOM_INB_SA, &parse_val_u8, &custom_inb_sa);
rte_kvargs_process(kvlist, CNXK_NIX_NB_INL_INB_QS, &parse_val_u8, &nb_inl_inb_qs);
+ rte_kvargs_process(kvlist, CNXK_NIX_INL_CPT_CQ_ENABLE, &parse_val_u8, &cpt_cq_enable);
rte_kvargs_free(kvlist);
null_devargs:
@@ -607,6 +610,7 @@ nix_inl_parse_devargs(struct rte_devargs *devargs,
inl_dev->nb_meta_bufs = nb_meta_bufs;
inl_dev->meta_buf_sz = meta_buf_sz;
inl_dev->soft_exp_poll_freq = soft_exp_poll_freq;
+ inl_dev->cpt_cq_enable = cpt_cq_enable;
inl_dev->max_ipsec_rules = max_ipsec_rules;
if (roc_feature_nix_has_rx_inject())
inl_dev->rx_inj_ena = rx_inj_ena;
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 5/5] net/cnxk: enable CPT CQ for outbound traffic
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
` (2 preceding siblings ...)
2025-10-06 5:14 ` [PATCH 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
@ 2025-10-06 5:14 ` Rakesh Kudurumalla
3 siblings, 0 replies; 6+ messages in thread
From: Rakesh Kudurumalla @ 2025-10-06 5:14 UTC (permalink / raw)
To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
Harman Kalra
Cc: dev, jerinj, Rakesh Kudurumalla
enable CPT CQ in cpt instruction to read outbound
error packets from CQ
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_nix_inl.c | 18 ++++++++++++++++++
drivers/common/cnxk/roc_nix_inl.h | 1 +
.../common/cnxk/roc_platform_base_symbols.c | 1 +
drivers/net/cnxk/cn20k_ethdev_sec.c | 10 ++++++----
drivers/net/cnxk/cn20k_rxtx.h | 2 +-
drivers/net/cnxk/cn20k_tx.h | 11 +++++++----
6 files changed, 34 insertions(+), 9 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index bc63f4ee62..70ab8001e1 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -2563,3 +2563,21 @@ roc_nix_inl_custom_meta_pool_cb_register(roc_nix_inl_custom_meta_pool_cb_t cb)
{
custom_meta_pool_cb = cb;
}
+
+uint8_t
+roc_nix_inl_is_cq_ena(struct roc_nix *roc_nix)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+ struct nix_inl_dev *inl_dev;
+
+ PLT_SET_USED(roc_nix);
+ if (idev != NULL) {
+ inl_dev = idev->nix_inl_dev;
+ if (inl_dev)
+ return inl_dev->cpt_cq_ena;
+ else
+ return 0;
+ } else {
+ return 0;
+ }
+}
diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h
index 4bae261848..7970ac2258 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -213,6 +213,7 @@ int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr,
void __roc_api roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix, FILE *file);
uint64_t __roc_api roc_nix_inl_eng_caps_get(struct roc_nix *roc_nix);
void *__roc_api roc_nix_inl_dev_qptr_get(uint8_t qid);
+uint8_t __roc_api roc_nix_inl_is_cq_ena(struct roc_nix *roc_nix);
enum roc_nix_cpt_lf_stats_type {
ROC_NIX_CPT_LF_STATS_INL_DEV,
diff --git a/drivers/common/cnxk/roc_platform_base_symbols.c b/drivers/common/cnxk/roc_platform_base_symbols.c
index e6fa3b540b..16ab37655d 100644
--- a/drivers/common/cnxk/roc_platform_base_symbols.c
+++ b/drivers/common/cnxk/roc_platform_base_symbols.c
@@ -281,6 +281,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_eng_caps_get)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_custom_meta_pool_cb_register)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_xaq_realloc)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_qptr_get)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_is_cq_ena)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_stats_get)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_stats_reset)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_init)
diff --git a/drivers/net/cnxk/cn20k_ethdev_sec.c b/drivers/net/cnxk/cn20k_ethdev_sec.c
index 5b0aa8a34f..fd83f64c5d 100644
--- a/drivers/net/cnxk/cn20k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn20k_ethdev_sec.c
@@ -664,6 +664,9 @@ cn20k_eth_sec_outb_sa_misc_fill(struct roc_nix *roc_nix, struct roc_ow_ipsec_out
{
uint64_t *ring_base, ring_addr;
+ if (roc_nix_inl_is_cq_ena(roc_nix))
+ goto done;
+
if (ipsec_xfrm->life.bytes_soft_limit | ipsec_xfrm->life.packets_soft_limit) {
ring_base = roc_nix_inl_outb_ring_base_get(roc_nix);
if (ring_base == NULL)
@@ -674,6 +677,7 @@ cn20k_eth_sec_outb_sa_misc_fill(struct roc_nix *roc_nix, struct roc_ow_ipsec_out
sa->ctx.err_ctl.s.address = ring_addr >> 3;
sa->w0.s.ctx_id = ((uintptr_t)sa_cptr >> 51) & 0x1ff;
}
+done:
return 0;
}
@@ -909,8 +913,7 @@ cn20k_eth_sec_session_create(void *device, struct rte_security_session_conf *con
sess_priv.chksum =
(!ipsec->options.ip_csum_enable << 1 | !ipsec->options.l4_csum_enable);
sess_priv.dec_ttl = ipsec->options.dec_ttl;
- if (roc_feature_nix_has_inl_ipsec_mseg() && dev->outb.cpt_eng_caps & BIT_ULL(35))
- sess_priv.nixtx_off = 1;
+ sess_priv.cpt_cq_ena = roc_nix_inl_is_cq_ena(&dev->nix);
/* Pointer from eth_sec -> outb_sa */
eth_sec->sa = outb_sa;
@@ -1106,9 +1109,8 @@ cn20k_eth_sec_session_update(void *device, struct rte_security_session *sess,
sess_priv.chksum =
(!ipsec->options.ip_csum_enable << 1 | !ipsec->options.l4_csum_enable);
sess_priv.dec_ttl = ipsec->options.dec_ttl;
- if (roc_feature_nix_has_inl_ipsec_mseg() && dev->outb.cpt_eng_caps & BIT_ULL(35))
- sess_priv.nixtx_off = 1;
+ sess_priv.cpt_cq_ena = roc_nix_inl_is_cq_ena(&dev->nix);
rc = roc_nix_inl_ctx_write(&dev->nix, outb_sa_dptr, eth_sec->sa, eth_sec->inb,
sizeof(struct roc_ow_ipsec_outb_sa));
if (rc)
diff --git a/drivers/net/cnxk/cn20k_rxtx.h b/drivers/net/cnxk/cn20k_rxtx.h
index 10da42680f..5fc4f8656d 100644
--- a/drivers/net/cnxk/cn20k_rxtx.h
+++ b/drivers/net/cnxk/cn20k_rxtx.h
@@ -106,7 +106,7 @@ struct __rte_packed_begin cn20k_sec_sess_priv {
uint16_t partial_len : 10;
uint16_t chksum : 2;
uint16_t dec_ttl : 1;
- uint16_t nixtx_off : 1;
+ uint16_t cpt_cq_ena : 1;
uint16_t rsvd : 2;
};
diff --git a/drivers/net/cnxk/cn20k_tx.h b/drivers/net/cnxk/cn20k_tx.h
index 3fb2e1f4e1..9e48744831 100644
--- a/drivers/net/cnxk/cn20k_tx.h
+++ b/drivers/net/cnxk/cn20k_tx.h
@@ -444,14 +444,15 @@ cn20k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1,
uint32_t pkt_len, dlen_adj, rlen;
uint8_t l3l4type, chksum;
uint64x2_t cmd01, cmd23;
+ uint64_t sa, cpt_cq_ena;
uint8_t l2_len, l3_len;
uintptr_t dptr, nixtx;
uint64_t ucode_cmd[4];
uint64_t *laddr, w0;
uint16_t tag;
- uint64_t sa;
sess_priv.u64 = *rte_security_dynfield(m);
+ cpt_cq_ena = sess_priv.cpt_cq_ena;
if (flags & NIX_TX_NEED_SEND_HDR_W1) {
/* Extract l3l4type either from il3il4type or ol3ol4type */
@@ -530,7 +531,7 @@ cn20k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1,
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
/* CPT_RES_S is 16B above NIXTX */
- cmd01 = vsetq_lane_u64(nixtx - 16, cmd01, 1);
+ cmd01 = vsetq_lane_u64((nixtx - 16) | cpt_cq_ena << 63, cmd01, 1);
/* Return nixtx addr */
*nixtx_addr = nixtx;
@@ -577,15 +578,16 @@ cn20k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr, uin
uint8_t l3l4type, chksum;
uint64x2_t cmd01, cmd23;
union nix_send_sg_s *sg;
+ uint64_t sa, cpt_cq_ena;
uint8_t l2_len, l3_len;
uintptr_t dptr, nixtx;
uint64_t ucode_cmd[4];
uint64_t *laddr, w0;
uint16_t tag;
- uint64_t sa;
/* Move to our line from base */
sess_priv.u64 = *rte_security_dynfield(m);
+ cpt_cq_ena = sess_priv.cpt_cq_ena;
send_hdr = (struct nix_send_hdr_s *)cmd;
if (flags & NIX_TX_NEED_EXT_HDR)
sg = (union nix_send_sg_s *)&cmd[4];
@@ -668,7 +670,8 @@ cn20k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr, uin
cmd01 = vdupq_n_u64(0);
cmd01 = vsetq_lane_u64(w0, cmd01, 0);
/* CPT_RES_S is 16B above NIXTX */
- cmd01 = vsetq_lane_u64(nixtx - 16, cmd01, 1);
+ /* CQ_ENA for cpt */
+ cmd01 = vsetq_lane_u64((nixtx - 16) | cpt_cq_ena << 63, cmd01, 1);
/* Return nixtx addr */
*nixtx_addr = nixtx;
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 4/5] net/cnxk: handle soft expiry support
2025-10-06 5:14 ` [PATCH 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
@ 2025-10-07 6:56 ` Jerin Jacob
0 siblings, 0 replies; 6+ messages in thread
From: Jerin Jacob @ 2025-10-07 6:56 UTC (permalink / raw)
To: Rakesh Kudurumalla, Nithin Kumar Dabilpuram,
Kiran Kumar Kokkilagadda, Sunil Kumar Kori,
Satha Koteswara Rao Kottidi, Harman Kalra
Cc: dev, Rakesh Kudurumalla
> -----Original Message-----
> From: Rakesh Kudurumalla <rkudurumalla@marvell.com>
> Sent: Monday, October 6, 2025 10:44 AM
> To: Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar
> Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori
> <skori@marvell.com>; Satha Koteswara Rao Kottidi
> <skoteshwar@marvell.com>; Harman Kalra <hkalra@marvell.com>
> Cc: dev@dpdk.org; Jerin Jacob <jerinj@marvell.com>; Rakesh Kudurumalla
> <rkudurumalla@marvell.com>
> Subject: [PATCH 4/5] net/cnxk: handle soft expiry support
>
> Add routines to handle soft expiry for outbound packets using CPT CQ
> mechanism. Added devargs support to inline device to use CPT CQ.
>
> Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
> ---
> drivers/common/cnxk/roc_features.h | 5 +
> drivers/common/cnxk/roc_nix_inl.h | 18 ++-
> drivers/common/cnxk/roc_nix_inl_dev.c | 29 +++--
> drivers/common/cnxk/roc_nix_inl_dev_irq.c | 75 +++++++++++-
> drivers/common/cnxk/roc_nix_inl_priv.h | 2 +
> drivers/net/cnxk/cn10k_ethdev.h | 4 +-
> drivers/net/cnxk/cn10k_ethdev_sec.c | 8 +-
> drivers/net/cnxk/cn20k_ethdev.h | 3 +-
> drivers/net/cnxk/cn20k_ethdev_sec.c | 132 +++++++++++++++-------
> drivers/net/cnxk/cnxk_ethdev_sec.c | 4 +
Update doc/guides/nics/cnxk.rst for this new devags
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-10-07 6:56 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
2025-10-06 5:13 ` [PATCH 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 3/5] common/cnxk: add routines to operate CPT CQ Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
2025-10-07 6:56 ` Jerin Jacob
2025-10-06 5:14 ` [PATCH 5/5] net/cnxk: enable CPT CQ for outbound traffic Rakesh Kudurumalla
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