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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SA2PEPF00003F64.mail.protection.outlook.com (10.167.248.39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9275.10 via Frontend Transport; Thu, 30 Oct 2025 07:42:02 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 30 Oct 2025 00:41:47 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 30 Oct 2025 00:41:43 -0700 From: Gregory Etelson To: CC: , , , , Dariusz Sosnowski , "Viacheslav Ovsiienko" , Bing Zhao , Ori Kam , Suanming Mou , Matan Azrad , Michael Baum Subject: [PATCH v2] net/mlx5: fix external Rx and Tx queues access Date: Thu, 30 Oct 2025 09:39:22 +0200 Message-ID: <20251030073922.205190-1-getelson@nvidia.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250731060849.18117-1-getelson@nvidia.com> References: <20250731060849.18117-1-getelson@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F64:EE_|IA0PR12MB7750:EE_ X-MS-Office365-Filtering-Correlation-Id: e1597bde-0ccf-4e02-98c6-08de1787d114 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Oct 2025 07:42:02.7573 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e1597bde-0ccf-4e02-98c6-08de1787d114 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7750 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org mlx5_ext_rxq_get() and mlx5_ext_txq_get() functions did not return NULL value if query index was not referencing external queue. As a result, calling functions did not expect the NULL on return. External Rx queue: - In mlx5_ext_rxq_get() remove assert and return NULL if a queue index does not point to a valid external queue. - In mlx5_ext_rxq_verify() validate that probed queue index references a valid extern queue. External Tx queue: - In mlx5_ext_txq_get() remove assert and return NULL if a queue index does not point to a valid external queue. - In mlx5_ext_txq_verify() validate that probed queue index references a valid extern queue. Fixes: 311b17e669ab ("net/mlx5: support queue/RSS actions for external Rx queue") Signed-off-by: Gregory Etelson Acked-by: Dariusz Sosnowski --- v2: fixed MinGW compiler warnings --- drivers/net/mlx5/mlx5_devx.c | 5 +++++ drivers/net/mlx5/mlx5_flow.h | 2 ++ drivers/net/mlx5/mlx5_rxq.c | 17 ++++++++++------- drivers/net/mlx5/mlx5_txq.c | 10 +++++----- 4 files changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 673c9f3902..523b53d713 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -761,6 +761,11 @@ mlx5_devx_ind_table_create_rqt_attr(struct rte_eth_dev *dev, struct mlx5_external_q *ext_rxq = mlx5_ext_rxq_get(dev, queues[i]); + if (ext_rxq == NULL) { + rte_errno = EINVAL; + mlx5_free(rqt_attr); + return NULL; + } rqt_attr->rq_list[i] = ext_rxq->hw_id; } else { struct mlx5_rxq_priv *rxq = diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index ff61706054..6ced0fd741 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2039,6 +2039,8 @@ flow_hw_get_sqn(struct rte_eth_dev *dev, uint16_t tx_queue, uint32_t *sqn) } if (mlx5_is_external_txq(dev, tx_queue)) { ext_txq = mlx5_ext_txq_get(dev, tx_queue); + if (ext_txq == NULL) + return EINVAL; *sqn = ext_txq->hw_id; return 0; } diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 1425886a22..677e8491d3 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -2212,7 +2212,8 @@ mlx5_ext_rxq_ref(struct rte_eth_dev *dev, uint16_t idx) { struct mlx5_external_q *rxq = mlx5_ext_rxq_get(dev, idx); - rte_atomic_fetch_add_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed); + if (rxq != NULL) + rte_atomic_fetch_add_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed); return rxq; } @@ -2232,7 +2233,9 @@ mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx) { struct mlx5_external_q *rxq = mlx5_ext_rxq_get(dev, idx); - return rte_atomic_fetch_sub_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed) - 1; + return rxq != NULL ? + rte_atomic_fetch_sub_explicit(&rxq->refcnt, 1, rte_memory_order_relaxed) - 1 : + UINT32_MAX; } /** @@ -2251,8 +2254,8 @@ mlx5_ext_rxq_get(struct rte_eth_dev *dev, uint16_t idx) { struct mlx5_priv *priv = dev->data->dev_private; - MLX5_ASSERT(mlx5_is_external_rxq(dev, idx)); - return &priv->ext_rxqs[idx - RTE_PMD_MLX5_EXTERNAL_RX_QUEUE_ID_MIN]; + return mlx5_is_external_rxq(dev, idx) ? + &priv->ext_rxqs[idx - RTE_PMD_MLX5_EXTERNAL_RX_QUEUE_ID_MIN] : NULL; } /** @@ -2415,7 +2418,6 @@ int mlx5_ext_rxq_verify(struct rte_eth_dev *dev) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_external_q *rxq; uint32_t i; int ret = 0; @@ -2423,8 +2425,9 @@ mlx5_ext_rxq_verify(struct rte_eth_dev *dev) return 0; for (i = RTE_PMD_MLX5_EXTERNAL_RX_QUEUE_ID_MIN; i <= UINT16_MAX ; ++i) { - rxq = mlx5_ext_rxq_get(dev, i); - if (rxq->refcnt < 2) + struct mlx5_external_q *rxq = mlx5_ext_rxq_get(dev, i); + + if (rxq == NULL || rxq->refcnt < 2) continue; DRV_LOG(DEBUG, "Port %u external RxQ %u still referenced.", dev->data->port_id, i); diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index b090d8274d..2aa2475a8a 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -1281,8 +1281,8 @@ mlx5_ext_txq_get(struct rte_eth_dev *dev, uint16_t idx) { struct mlx5_priv *priv = dev->data->dev_private; - MLX5_ASSERT(mlx5_is_external_txq(dev, idx)); - return &priv->ext_txqs[idx - MLX5_EXTERNAL_TX_QUEUE_ID_MIN]; + return mlx5_is_external_txq(dev, idx) ? + &priv->ext_txqs[idx - MLX5_EXTERNAL_TX_QUEUE_ID_MIN] : NULL; } /** @@ -1298,7 +1298,6 @@ int mlx5_ext_txq_verify(struct rte_eth_dev *dev) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_external_q *txq; uint32_t i; int ret = 0; @@ -1306,8 +1305,9 @@ mlx5_ext_txq_verify(struct rte_eth_dev *dev) return 0; for (i = MLX5_EXTERNAL_TX_QUEUE_ID_MIN; i <= UINT16_MAX ; ++i) { - txq = mlx5_ext_txq_get(dev, i); - if (txq->refcnt < 2) + struct mlx5_external_q *txq = mlx5_ext_txq_get(dev, i); + + if (txq == NULL || txq->refcnt < 2) continue; DRV_LOG(DEBUG, "Port %u external TxQ %u still referenced.", dev->data->port_id, i); -- 2.51.0