From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Nithinsen Kaithakadan <nkaithakadan@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Rakesh Kudurumalla <rkudurumalla@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH] crypto/cnxk: add CPT CQ support for cn20k
Date: Tue, 11 Nov 2025 16:46:43 +0530 [thread overview]
Message-ID: <20251111111643.2279586-1-ktejasree@marvell.com> (raw)
Adding CPT CQ support for cn20k.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 3 +-
drivers/common/cnxk/roc_cpt.h | 2 +
drivers/crypto/cnxk/cn20k_cryptodev_ops.c | 5 +-
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 83 ++++++++++++++++-------
drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 5 +-
5 files changed, 67 insertions(+), 31 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 4e610109b4..83e0c9896b 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -24,7 +24,6 @@
#define CPT_LF_MAX_NB_DESC 128000
#define CPT_LF_DEFAULT_NB_DESC 1024
#define CPT_LF_FC_MIN_THRESHOLD 32
-#define CQ_ENTRY_SIZE_UNIT 32
static struct cpt_int_cb {
roc_cpt_int_misc_cb_t cb;
@@ -704,7 +703,7 @@ cpt_lf_cq_init(struct roc_cpt_lf *lf)
roc_cpt_cq_disable(lf);
/* Set command queue base address */
- len = PLT_ALIGN(lf->cq_size * (CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
+ len = PLT_ALIGN(lf->cq_size * (ROC_CPT_CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
lf->cq_vaddr = plt_zmalloc(len, ROC_ALIGN);
if (lf->cq_vaddr == NULL)
return -ENOMEM;
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 41a681e2a5..67956758be 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -133,6 +133,8 @@
#define ROC_CPTR_CACHE_LINE_SZ 256
#define ROC_CPTR_ALIGN ROC_CPTR_CACHE_LINE_SZ
+#define ROC_CPT_CQ_ENTRY_SIZE_UNIT 32
+
enum {
ROC_CPT_REVISION_ID_83XX = 0,
ROC_CPT_REVISION_ID_96XX_B0 = 1,
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
index d56f6b9d63..18100ff1f8 100644
--- a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
@@ -261,8 +261,9 @@ cn20k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct
}
inst[0].res_addr = (uint64_t)&infl_req->res;
- rte_atomic_store_explicit((RTE_ATOMIC(uint64_t) *)(&infl_req->res.u64[0]),
- res.u64[0], rte_memory_order_relaxed);
+ inst[0].cq_ena = 1;
+ rte_atomic_store_explicit((RTE_ATOMIC(uint64_t) *)(&infl_req->res.u64[0]), res.u64[0],
+ rte_memory_order_relaxed);
infl_req->cop = op;
inst[0].w7.u64 = w7;
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 7dc4c684cc..370f311dd3 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -199,14 +199,19 @@ cnxk_cpt_dev_start(struct rte_cryptodev *dev)
struct cnxk_cpt_vf *vf = dev->data->dev_private;
struct roc_cpt *roc_cpt = &vf->cpt;
uint16_t nb_lf = roc_cpt->nb_lf;
+ struct roc_cpt_lf *lf;
uint16_t qp_id;
for (qp_id = 0; qp_id < nb_lf; qp_id++) {
+ lf = vf->cpt.lf[qp_id];
+
/* Application may not setup all queue pair */
- if (roc_cpt->lf[qp_id] == NULL)
+ if (lf == NULL)
continue;
- roc_cpt_iq_enable(roc_cpt->lf[qp_id]);
+ roc_cpt_iq_enable(lf);
+ if (lf->cpt_cq_ena)
+ roc_cpt_cq_enable(lf);
}
return 0;
@@ -218,13 +223,17 @@ cnxk_cpt_dev_stop(struct rte_cryptodev *dev)
struct cnxk_cpt_vf *vf = dev->data->dev_private;
struct roc_cpt *roc_cpt = &vf->cpt;
uint16_t nb_lf = roc_cpt->nb_lf;
+ struct roc_cpt_lf *lf;
uint16_t qp_id;
for (qp_id = 0; qp_id < nb_lf; qp_id++) {
- if (roc_cpt->lf[qp_id] == NULL)
+ lf = vf->cpt.lf[qp_id];
+ if (lf == NULL)
continue;
roc_cpt_iq_disable(roc_cpt->lf[qp_id]);
+ if (lf->cpt_cq_ena)
+ roc_cpt_cq_disable(lf);
}
}
@@ -347,7 +356,7 @@ static struct cnxk_cpt_qp *
cnxk_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
uint32_t iq_len)
{
- const struct rte_memzone *pq_mem;
+ const struct rte_memzone *pq_mem = NULL;
char name[RTE_MEMZONE_NAMESIZE];
struct cnxk_cpt_qp *qp;
uint32_t len;
@@ -363,23 +372,25 @@ cnxk_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
}
/* For pending queue */
- len = iq_len * sizeof(struct cpt_inflight_req);
+ if (!roc_model_is_cn20k()) {
+ len = iq_len * sizeof(struct cpt_inflight_req);
- qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
- qp_id);
+ qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id, qp_id);
- pq_mem = rte_memzone_reserve_aligned(name, len, rte_socket_id(),
- RTE_MEMZONE_SIZE_HINT_ONLY |
- RTE_MEMZONE_256MB,
- RTE_CACHE_LINE_SIZE);
- if (pq_mem == NULL) {
- plt_err("Could not allocate reserved memzone");
- goto qp_free;
- }
+ pq_mem = rte_memzone_reserve_aligned(name, len, rte_socket_id(),
+ RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
+ RTE_CACHE_LINE_SIZE);
+ if (pq_mem == NULL) {
+ plt_err("Could not allocate reserved memzone");
+ goto qp_free;
+ }
- va = pq_mem->addr;
+ va = pq_mem->addr;
- memset(va, 0, len);
+ memset(va, 0, len);
+
+ qp->pend_q.req_queue = pq_mem->addr;
+ }
ret = cnxk_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
if (ret) {
@@ -388,14 +399,14 @@ cnxk_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
}
/* Initialize pending queue */
- qp->pend_q.req_queue = pq_mem->addr;
qp->pend_q.head = 0;
qp->pend_q.tail = 0;
return qp;
pq_mem_free:
- rte_memzone_free(pq_mem);
+ if (!roc_model_is_cn20k())
+ rte_memzone_free(pq_mem);
qp_free:
rte_free(qp);
return NULL;
@@ -410,14 +421,15 @@ cnxk_cpt_qp_destroy(const struct rte_cryptodev *dev, struct cnxk_cpt_qp *qp)
cnxk_cpt_metabuf_mempool_destroy(qp);
- qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
- qp->lf.lf_id);
+ if (!roc_model_is_cn20k()) {
+ qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id, qp->lf.lf_id);
- pq_mem = rte_memzone_lookup(name);
+ pq_mem = rte_memzone_lookup(name);
- ret = rte_memzone_free(pq_mem);
- if (ret)
- return ret;
+ ret = rte_memzone_free(pq_mem);
+ if (ret)
+ return ret;
+ }
rte_free(qp);
@@ -487,6 +499,13 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
qp->lf.lf_id = qp_id;
qp->lf.nb_desc = nb_desc;
+ if (roc_model_is_cn20k()) {
+ qp->lf.cpt_cq_ena = true;
+ qp->lf.dq_ack_ena = false;
+ /* CQ entry size is 128B(32 << 2) */
+ qp->lf.cq_entry_size = 2;
+ qp->lf.cq_size = nb_desc;
+ }
ret = roc_cpt_lf_init(roc_cpt, &qp->lf);
if (ret < 0) {
@@ -497,6 +516,17 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
qp->pend_q.pq_mask = qp->lf.nb_desc - 1;
+ if (roc_model_is_cn20k()) {
+ if (qp->lf.cq_vaddr == NULL) {
+ plt_err("Could not initialize completion queue");
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ qp->pend_q.req_queue = PLT_PTR_ADD(
+ qp->lf.cq_vaddr, ROC_CPT_CQ_ENTRY_SIZE_UNIT << qp->lf.cq_entry_size);
+ }
+
roc_cpt->lf[qp_id] = &qp->lf;
ret = roc_cpt_lmtline_init(roc_cpt, &qp->lmtline, qp_id, true);
@@ -544,6 +574,9 @@ cnxk_cpt_queue_pair_reset(struct rte_cryptodev *dev, uint16_t qp_id,
roc_cpt_lf_reset(lf);
roc_cpt_iq_enable(lf);
+ if (lf->cpt_cq_ena)
+ roc_cpt_cq_enable(lf);
+
return 0;
}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index 03af1029ce..32fc7a26fc 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -54,13 +54,15 @@ struct cpt_qp_meta_info {
struct __rte_aligned(ROC_ALIGN) cpt_inflight_req {
union cpt_res_s res;
+ uint8_t rsvd[16];
+ uint8_t meta[META_LEN];
union {
void *opaque;
struct rte_crypto_op *cop;
struct rte_event_vector *vec;
};
+ void *qp;
void *mdata;
- uint8_t meta[META_LEN];
uint8_t op_flags;
#ifdef CPT_INST_DEBUG_ENABLE
uint8_t scatter_sz;
@@ -69,7 +71,6 @@ struct __rte_aligned(ROC_ALIGN) cpt_inflight_req {
uint8_t *dptr;
uint8_t *rptr;
#endif
- void *qp;
};
PLT_STATIC_ASSERT(sizeof(struct cpt_inflight_req) == ROC_CACHE_LINE_SZ);
--
2.25.1
reply other threads:[~2025-11-11 11:16 UTC|newest]
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