From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C2C9E454EF; Tue, 25 Jun 2024 13:28:12 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 39D7D432A0; Tue, 25 Jun 2024 13:19:26 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by mails.dpdk.org (Postfix) with ESMTP id B590A42EF1 for ; Tue, 25 Jun 2024 13:17:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719314270; x=1750850270; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vhlE/5VJep9318FVUNhLDRVIAPlh8v69jBDFEWe4tqU=; b=HKzywuhWcPhFynTAfy+ECftJh9nWcyhs7bdW3+2/w2+06dE1oOjUmTCB X223zTAd9s4p7GSChFvcKyIAe5aT5RhrtbDhG6mX0bNX+FSsE6t6kNDdf mUNZRsVAooMlbqQBwZgX/lmt4LyMyW1ujeO5mIE8nJlAuHfxXd0aUW/AH LH9n3ABPxROnAfKwI3Aj5SQxkJ4B1igCDXr6DSC3Nn4g43KxIsxqHG9gK N6tUo5qemTlL9uMFy9Ybj0RKuhEnrndg8b2b6qzfJVO64aYo33ZhttgWT +VHRAZHjw6buiA4M9UvJoTV/7afzJZuCOZJHaVMHSQ7X8Pd6toW6AHyIG Q==; X-CSE-ConnectionGUID: wiFGiHp/ShGvGUhv3+WIcA== X-CSE-MsgGUID: ++oZYQPdQcu2KURxvzW2Dw== X-IronPort-AV: E=McAfee;i="6700,10204,11113"; a="16080585" X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="16080585" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2024 04:17:49 -0700 X-CSE-ConnectionGUID: 11Ymw/MDS9iBvzqDOyd3lQ== X-CSE-MsgGUID: v398PqqCQoCT8DT3Wx0ewg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="43719683" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa009.jf.intel.com with ESMTP; 25 Jun 2024 04:17:47 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com, ian.stokes@intel.com Subject: [PATCH v3 104/129] net/ice/base: align code to base driver Date: Tue, 25 Jun 2024 12:13:49 +0100 Message-ID: <2028038b7ca2e2d1c8d643a406472b60dd3dd961.1719313663.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently, there are some miscellaneous changes that are missing from DPDK that are present in base driver code. This patch aligns our code to that of base driver, with following changes happening: - Comment fixes - Whitespace/line break alignment - Moving function definitions within headers - Moving functions within .c files - Moving case statements within code - Moving structure definitions - Adding missing constants - Renaming functions - Moving variable declarations - Removing useless !! - Removing unused code that was removed from base driver Signed-off-by: Anatoly Burakov --- drivers/net/ice/base/ice_adminq_cmd.h | 51 +- drivers/net/ice/base/ice_bitops.h | 4 +- drivers/net/ice/base/ice_common.c | 10 +- drivers/net/ice/base/ice_common.h | 1 - drivers/net/ice/base/ice_controlq.c | 7 +- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_ddp.c | 3 +- drivers/net/ice/base/ice_devids.h | 8 +- drivers/net/ice/base/ice_fdir.c | 22 +- drivers/net/ice/base/ice_flex_pipe.c | 106 ++--- drivers/net/ice/base/ice_flex_type.h | 1 - drivers/net/ice/base/ice_flow.c | 91 ++-- drivers/net/ice/base/ice_flow.h | 17 +- drivers/net/ice/base/ice_hw_autogen.h | 2 +- drivers/net/ice/base/ice_lan_tx_rx.h | 3 +- drivers/net/ice/base/ice_nvm.c | 19 +- drivers/net/ice/base/ice_nvm.h | 1 - drivers/net/ice/base/ice_parser.c | 20 +- drivers/net/ice/base/ice_parser.h | 18 +- drivers/net/ice/base/ice_parser_rt.c | 22 +- drivers/net/ice/base/ice_parser_rt.h | 2 +- drivers/net/ice/base/ice_protocol_type.h | 11 +- drivers/net/ice/base/ice_ptp_consts.h | 3 +- drivers/net/ice/base/ice_ptp_hw.c | 263 ++++++----- drivers/net/ice/base/ice_ptp_hw.h | 7 +- drivers/net/ice/base/ice_sched.h | 10 +- drivers/net/ice/base/ice_switch.c | 572 ++++++++++++----------- drivers/net/ice/base/ice_switch.h | 9 +- drivers/net/ice/base/ice_type.h | 3 +- drivers/net/ice/base/ice_xlt_kb.c | 4 +- 30 files changed, 639 insertions(+), 652 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 716a9f06b8..3c00b65e15 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -109,7 +109,6 @@ struct ice_aqc_list_caps { struct ice_aqc_list_caps_elem { __le16 cap; #define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005 -#define ICE_AQC_MAX_VALID_FUNCTIONS 0x8 #define ICE_AQC_CAPS_VSI 0x0017 #define ICE_AQC_CAPS_DCB 0x0018 #define ICE_AQC_CAPS_RSS 0x0040 @@ -758,7 +757,7 @@ struct ice_aqc_recipe_content { #define ICE_AQ_RECIPE_ID_S 0 #define ICE_AQ_RECIPE_ID_M (0x3F << ICE_AQ_RECIPE_ID_S) #define ICE_AQ_RECIPE_ID_IS_ROOT BIT(7) -#define ICE_AQ_SW_ID_LKUP_IDX 0 +#define ICE_AQ_SW_ID_LKUP_IDX 0 u8 lkup_indx[5]; #define ICE_AQ_RECIPE_LKUP_DATA_S 0 #define ICE_AQ_RECIPE_LKUP_DATA_M (0x3F << ICE_AQ_RECIPE_LKUP_DATA_S) @@ -1000,25 +999,6 @@ struct ice_sw_rule_vsi_list { }; #pragma pack() -#pragma pack(1) -/* Query VSI list command/response entry */ -struct ice_sw_rule_vsi_list_query { - __le16 index; - u8 vsi_list[DIVIDE_AND_ROUND_UP(ICE_MAX_VSI, BITS_PER_BYTE)]; -}; -#pragma pack() - -/* PFC Ignore (direct 0x0301) - * The command and response use the same descriptor structure - */ -struct ice_aqc_pfc_ignore { - u8 tc_bitmap; - u8 cmd_flags; /* unused in response */ -#define ICE_AQC_PFC_IGNORE_SET BIT(7) -#define ICE_AQC_PFC_IGNORE_CLEAR 0 - u8 reserved[14]; -}; - /* Query PFC Mode (direct 0x0302) * Set PFC Mode (direct 0x0303) */ @@ -1033,17 +1013,6 @@ struct ice_aqc_set_query_pfc_mode { u8 rsvd[15]; }; -/* Set DCB Parameters (direct 0x0306) */ -struct ice_aqc_set_dcb_params { - u8 cmd_flags; /* unused in response */ -#define ICE_AQC_LINK_UP_DCB_CFG BIT(0) -#define ICE_AQC_PERSIST_DCB_CFG BIT(1) - u8 valid_flags; /* unused in response */ -#define ICE_AQC_LINK_UP_DCB_CFG_VALID BIT(0) -#define ICE_AQC_PERSIST_DCB_CFG_VALID BIT(1) - u8 rsvd[14]; -}; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1123,9 +1092,9 @@ struct ice_aqc_txsched_elem { u8 generic; #define ICE_AQC_ELEM_GENERIC_MODE_M 0x1 #define ICE_AQC_ELEM_GENERIC_PRIO_S 0x1 -#define ICE_AQC_ELEM_GENERIC_PRIO_M (0x7 << ICE_AQC_ELEM_GENERIC_PRIO_S) +#define ICE_AQC_ELEM_GENERIC_PRIO_M (0x7 << ICE_AQC_ELEM_GENERIC_PRIO_S) #define ICE_AQC_ELEM_GENERIC_SP_S 0x4 -#define ICE_AQC_ELEM_GENERIC_SP_M (0x1 << ICE_AQC_ELEM_GENERIC_SP_S) +#define ICE_AQC_ELEM_GENERIC_SP_M (0x1 << ICE_AQC_ELEM_GENERIC_SP_S) #define ICE_AQC_ELEM_GENERIC_ADJUST_VAL_S 0x5 #define ICE_AQC_ELEM_GENERIC_ADJUST_VAL_M \ (0x3 << ICE_AQC_ELEM_GENERIC_ADJUST_VAL_S) @@ -2039,10 +2008,11 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_REVERT_LAST_ACTIV BIT(6) /* Write Activate only */ #define ICE_AQC_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3) #define ICE_AQC_NVM_FLASH_ONLY BIT(7) -#define ICE_AQC_NVM_POR_FLAG 0 /* Used by NVM Write completion on ARQ */ -#define ICE_AQC_NVM_PERST_FLAG 1 -#define ICE_AQC_NVM_EMPR_FLAG 2 -#define ICE_AQC_NVM_EMPR_ENA BIT(0) +#define ICE_AQC_NVM_RESET_LVL_M MAKEMASK(0x3, 0) /* Write reply only */ +#define ICE_AQC_NVM_POR_FLAG 0 +#define ICE_AQC_NVM_PERST_FLAG 1 +#define ICE_AQC_NVM_EMPR_FLAG 2 +#define ICE_AQC_NVM_EMPR_ENA BIT(0) /* Write Activate reply only */ __le16 module_typeid; __le16 length; #define ICE_AQC_NVM_ERASE_LEN 0xFFFF @@ -2914,7 +2884,6 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) __le16 q_id[STRUCT_HACK_VAR_LEN]; }; - #pragma pack() /* Tx LAN Queues Cleanup Event (0x0C31) */ @@ -2994,7 +2963,7 @@ struct ice_pkg_ver { }; #define ICE_PKG_NAME_SIZE 32 -#define ICE_SEG_ID_SIZE 28 +#define ICE_SEG_ID_SIZE 28 #define ICE_SEG_NAME_SIZE 28 struct ice_aqc_get_pkg_info { @@ -3228,10 +3197,8 @@ struct ice_aq_desc { struct ice_aqc_nvm nvm; struct ice_aqc_nvm_cfg nvm_cfg; struct ice_aqc_nvm_checksum nvm_checksum; - struct ice_aqc_pfc_ignore pfc_ignore; struct ice_aqc_nvm_sanitization sanitization; struct ice_aqc_set_query_pfc_mode set_query_pfc_mode; - struct ice_aqc_set_dcb_params set_dcb_params; struct ice_aqc_lldp_get_mib lldp_get_mib; struct ice_aqc_lldp_set_mib_change lldp_set_event; struct ice_aqc_lldp_add_delete_tlv lldp_add_delete_tlv; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index 5c17bcb674..85e14a2358 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -375,7 +375,7 @@ static inline bool ice_is_any_bit_set(ice_bitmap_t *bitmap, u16 size) } /** - * ice_cp_bitmap - copy bitmaps. + * ice_cp_bitmap - copy bitmaps * @dst: bitmap destination * @src: bitmap to copy from * @size: Size of the bitmaps in bits @@ -433,7 +433,7 @@ ice_bitmap_hweight(ice_bitmap_t *bm, u16 size) } /** - * ice_cmp_bitmap - compares two bitmaps. + * ice_cmp_bitmap - compares two bitmaps * @bmp1: the bitmap to compare * @bmp2: the bitmap to compare with bmp1 * @size: Size of the bitmaps in bits diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 3e4c176706..bdae775f18 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -5,7 +5,6 @@ #include "ice_common.h" #include "ice_sched.h" #include "ice_adminq_cmd.h" - #include "ice_flow.h" #include "ice_ptp_hw.h" #include "ice_switch.h" @@ -598,6 +597,7 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, cmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM); cmd->param0 |= CPU_TO_LE16(report_mode); + status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd); ice_debug(hw, ICE_DBG_LINK, "get phy caps dump\n"); @@ -694,6 +694,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, if (!pi) return ICE_ERR_PARAM; hw = pi->hw; + li_old = &pi->phy.link_info_old; li = &pi->phy.link_info; hw_fc_info = &pi->fc; @@ -1130,6 +1131,7 @@ int ice_init_hw(struct ice_hw *hw) goto err_unroll_sched; /* Get MAC information */ + /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, sizeof(struct ice_aqc_manage_mac_read_resp)); @@ -1156,6 +1158,7 @@ int ice_init_hw(struct ice_hw *hw) status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base); if (status) goto err_unroll_fltr_mgmt_struct; + status = ice_init_hw_tbls(hw); if (status) goto err_unroll_fltr_mgmt_struct; @@ -2084,7 +2087,7 @@ int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading) * When attempting to acquire the Global Config Lock, the driver can * learn of three states: * 1) 0 - acquired lock, and can perform download package - * 2) ICE_ERR_AQ_ERROR - did not get lock, driver should fail to load + * 2) ICE_ERR_AQ_ERROR - did not get lock, driver should fail to load * 3) ICE_ERR_AQ_NO_WORK - did not get lock, but another driver has * successfully downloaded the package; the driver does * not have to download the package and can continue @@ -3345,7 +3348,7 @@ void ice_clear_pxe_mode(struct ice_hw *hw) } /** - * ice_aq_set_port_params - set physical port parameters. + * ice_aq_set_port_params - set physical port parameters * @pi: pointer to the port info struct * @bad_frame_vsi: defines the VSI to which bad frames are forwarded * @save_bad_pac: if set packets with errors are forwarded to the bad frames VSI @@ -3359,7 +3362,6 @@ int ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi, bool save_bad_pac, bool pad_short_pac, bool double_vlan, struct ice_sq_cd *cd) - { struct ice_aqc_set_port_params *cmd; struct ice_hw *hw = pi->hw; diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index 78e071e14e..d1ceb406de 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -187,7 +187,6 @@ int ice_get_link_default_override(struct ice_link_default_override_tlv *ldo, struct ice_port_info *pi); bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps); - enum ice_fc_mode ice_caps_to_fc_mode(u8 caps); enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options); int diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 436551a82d..af27dc8542 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -470,7 +470,7 @@ ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq) } /** - * ice_aq_ver_check - Check the reported AQ API version. + * ice_aq_ver_check - Check the reported AQ API version * @hw: pointer to the hardware structure * * Checks if the driver should load on a given AQ API version. @@ -658,8 +658,9 @@ static bool ice_is_sbq_supported(struct ice_hw *hw) * * NOTE: this function does not destroy the control queue locks. */ -static void ice_shutdown_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type, - bool unloading) +static void +ice_shutdown_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type, + bool unloading) { struct ice_ctl_q_info *cq; diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 24e34d9579..d5257172cc 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -87,7 +87,6 @@ struct ice_sq_cd { struct ice_aq_desc *wb_desc; }; - /* rq event information */ struct ice_rq_event_info { struct ice_aq_desc desc; diff --git a/drivers/net/ice/base/ice_ddp.c b/drivers/net/ice/base/ice_ddp.c index f82e5a387f..24506dfaea 100644 --- a/drivers/net/ice/base/ice_ddp.c +++ b/drivers/net/ice/base/ice_ddp.c @@ -1034,7 +1034,6 @@ static enum ice_ddp_state ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver) (pkg_ver->major == ICE_PKG_SUPP_VER_MAJ && pkg_ver->minor < ICE_PKG_SUPP_VER_MNR)) return ICE_DDP_PKG_FILE_VERSION_TOO_LOW; - return ICE_DDP_PKG_SUCCESS; } @@ -2335,8 +2334,8 @@ int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len) struct ice_pkg_hdr *pkg_hdr; enum ice_ddp_state state; u16 i, size = 0, offset; - int status; u32 reg = 0; + int status; u8 flags; if (!buf || !len) diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index 33e6cc6ade..07fb9aca0b 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -6,6 +6,8 @@ #define _ICE_DEVIDS_H_ /* Device IDs */ +#define ICE_DEV_ID_E822_SI_DFLT 0x1888 +/* Intel(R) Ethernet Connection E823-L for backplane */ #define ICE_DEV_ID_E823L_BACKPLANE 0x124C /* Intel(R) Ethernet Connection E823-L for SFP */ #define ICE_DEV_ID_E823L_SFP 0x124D @@ -53,8 +55,6 @@ /* Intel(R) Ethernet Controller E810-XXV for SFP */ #define ICE_DEV_ID_E810_XXV_SFP 0x159B /* Intel(R) Ethernet Connection E823-C for backplane */ -#define ICE_DEV_ID_E822_SI_DFLT 0x1888 -/* Intel(R) Ethernet Connection E823-L for backplane */ #define ICE_DEV_ID_E823C_BACKPLANE 0x188A /* Intel(R) Ethernet Connection E823-C for QSFP */ #define ICE_DEV_ID_E823C_QSFP 0x188B @@ -87,9 +87,9 @@ /* Intel(R) Ethernet Connection E825-C for backplane */ #define ICE_DEV_ID_E825C_BACKPLANE 0x579C /* Intel(R) Ethernet Connection E825-C for QSFP */ -#define ICE_DEV_ID_E825C_QSFP 0x579D +#define ICE_DEV_ID_E825C_QSFP 0x579D /* Intel(R) Ethernet Connection E825-C for SFP */ -#define ICE_DEV_ID_E825C_SFP 0x579E +#define ICE_DEV_ID_E825C_SFP 0x579E /* Intel(R) Ethernet Connection E825-C 1GbE */ #define ICE_DEV_ID_E825C_SGMII 0x579F #define ICE_DEV_ID_C825X 0x0DCD diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 75fae4408f..f62313c559 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -6,6 +6,7 @@ #include "ice_fdir.h" /* These are training packet headers used to program flow director filters. */ + static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -3587,7 +3588,7 @@ int ice_get_fdir_cnt_all(struct ice_hw *hw) } /** - * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer. + * ice_pkt_insert_ipv6_addr - insert a be32 IPv6 address into a memory buffer * @pkt: packet buffer * @offset: offset into buffer * @addr: IPv6 address to convert and insert into pkt at offset @@ -3602,12 +3603,12 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** - * ice_pkt_insert_u6_qfi - insert a u6 value qfi into a memory buffer for gtpu + * ice_pkt_insert_u6_qfi - insert a u6 value QFI into a memory buffer for GTPU * @pkt: packet buffer * @offset: offset into buffer * @data: 8 bit value to convert and insert into pkt at offset * - * This function is designed for inserting qfi (6 bits) for gtpu. + * This function is designed for inserting QFI (6 bits) for GTPU. */ static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data) { @@ -3618,7 +3619,7 @@ static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data) } /** - * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer * @pkt: packet buffer * @offset: offset into buffer * @data: 8 bit value to convert and insert into pkt at offset @@ -3629,7 +3630,7 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** - * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for TC ipv6. + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for TC IPv6 * @pkt: packet buffer * @offset: offset into buffer * @data: 8 bit value to convert and insert into pkt at offset @@ -3651,7 +3652,7 @@ static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) } /** - * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. + * ice_pkt_insert_u16 - insert a be16 value into a memory buffer * @pkt: packet buffer * @offset: offset into buffer * @data: 16 bit value to convert and insert into pkt at offset @@ -3662,7 +3663,7 @@ static void ice_pkt_insert_u16(u8 *pkt, int offset, __be16 data) } /** - * ice_pkt_insert_u32 - insert a be32 value into a memory buffer. + * ice_pkt_insert_u32 - insert a be32 value into a memory buffer * @pkt: packet buffer * @offset: offset into buffer * @data: 32 bit value to convert and insert into pkt at offset @@ -3673,7 +3674,7 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer. + * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer * @pkt: packet buffer * @addr: MAC address to convert and insert into pkt at offset */ @@ -4101,7 +4102,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); - ice_pkt_insert_mac_addr(loc + ETH_ALEN, input->ext_data.src_mac); + ice_pkt_insert_mac_addr(loc + ETH_ALEN, + input->ext_data.src_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -4223,6 +4225,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.dst_ip); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); ice_pkt_insert_mac_addr(loc + ETH_ALEN, input->ext_data.src_mac); diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 413b6f8ece..6dd5588f85 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2366,6 +2366,7 @@ void ice_free_hw_tbls(struct ice_hw *hw) ice_free_prof_map(hw, i); ice_destroy_lock(&es->prof_map_lock); + ice_free_flow_profs(hw, i); ice_destroy_lock(&hw->fl_profs_locks[i]); @@ -3169,13 +3170,13 @@ static void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id) wr32(hw, GLQF_FDSWAP(prof_id, i), raw_swap); ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n", - prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap); + prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap); /* write the FDIR inset register set */ wr32(hw, GLQF_FDINSET(prof_id, i), raw_in); ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n", - prof_id, i, GLQF_FDINSET(prof_id, i), raw_in); + prof_id, i, GLQF_FDINSET(prof_id, i), raw_in); } } @@ -4251,8 +4252,8 @@ int ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) { struct ice_vsig_prof *tmp1, *del1; + struct ice_chs_chg *tmp, *del; struct LIST_HEAD_TYPE union_lst; - struct ice_chs_chg *tmp, *del; struct LIST_HEAD_TYPE chg; int status; u16 vsig; @@ -4382,6 +4383,55 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) return status; } +/** + * ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry + * @hw: pointer to the HW struct + * @blk: HW block + * @dest_vsi_handle: dest VSI handle + * @fdir_vsi_handle: fdir programming VSI handle + * @id: profile id (handle) + * + * Calling this function will update the hardware tables to enable the + * profile indicated by the ID parameter for the VSIs specified in the VSI + * array. Once successfully called, the flow will be enabled. + */ +int +ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk, + u16 dest_vsi_handle, u16 fdir_vsi_handle, int id) +{ + int status = 0; + u16 vsi_num; + + vsi_num = ice_get_hw_vsi_num(hw, dest_vsi_handle); + status = ice_add_prof_id_flow(hw, blk, vsi_num, id); + if (status) { + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for main VSI flow entry, %d\n", + status); + goto err_add_prof; + } + + if (blk != ICE_BLK_FD) + return status; + + vsi_num = ice_get_hw_vsi_num(hw, fdir_vsi_handle); + status = ice_add_prof_id_flow(hw, blk, vsi_num, id); + if (status) { + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for ctrl VSI flow entry, %d\n", + status); + goto err_add_entry; + } + + return status; + +err_add_entry: + vsi_num = ice_get_hw_vsi_num(hw, dest_vsi_handle); + ice_rem_prof_id_flow(hw, blk, vsi_num, id); +err_add_prof: + ice_flow_rem_prof(hw, blk, id); + + return status; +} + /** * ice_rem_prof_from_list - remove a profile from list * @hw: pointer to the HW struct @@ -4418,8 +4468,8 @@ int ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) { struct ice_vsig_prof *tmp1, *del1; + struct ice_chs_chg *tmp, *del; struct LIST_HEAD_TYPE chg, copy; - struct ice_chs_chg *tmp, *del; int status; u16 vsig; @@ -4536,51 +4586,3 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) return status; } -/** - * ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry - * @hw: pointer to the HW struct - * @blk: HW block - * @dest_vsi_handle: dest VSI handle - * @fdir_vsi_handle: fdir programming VSI handle - * @id: profile id (handle) - * - * Calling this function will update the hardware tables to enable the - * profile indicated by the ID parameter for the VSIs specified in the VSI - * array. Once successfully called, the flow will be enabled. - */ -int -ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk, - u16 dest_vsi_handle, u16 fdir_vsi_handle, int id) -{ - int status = 0; - u16 vsi_num; - - vsi_num = ice_get_hw_vsi_num(hw, dest_vsi_handle); - status = ice_add_prof_id_flow(hw, blk, vsi_num, id); - if (status) { - ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for main VSI flow entry, %d\n", - status); - goto err_add_prof; - } - - if (blk != ICE_BLK_FD) - return status; - - vsi_num = ice_get_hw_vsi_num(hw, fdir_vsi_handle); - status = ice_add_prof_id_flow(hw, blk, vsi_num, id); - if (status) { - ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for ctrl VSI flow entry, %d\n", - status); - goto err_add_entry; - } - - return status; - -err_add_entry: - vsi_num = ice_get_hw_vsi_num(hw, dest_vsi_handle); - ice_rem_prof_id_flow(hw, blk, vsi_num, id); -err_add_prof: - ice_flow_rem_prof(hw, blk, id); - - return status; -} diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index c83479d6fa..f563ce7bce 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -643,7 +643,6 @@ struct ice_prof_tcam_entry { u8 key[ICE_TCAM_KEY_SZ]; u8 prof_id; }; - #pragma pack() struct ice_prof_id_section { diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 8473c2b964..0d64a5bb1e 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -196,7 +196,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { /* ICE_FLOW_FIELD_IDX_GTPU_DWN_QFI */ ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_DWN, 22, ICE_FLOW_FLD_SZ_GTP_QFI, 0x3f00), - /* PPPOE */ + /* PPPoE */ /* ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_PPPOE, 2, ICE_FLOW_FLD_SZ_PPPOE_SESS_ID), @@ -798,7 +798,7 @@ static const u32 ice_ptypes_gtpu[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -/* Packet types for pppoe */ +/* Packet types for PPPoE */ static const u32 ice_ptypes_pppoe[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -834,7 +834,7 @@ static const u32 ice_ptypes_pfcp_session[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -/* Packet types for l2tpv3 */ +/* Packet types for L2TPv3 */ static const u32 ice_ptypes_l2tpv3[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -846,7 +846,7 @@ static const u32 ice_ptypes_l2tpv3[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -/* Packet types for esp */ +/* Packet types for ESP */ static const u32 ice_ptypes_esp[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000003, 0x00000000, 0x00000000, @@ -858,7 +858,7 @@ static const u32 ice_ptypes_esp[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; -/* Packet types for ah */ +/* Packet types for AH */ static const u32 ice_ptypes_ah[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000C, 0x00000000, 0x00000000, @@ -1002,12 +1002,11 @@ struct ice_flow_prof_params { #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ ICE_FLOW_SEG_HDR_SCTP) -/* mask for L4 protocols that are NOT part of IPV4/6 OTHER PTYPE groups */ +/* mask for L4 protocols that are NOT part of IPv4/6 OTHER PTYPE groups */ #define ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP) @@ -1016,8 +1015,7 @@ struct ice_flow_prof_params { * @segs: array of one or more packet segments that describe the flow * @segs_cnt: number of packet segments provided */ -static int -ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt) +static int ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt) { u8 i; @@ -1068,7 +1066,7 @@ static u16 ice_flow_calc_seg_sz(struct ice_flow_prof_params *params, u8 seg) else if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_ARP) sz += ICE_FLOW_PROT_HDR_SZ_ARP; else if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDRS_L4_MASK) - /* A L3 header is required if L4 is specified */ + /* An L3 header is required if L4 is specified */ return 0; /* L4 headers */ @@ -1132,17 +1130,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); } + if ((hdrs & ICE_FLOW_SEG_HDR_IPV4) && (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) { - src = i ? - (const ice_bitmap_t *)ice_ptypes_ipv4_il : + src = i ? (const ice_bitmap_t *)ice_ptypes_ipv4_il : (const ice_bitmap_t *)ice_ptypes_ipv4_ofos_all; ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); } else if ((hdrs & ICE_FLOW_SEG_HDR_IPV6) && (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) { - src = i ? - (const ice_bitmap_t *)ice_ptypes_ipv6_il : + src = i ? (const ice_bitmap_t *)ice_ptypes_ipv6_il : (const ice_bitmap_t *)ice_ptypes_ipv6_ofos_all; ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); @@ -1299,11 +1296,9 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) if (hdrs & ICE_FLOW_SEG_HDR_PFCP) { if (hdrs & ICE_FLOW_SEG_HDR_PFCP_NODE) - src = - (const ice_bitmap_t *)ice_ptypes_pfcp_node; + src = (const ice_bitmap_t *)ice_ptypes_pfcp_node; else - src = - (const ice_bitmap_t *)ice_ptypes_pfcp_session; + src = (const ice_bitmap_t *)ice_ptypes_pfcp_session; ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); @@ -1547,8 +1542,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_ICMP_TYPE: case ICE_FLOW_FIELD_IDX_ICMP_CODE: /* ICMP type and code share the same extraction seq. entry */ - prot_id = (params->prof->segs[seg].hdrs & - ICE_FLOW_SEG_HDR_IPV4) ? + prot_id = (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV4) ? ICE_PROT_ICMP_IL : ICE_PROT_ICMPV6_IL; sib = fld == ICE_FLOW_FIELD_IDX_ICMP_TYPE ? ICE_FLOW_FIELD_IDX_ICMP_CODE : @@ -3529,7 +3523,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id, * @entry_h: handle to the flow entry to be removed */ int ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, - u64 entry_h) + u64 entry_h) { struct ice_flow_entry *entry; struct ice_flow_prof *prof; @@ -3698,7 +3692,7 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, * vsi handle and disassociates the vsi from the flow profile. */ int ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, - u64 prof_id) + u64 prof_id) { struct ice_flow_prof *prof = NULL; int status = 0; @@ -3788,20 +3782,20 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u8 seg_cnt, /* set outer most header */ if (cfg->hdr_type == ICE_RSS_INNER_HEADERS_W_OUTER_IPV4) segs[ICE_RSS_OUTER_HEADERS].hdrs |= ICE_FLOW_SEG_HDR_IPV4 | - ICE_FLOW_SEG_HDR_IPV_FRAG | - ICE_FLOW_SEG_HDR_IPV_OTHER; + ICE_FLOW_SEG_HDR_IPV_FRAG | + ICE_FLOW_SEG_HDR_IPV_OTHER; else if (cfg->hdr_type == ICE_RSS_INNER_HEADERS_W_OUTER_IPV6) segs[ICE_RSS_OUTER_HEADERS].hdrs |= ICE_FLOW_SEG_HDR_IPV6 | - ICE_FLOW_SEG_HDR_IPV_FRAG | - ICE_FLOW_SEG_HDR_IPV_OTHER; + ICE_FLOW_SEG_HDR_IPV_FRAG | + ICE_FLOW_SEG_HDR_IPV_OTHER; else if (cfg->hdr_type == ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE) segs[ICE_RSS_OUTER_HEADERS].hdrs |= ICE_FLOW_SEG_HDR_IPV4 | - ICE_FLOW_SEG_HDR_GRE | - ICE_FLOW_SEG_HDR_IPV_OTHER; + ICE_FLOW_SEG_HDR_GRE | + ICE_FLOW_SEG_HDR_IPV_OTHER; else if (cfg->hdr_type == ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE) segs[ICE_RSS_OUTER_HEADERS].hdrs |= ICE_FLOW_SEG_HDR_IPV6 | - ICE_FLOW_SEG_HDR_GRE | - ICE_FLOW_SEG_HDR_IPV_OTHER; + ICE_FLOW_SEG_HDR_GRE | + ICE_FLOW_SEG_HDR_IPV_OTHER; if (seg->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & ~ICE_FLOW_RSS_HDRS_INNER_MASK & ~ICE_FLOW_SEG_HDR_IPV_OTHER & @@ -3907,11 +3901,14 @@ ice_get_rss_hdr_type(struct ice_flow_prof *prof) if (prof->segs_cnt == ICE_FLOW_SEG_SINGLE) { hdr_type = ICE_RSS_OUTER_HEADERS; } else if (prof->segs_cnt == ICE_FLOW_SEG_MAX) { - if (prof->segs[ICE_RSS_OUTER_HEADERS].hdrs == ICE_FLOW_SEG_HDR_NONE) + const struct ice_flow_seg_info *s; + + s = &prof->segs[ICE_RSS_OUTER_HEADERS]; + if (s->hdrs == ICE_FLOW_SEG_HDR_NONE) hdr_type = ICE_RSS_INNER_HEADERS; - if (prof->segs[ICE_RSS_OUTER_HEADERS].hdrs & ICE_FLOW_SEG_HDR_IPV4) + if (s->hdrs & ICE_FLOW_SEG_HDR_IPV4) hdr_type = ICE_RSS_INNER_HEADERS_W_OUTER_IPV4; - if (prof->segs[ICE_RSS_OUTER_HEADERS].hdrs & ICE_FLOW_SEG_HDR_IPV6) + if (s->hdrs & ICE_FLOW_SEG_HDR_IPV6) hdr_type = ICE_RSS_INNER_HEADERS_W_OUTER_IPV6; } @@ -4018,13 +4015,14 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) * [62:63] - Encapsulation flag: * 0 if non-tunneled * 1 if tunneled - * 2 for tunneled with outer ipv4 - * 3 for tunneled with outer ipv6 + * 2 for tunneled with outer IPv4 + * 3 for tunneled with outer IPv6 */ -#define ICE_FLOW_GEN_PROFID(hash, hdr, encap) \ - ((u64)(((u64)(hash) & ICE_FLOW_PROF_HASH_M) | \ +#define ICE_FLOW_GEN_PROFID(hash, hdr, encap) \ + ((u64)(((u64)(hash) & ICE_FLOW_PROF_HASH_M) | \ (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \ - (((u64)(encap) << ICE_FLOW_PROF_ENCAP_S) & ICE_FLOW_PROF_ENCAP_M))) + (((u64)(encap) << ICE_FLOW_PROF_ENCAP_S) & \ + ICE_FLOW_PROF_ENCAP_M))) static void ice_rss_config_xor_word(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst) @@ -4263,7 +4261,8 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, int status; segs_cnt = (cfg->hdr_type == ICE_RSS_OUTER_HEADERS) ? - ICE_FLOW_SEG_SINGLE : ICE_FLOW_SEG_MAX; + ICE_FLOW_SEG_SINGLE : + ICE_FLOW_SEG_MAX; segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, sizeof(*segs)); @@ -4382,8 +4381,8 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, struct ice_rss_hash_cfg local_cfg; int status; - if (!ice_is_vsi_valid(hw, vsi_handle) || - !cfg || cfg->hdr_type > ICE_RSS_ANY_HEADERS || + if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg || + cfg->hdr_type > ICE_RSS_ANY_HEADERS || cfg->hash_flds == ICE_HASH_INVALID) return ICE_ERR_PARAM; @@ -4424,7 +4423,8 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, int status; segs_cnt = (cfg->hdr_type == ICE_RSS_OUTER_HEADERS) ? - ICE_FLOW_SEG_SINGLE : ICE_FLOW_SEG_MAX; + ICE_FLOW_SEG_SINGLE : + ICE_FLOW_SEG_MAX; segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, sizeof(*segs)); if (!segs) @@ -4479,8 +4479,8 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, struct ice_rss_hash_cfg local_cfg; int status; - if (!ice_is_vsi_valid(hw, vsi_handle) || - !cfg || cfg->hdr_type > ICE_RSS_ANY_HEADERS || + if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg || + cfg->hdr_type > ICE_RSS_ANY_HEADERS || cfg->hash_flds == ICE_HASH_INVALID) return ICE_ERR_PARAM; @@ -4491,7 +4491,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, } else { local_cfg.hdr_type = ICE_RSS_OUTER_HEADERS; status = ice_rem_rss_cfg_sync(hw, vsi_handle, &local_cfg); - if (!status) { local_cfg.hdr_type = ICE_RSS_INNER_HEADERS; status = ice_rem_rss_cfg_sync(hw, vsi_handle, diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index c1658be477..fd2ec39c1e 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -371,14 +371,14 @@ enum ice_flow_avf_hdr_field { enum ice_rss_cfg_hdr_type { ICE_RSS_OUTER_HEADERS, /* take outer headers as inputset. */ ICE_RSS_INNER_HEADERS, /* take inner headers as inputset. */ - /* take inner headers as inputset for packet with outer ipv4. */ + /* take inner headers as inputset for packet with outer IPv4. */ ICE_RSS_INNER_HEADERS_W_OUTER_IPV4, - /* take inner headers as inputset for packet with outer ipv6. */ + /* take inner headers as inputset for packet with outer IPv6. */ ICE_RSS_INNER_HEADERS_W_OUTER_IPV6, /* take outer headers first then inner headers as inputset */ - /* take inner as inputset for GTPoGRE with outer ipv4 + gre. */ + /* take inner as inputset for GTPoGRE with outer IPv4 + GRE. */ ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE, - /* take inner as inputset for GTPoGRE with outer ipv6 + gre. */ + /* take inner as inputset for GTPoGRE with outer IPv6 + GRE. */ ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE, ICE_RSS_ANY_HEADERS }; @@ -576,16 +576,15 @@ int ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk, struct ice_flow_prof *prof, u16 vsi_handle); int -ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, - u16 vsig); -int ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle, u16 fdir_vsi_handle, struct ice_parser_profile *prof, enum ice_block blk); int +ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, + u16 vsig); +int ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id, u8 *hw_prof); - u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id); int ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id, @@ -604,7 +603,7 @@ void ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, u16 val_loc, u16 mask_loc); int ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, - u16 vsi_handle, u64 prof_id); + u16 vsi_handle, u64 prof_id); void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle); int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle); int diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 8c8e04e50a..3753cc77c2 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -22,6 +22,7 @@ #define GLNVM_FLA 0x000B6108 #define GL_HIDA_MAX_INDEX 15 #define GL_HIBA_MAX_INDEX 1023 +#define GL_MNG_FWSM_FW_LOADING_M BIT(30) #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) @@ -5533,7 +5534,6 @@ #define GL_MNG_FW_RAM_STAT_MNG_MEM_ECC_ERR_S 1 #define GL_MNG_FW_RAM_STAT_MNG_MEM_ECC_ERR_M BIT(1) #define GL_MNG_FWSM 0x000B6134 /* Reset Source: POR */ -#define GL_MNG_FWSM_FW_LOADING_M BIT(30) #define GL_MNG_FWSM_FW_MODES_S 0 #define GL_MNG_FWSM_FW_MODES_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_FWSM_FW_MODES_M : E800_GL_MNG_FWSM_FW_MODES_M) #define E800_GL_MNG_FWSM_FW_MODES_M MAKEMASK(0x7, 0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index a28345c2c4..7be597a473 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -920,7 +920,8 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; -/* For ice_32b_rx_flex_desc.ts_low: +/* + * For ice_32b_rx_flex_desc.ts_low: * [0]: Timestamp-low validity bit * [1:7]: Timestamp-low value */ diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 35da0c8b9c..528489929e 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -125,8 +125,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data, * * Reads one 16 bit word from the Shadow RAM using ice_read_flat_nvm. */ -static int -ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) +static int ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) { u32 bytes = sizeof(u16); __le16 data_local; @@ -535,8 +534,7 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, * * Reads the part number string from the NVM. */ -int -ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size) +int ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size) { u16 pba_tlv, pba_tlv_len; u16 pba_word, pba_size; @@ -620,7 +618,7 @@ static int ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *s * @nvm: pointer to NVM info structure * * Read the NVM EETRACK ID and map version of the main NVM image bank, filling - * in the nvm info structure. + * in the NVM info structure. */ static int ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nvm_info *nvm) @@ -845,7 +843,7 @@ int ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom) } /** - * ice_discover_flash_size - Discover the available flash size. + * ice_discover_flash_size - Discover the available flash size * @hw: pointer to the HW struct * * The device flash could be up to 16MB in size. However, it is possible that @@ -909,8 +907,7 @@ static int ice_discover_flash_size(struct ice_hw *hw) * sector size by using the highest bit. The reported pointer value will be in * bytes, intended for flat NVM reads. */ -static int -ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer) +static int ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer) { int status; u16 value; @@ -941,8 +938,7 @@ ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer) * Each area size word is specified in 4KB sector units. This function reports * the size in bytes, intended for flat NVM reads. */ -static int -ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size) +static int ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size) { int status; u16 value; @@ -967,8 +963,7 @@ ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size) * structure for later use in order to calculate the correct offset to read * from the active module. */ -static int -ice_determine_active_flash_banks(struct ice_hw *hw) +static int ice_determine_active_flash_banks(struct ice_hw *hw) { struct ice_bank_info *banks = &hw->flash.banks; u16 ctrl_word; diff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h index 66443c2694..f47b4b6d5a 100644 --- a/drivers/net/ice/base/ice_nvm.h +++ b/drivers/net/ice/base/ice_nvm.h @@ -34,7 +34,6 @@ struct ice_orom_civd_info { u8 combo_name_len; /* Length of the unicode combo image version string, max of 32 */ __le16 combo_name[32]; /* Unicode string representing the Combo Image version */ }; - #pragma pack() #define ICE_NVM_ACCESS_MAJOR_VER 0 diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c index 551e24a5f5..c9bcf9ea5e 100644 --- a/drivers/net/ice/base/ice_parser.c +++ b/drivers/net/ice/base/ice_parser.c @@ -310,7 +310,7 @@ void ice_parser_destroy(struct ice_parser *psr) * @rslt: input/output parameter to save parser result. */ int ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf, - int pkt_len, struct ice_parser_result *rslt) + int pkt_len, struct ice_parser_result *rslt) { ice_parser_rt_reset(&psr->rt); ice_parser_rt_pktbuf_set(&psr->rt, pkt_buf, pkt_len); @@ -341,10 +341,10 @@ void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt) static void _bst_vm_set(struct ice_parser *psr, const char *prefix, bool on) { - struct ice_bst_tcam_item *item; u16 i = 0; while (true) { + struct ice_bst_tcam_item *item; item = ice_bst_tcam_search(psr->bst_tcam_table, psr->bst_lbl_table, prefix, &i); @@ -372,10 +372,10 @@ _tunnel_port_set(struct ice_parser *psr, const char *prefix, u16 udp_port, bool on) { u8 *buf = (u8 *)&udp_port; - struct ice_bst_tcam_item *item; u16 i = 0; while (true) { + struct ice_bst_tcam_item *item; item = ice_bst_tcam_search(psr->bst_tcam_table, psr->bst_lbl_table, prefix, &i); @@ -413,7 +413,7 @@ _tunnel_port_set(struct ice_parser *psr, const char *prefix, u16 udp_port, * @on: true to turn on; false to turn off */ int ice_parser_vxlan_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on) + u16 udp_port, bool on) { return _tunnel_port_set(psr, "TNL_VXLAN", udp_port, on); } @@ -425,7 +425,7 @@ int ice_parser_vxlan_tunnel_set(struct ice_parser *psr, * @on: true to turn on; false to turn off */ int ice_parser_geneve_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on) + u16 udp_port, bool on) { return _tunnel_port_set(psr, "TNL_GENEVE", udp_port, on); } @@ -437,7 +437,7 @@ int ice_parser_geneve_tunnel_set(struct ice_parser *psr, * @on: true to turn on; false to turn off */ int ice_parser_ecpri_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on) + u16 udp_port, bool on) { return _tunnel_port_set(psr, "TNL_UDP_ECPRI", udp_port, on); } @@ -486,10 +486,10 @@ static bool _nearest_proto_id(struct ice_parser_result *rslt, u16 offset, * @prof: input/output parameter to save the profile */ int ice_parser_profile_init(struct ice_parser_result *rslt, - const u8 *pkt_buf, const u8 *msk_buf, - int buf_len, enum ice_block blk, - bool prefix_match, - struct ice_parser_profile *prof) + const u8 *pkt_buf, const u8 *msk_buf, + int buf_len, enum ice_block blk, + bool prefix_match, + struct ice_parser_profile *prof) { u8 proto_id = 0xff; u16 proto_off = 0; diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h index f2a72cc44b..28c96af6da 100644 --- a/drivers/net/ice/base/ice_parser.h +++ b/drivers/net/ice/base/ice_parser.h @@ -59,11 +59,11 @@ int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr); void ice_parser_destroy(struct ice_parser *psr); void ice_parser_dvm_set(struct ice_parser *psr, bool on); int ice_parser_vxlan_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on); + u16 udp_port, bool on); int ice_parser_geneve_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on); + u16 udp_port, bool on); int ice_parser_ecpri_tunnel_set(struct ice_parser *psr, - u16 udp_port, bool on); + u16 udp_port, bool on); struct ice_parser_proto_off { u8 proto_id; /* hardware protocol ID */ @@ -84,7 +84,7 @@ struct ice_parser_result { }; int ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf, - int pkt_len, struct ice_parser_result *rslt); + int pkt_len, struct ice_parser_result *rslt); void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt); struct ice_parser_fv { @@ -95,7 +95,7 @@ struct ice_parser_fv { }; struct ice_parser_profile { - struct ice_parser_fv fv[48]; /* field vector array */ + struct ice_parser_fv fv[48]; /* field vector arrary */ int fv_num; /* field vector number must <= 48 */ u16 flags; /* 16 bits key builder flag */ u16 flags_msk; /* key builder flag masker */ @@ -104,10 +104,10 @@ struct ice_parser_profile { }; int ice_parser_profile_init(struct ice_parser_result *rslt, - const u8 *pkt_buf, const u8 *msk_buf, - int buf_len, enum ice_block blk, - bool prefix_match, - struct ice_parser_profile *prof); + const u8 *pkt_buf, const u8 *msk_buf, + int buf_len, enum ice_block blk, + bool prefix_match, + struct ice_parser_profile *prof); void ice_parser_profile_dump(struct ice_hw *hw, struct ice_parser_profile *prof); bool ice_check_ddp_support_proto_id(struct ice_hw *hw, diff --git a/drivers/net/ice/base/ice_parser_rt.c b/drivers/net/ice/base/ice_parser_rt.c index 50a3d301b0..09aac0c6e6 100644 --- a/drivers/net/ice/base/ice_parser_rt.c +++ b/drivers/net/ice/base/ice_parser_rt.c @@ -346,7 +346,7 @@ static void _bst_pgp_set(struct ice_parser_rt *rt, rt->pg, bst->address); } -static struct ice_pg_cam_item *_pg_cam_match(struct ice_parser_rt *rt) +static struct ice_pg_cam_item *__pg_cam_match(struct ice_parser_rt *rt) { struct ice_parser *psr = rt->psr; struct ice_pg_cam_item *item; @@ -361,7 +361,7 @@ static struct ice_pg_cam_item *_pg_cam_match(struct ice_parser_rt *rt) return item; } -static struct ice_pg_nm_cam_item *_pg_nm_cam_match(struct ice_parser_rt *rt) +static struct ice_pg_nm_cam_item *__pg_nm_cam_match(struct ice_parser_rt *rt) { struct ice_parser *psr = rt->psr; struct ice_pg_nm_cam_item *item; @@ -411,9 +411,8 @@ static void _flg_add(struct ice_parser_rt *rt, int idx, bool val) static void _flg_update(struct ice_parser_rt *rt, struct ice_alu *alu) { - int i; - if (alu->dedicate_flags_ena) { + int i; if (alu->flags_extr_imm) { for (i = 0; i < alu->dst_len; i++) _flg_add(rt, alu->dst_start + i, @@ -653,12 +652,12 @@ static void _alu_pg_exe(struct ice_parser_rt *rt) static void _proto_off_update(struct ice_parser_rt *rt) { struct ice_parser *psr = rt->psr; - int i; if (rt->action->is_pg) { struct ice_proto_grp_item *proto_grp = &psr->proto_grp_table[rt->action->proto_id]; u16 po; + int i; for (i = 0; i < 8; i++) { struct ice_proto_off *entry = &proto_grp->po[i]; @@ -696,11 +695,11 @@ static void _marker_set(struct ice_parser_rt *rt, int idx) static void _marker_update(struct ice_parser_rt *rt) { struct ice_parser *psr = rt->psr; - int i; if (rt->action->is_mg) { struct ice_mk_grp_item *mk_grp = &psr->mk_grp_table[rt->action->marker_id]; + int i; for (i = 0; i < 8; i++) { u8 marker = mk_grp->markers[i]; @@ -771,13 +770,11 @@ static void _result_resolve(struct ice_parser_rt *rt, * @rslt: input/output parameter to save parser result */ int ice_parser_rt_execute(struct ice_parser_rt *rt, - struct ice_parser_result *rslt) + struct ice_parser_result *rslt) { struct ice_pg_nm_cam_item *pg_nm_cam; struct ice_parser *psr = rt->psr; struct ice_pg_cam_item *pg_cam; - struct ice_bst_tcam_item *bst; - struct ice_imem_item *imem; int status = 0; u16 node; u16 pc; @@ -786,6 +783,9 @@ int ice_parser_rt_execute(struct ice_parser_rt *rt, ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Start with Node: %d\n", node); while (true) { + struct ice_bst_tcam_item *bst; + struct ice_imem_item *imem; + pc = rt->gpr[GPR_NP_IDX]; imem = &psr->imem_table[pc]; ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Load imem at pc: %d\n", @@ -829,9 +829,9 @@ int ice_parser_rt_execute(struct ice_parser_rt *rt, } rt->action = NULL; - pg_cam = _pg_cam_match(rt); + pg_cam = __pg_cam_match(rt); if (!pg_cam) { - pg_nm_cam = _pg_nm_cam_match(rt); + pg_nm_cam = __pg_nm_cam_match(rt); if (pg_nm_cam) { ice_debug(rt->psr->hw, ICE_DBG_PARSER, "Match ParseGraph Nomatch CAM Address %d\n", pg_nm_cam->idx); diff --git a/drivers/net/ice/base/ice_parser_rt.h b/drivers/net/ice/base/ice_parser_rt.h index f95068d07d..a77d4432a2 100644 --- a/drivers/net/ice/base/ice_parser_rt.h +++ b/drivers/net/ice/base/ice_parser_rt.h @@ -49,5 +49,5 @@ void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf, struct ice_parser_result; int ice_parser_rt_execute(struct ice_parser_rt *rt, - struct ice_parser_result *rslt); + struct ice_parser_result *rslt); #endif /* _ICE_PARSER_RT_H_ */ diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index d2d3f75fc2..de960d7d1b 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -98,6 +98,10 @@ enum ice_sw_tunnel_type { ICE_SW_TUN_IPV6_GTPU_EH_IPV6_UDP, ICE_SW_TUN_IPV6_GTPU_IPV6_TCP, ICE_SW_TUN_IPV6_GTPU_EH_IPV6_TCP, + ICE_SW_TUN_IPV4_GTPU_IPV4, + ICE_SW_TUN_IPV4_GTPU_IPV6, + ICE_SW_TUN_IPV6_GTPU_IPV4, + ICE_SW_TUN_IPV6_GTPU_IPV6, ICE_SW_TUN_PPPOE, ICE_SW_TUN_PPPOE_PAY, ICE_SW_TUN_PPPOE_IPV4, @@ -128,10 +132,6 @@ enum ice_sw_tunnel_type { ICE_SW_TUN_PPPOE_PAY_QINQ, ICE_SW_TUN_PPPOE_IPV4_QINQ, ICE_SW_TUN_PPPOE_IPV6_QINQ, - ICE_SW_TUN_IPV4_GTPU_IPV4, - ICE_SW_TUN_IPV4_GTPU_IPV6, - ICE_SW_TUN_IPV6_GTPU_IPV4, - ICE_SW_TUN_IPV6_GTPU_IPV6, ICE_SW_TUN_GTP_IPV4, ICE_SW_TUN_GTP_IPV6, ICE_ALL_TUNNELS /* All tunnel types including NVGRE */ @@ -223,7 +223,8 @@ enum ice_prot_id { #define ICE_MDID_SIZE 2 #define ICE_TUN_FLAG_MDID 20 -#define ICE_TUN_FLAG_MDID_OFF(word) (ICE_MDID_SIZE * (ICE_TUN_FLAG_MDID + (word))) +#define ICE_TUN_FLAG_MDID_OFF(word) \ + (ICE_MDID_SIZE * (ICE_TUN_FLAG_MDID + (word))) #define ICE_TUN_FLAG_MASK 0xFF #define ICE_DIR_FLAG_MASK 0x10 #define ICE_TUN_FLAG_IN_VLAN_MASK 0x80 /* VLAN inside tunneled header */ diff --git a/drivers/net/ice/base/ice_ptp_consts.h b/drivers/net/ice/base/ice_ptp_consts.h index 546bf8ba91..bd0258f437 100644 --- a/drivers/net/ice/base/ice_ptp_consts.h +++ b/drivers/net/ice/base/ice_ptp_consts.h @@ -157,7 +157,8 @@ const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { }, }; -/* struct ice_vernier_info_e822 +/* + * struct ice_vernier_info_e822 * * E822 hardware calibrates the delay of the timestamp indication from the * actual packet transmission or reception during the initialization of the diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index 3cee48712c..97a98f220d 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -923,12 +923,16 @@ static void ice_ptp_zero_syn_dlay(struct ice_hw *hw) ice_flush(hw); } +/* 56G PHY device functions + * + * The following functions operate on devices with the ETH 56G PHY. + */ + enum eth56g_res_type { ETH56G_PHY_REG, ETH56G_PHY_MEM, }; -/* 56G PHY access functions */ static const u32 ice_eth56g_port_base[ICE_NUM_PHY_PORTS] = { ICE_PHY0_BASE, ICE_PHY1_BASE, @@ -1006,10 +1010,11 @@ ice_read_phy_eth56g_raw_lp(struct ice_hw *hw, u8 phy_index, u32 reg_addr, } /** - * ice_phy_port_reg_address_eth56g - Calculate a PHY port register address + * ice_phy_port_res_address_eth56g - Calculate a PHY port register address * @port: Port number to be written * @res_type: resource type (register/memory) * @offset: Offset from PHY port register base + * * @address: The result address */ static int @@ -1129,8 +1134,7 @@ ice_write_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val) } /** - * ice_read_phy_reg_eth56g_lp - Read a PHY port register with - * lock parameter + * ice_read_phy_reg_eth56g_lp - Read a PHY port register with lock parameter * @hw: pointer to the HW struct * @port: Port number to be read * @offset: Offset from PHY port register base @@ -1160,7 +1164,6 @@ ice_read_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val) /** * ice_phy_port_mem_read_eth56g_lp - Read a PHY port memory location - * with lock parameter * @hw: pointer to the HW struct * @port: Port number to be read * @offset: Offset from PHY port register base @@ -1176,12 +1179,13 @@ ice_phy_port_mem_read_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, } /** - * ice_phy_port_mem_read_eth56g - Read a PHY port memory location with - * sbq locked + * ice_phy_port_mem_read_eth56g - Read a PHY port memory location * @hw: pointer to the HW struct * @port: Port number to be read * @offset: Offset from PHY port register base * @val: Pointer to the value to read (out param) + * + * Takes the sideband queue lock. */ static int ice_phy_port_mem_read_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val) @@ -1190,8 +1194,7 @@ ice_phy_port_mem_read_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val) } /** - * ice_phy_port_mem_write_eth56g_lp - Write a PHY port memory location with - * lock parameter + * ice_phy_port_mem_write_eth56g_lp - Write a PHY port memory location * @hw: pointer to the HW struct * @port: Port number to be read * @offset: Offset from PHY port register base @@ -1207,12 +1210,13 @@ ice_phy_port_mem_write_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, } /** - * ice_phy_port_mem_write_eth56g - Write a PHY port memory location with - * sbq locked + * ice_phy_port_mem_write_eth56g - Write a PHY port memory location * @hw: pointer to the HW struct * @port: Port number to be read * @offset: Offset from PHY port register base * @val: Pointer to the value to read (out param) + * + * Takes the sideband queue lock. */ static int ice_phy_port_mem_write_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val) @@ -1553,8 +1557,8 @@ ice_ptp_prep_port_phy_time_eth56g(struct ice_hw *hw, u8 port, u64 phy_time) /* Tx case */ err = ice_write_64b_phy_reg_eth56g(hw, port, - PHY_REG_TX_TIMER_INC_PRE_L, - phy_time); + PHY_REG_TX_TIMER_INC_PRE_L, + phy_time); if (err) return err; @@ -1604,7 +1608,7 @@ ice_ptp_prep_phy_time_eth56g(struct ice_hw *hw, u32 time) * ice_ptp_prep_port_adj_eth56g - Prepare a single port for time adjust * @hw: pointer to HW struct * @port: Port number to be programmed - * @time: time in cycles to adjust the port Tx and Rx clocks + * @time: time in cycles to adjust the port clocks * @lock_sbq: true to lock the sbq sq_lock (the usual case); false if the * sq_lock has already been locked at a higher level * @@ -1733,7 +1737,7 @@ ice_ptp_read_phy_incval_eth56g(struct ice_hw *hw, u8 port, u64 *incval) int err; err = ice_read_40b_phy_reg_eth56g(hw, port, PHY_REG_TIMETUS_L, - incval); + incval); if (err) { ice_debug(hw, ICE_DBG_PTP, "Failed to read TIMETUS_L, err %d\n", err); @@ -2893,11 +2897,23 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) * @quad: the quad to read from * @idx: the timestamp index to reset * - * Clear a timestamp, resetting its valid bit, from the PHY quad block that is - * shared between the internal PHYs on the E822 devices. + * Read the timestamp out of the quad to clear its timestamp status bit from + * the PHY quad block that is shared between the internal PHYs of the E822 + * devices. + * + * Note that unlike E810, software cannot directly write to the quad memory + * bank registers. E822 relies on the ice_get_phy_tx_tstamp_ready() function + * to determine which timestamps are valid. Reading a timestamp auto-clears + * the valid bit. + * + * To directly clear the contents of the timestamp block entirely, discarding + * all timestamp data at once, software should instead use + * ice_ptp_reset_ts_memory_quad_e822(). + * + * This function should only be called on an idx whose bit is set according to + * ice_get_phy_tx_tstamp_ready(). */ -static int -ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) +static int ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) { int err; u16 lo_addr, hi_addr; @@ -3882,9 +3898,9 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, enum ice_ptp_fec_mode fec_mode, u64 *pmd_adj) { u64 cur_freq, clk_incval, tu_per_sec, mult, adj; - u32 pmd_adj_divisor, val; - int err; u8 pmd_align; + u32 val; + int err; err = ice_read_phy_reg_e822(hw, port, P_REG_PMD_ALIGNMENT, &val); if (err) { @@ -3901,9 +3917,6 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, /* Calculate TUs per second */ tu_per_sec = cur_freq * clk_incval; - /* Get the link speed dependent PMD adjustment divisor */ - pmd_adj_divisor = e822_vernier[link_spd].pmd_adj_divisor; - /* The PMD alignment adjustment measurement depends on the link speed, * and whether FEC is enabled. For each link speed, the alignment * adjustment is calculated by dividing a value by the length of @@ -3968,7 +3981,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, */ adj = DIV_U64(tu_per_sec, 125); adj *= mult; - adj = DIV_U64(adj, pmd_adj_divisor); + adj = DIV_U64(adj, e822_vernier[link_spd].pmd_adj_divisor); /* Finally, for 25G-RS and 50G-RS, a further adjustment for the Rx * cycle count is necessary. @@ -3991,7 +4004,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, cycle_adj = DIV_U64(tu_per_sec, 125); cycle_adj *= mult; - cycle_adj = DIV_U64(cycle_adj, pmd_adj_divisor); + cycle_adj = DIV_U64(cycle_adj, e822_vernier[link_spd].pmd_adj_divisor); adj += cycle_adj; } @@ -4013,7 +4026,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, cycle_adj = DIV_U64(tu_per_sec, 125); cycle_adj *= mult; - cycle_adj = DIV_U64(cycle_adj, pmd_adj_divisor); + cycle_adj = DIV_U64(cycle_adj, e822_vernier[link_spd].pmd_adj_divisor); adj += cycle_adj; } @@ -4407,8 +4420,7 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) * timestamps. Use ice_phy_exit_bypass_e822 to exit bypass mode once hardware * has completed offset calculation. */ -int -ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass) +int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass) { u32 lo, hi, val; u64 incval; @@ -4825,16 +4837,22 @@ ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp) } /** - * ice_clear_phy_tstamp_e810 - Clear a timestamp from the external PHY + * ice_clear_phy_tstamp - Clear a timestamp from the timestamp block * @hw: pointer to the HW struct * @lport: the lport to read from * @idx: the timestamp index to reset * - * Clear a timestamp, resetting its valid bit, from the timestamp block of the - * external PHY on the E810 device. + * Clear a timestamp from the timestamp block, discarding its value without + * returning it. This resets the memory status bit for the timestamp index + * allowing it to be reused for another timestamp in the future. + * + * For E822 devices, the block number is the PHY quad to clear from. For E810 + * devices, the block number is the logical port to clear from. + * + * This function must only be called on a timestamp index whose valid bit is + * set according to ice_get_phy_tx_tstamp_ready(). */ -static int -ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) +static int ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) { int err; u32 lo_addr, hi_addr; @@ -4865,8 +4883,6 @@ ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) * * Enable the timesync PTP functionality for the external PHY connected to * this function. - * - * Note there is no equivalent function needed on E822 based devices. */ int ice_ptp_init_phy_e810(struct ice_hw *hw) { @@ -4946,8 +4962,7 @@ static int ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time) * the PHY timer, usually in units of nominal nanoseconds. Negative * adjustments are supported using 2s complement arithmetic. */ -static int -ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj, bool lock_sbq) +static int ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj, bool lock_sbq) { u8 tmr_idx; int err; @@ -4985,8 +5000,7 @@ ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj, bool lock_sbq) * ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual change is * completed by issuing an ICE_PTP_INIT_INCVAL command. */ -static int -ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval) +static int ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval) { u32 high, low; u8 tmr_idx; @@ -5104,9 +5118,9 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8 port, u64 *tstamp_ready) * @hw: pointer to the hw struct * @pca9575_handle: GPIO controller's handle * - * Find and return the GPIO controller's handle in the netlist. - * When found - the value will be cached in the hw structure and following calls - * will return cached value + * Find and return the GPIO controller's handle by checking what drives clock + * mux pin. When found - the value will be cached in the hw structure and + * following calls will return cached value. */ static int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) @@ -5150,7 +5164,7 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) if (status) return ICE_ERR_NOT_SUPPORTED; - /* Verify if we found the right IO expander type */ + /* Verify if PCA9575 drives the pin */ if (node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575) return ICE_ERR_NOT_SUPPORTED; @@ -5161,70 +5175,6 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) return 0; } -/** - * ice_read_pca9575_reg_e810t - * @hw: pointer to the hw struct - * @offset: GPIO controller register offset - * @data: pointer to data to be read from the GPIO controller - * - * Read the register from the GPIO controller - */ -int -ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data) -{ - struct ice_aqc_link_topo_addr link_topo; - __le16 addr; - u16 handle; - int err; - - memset(&link_topo, 0, sizeof(link_topo)); - - err = ice_get_pca9575_handle(hw, &handle); - if (err) - return err; - - link_topo.handle = CPU_TO_LE16(handle); - link_topo.topo_params.node_type_ctx = - (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << - ICE_AQC_LINK_TOPO_NODE_CTX_S); - - addr = CPU_TO_LE16((u16)offset); - - return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL); -} - -/** - * ice_write_pca9575_reg_e810t - * @hw: pointer to the hw struct - * @offset: GPIO controller register offset - * @data: data to be written to the GPIO controller - * - * Write the data to the GPIO controller register - */ -int -ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data) -{ - struct ice_aqc_link_topo_addr link_topo; - __le16 addr; - int status; - u16 handle; - - memset(&link_topo, 0, sizeof(link_topo)); - - status = ice_get_pca9575_handle(hw, &handle); - if (status) - return status; - - link_topo.handle = CPU_TO_LE16(handle); - link_topo.topo_params.node_type_ctx = - (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << - ICE_AQC_LINK_TOPO_NODE_CTX_S); - - addr = CPU_TO_LE16((u16)offset); - - return ice_aq_write_i2c(hw, link_topo, 0, addr, 1, &data, NULL); -} - /** * ice_read_sma_ctrl_e810t * @hw: pointer to the hw struct @@ -5244,10 +5194,10 @@ int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data) *data = 0; - for (i = ICE_E810T_SMA_MIN_BIT; i <= ICE_E810T_SMA_MAX_BIT; i++) { + for (i = ICE_SMA_MIN_BIT_E810T; i <= ICE_SMA_MAX_BIT_E810T; i++) { bool pin; - status = ice_aq_get_gpio(hw, handle, i + ICE_E810T_P1_OFFSET, + status = ice_aq_get_gpio(hw, handle, i + ICE_PCA9575_P1_OFFSET, &pin, NULL); if (status) break; @@ -5274,11 +5224,11 @@ int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data) if (status) return status; - for (i = ICE_E810T_SMA_MIN_BIT; i <= ICE_E810T_SMA_MAX_BIT; i++) { + for (i = ICE_SMA_MIN_BIT_E810T; i <= ICE_SMA_MAX_BIT_E810T; i++) { bool pin; pin = !(data & (1 << i)); - status = ice_aq_set_gpio(hw, handle, i + ICE_E810T_P1_OFFSET, + status = ice_aq_set_gpio(hw, handle, i + ICE_PCA9575_P1_OFFSET, pin, NULL); if (status) break; @@ -5287,6 +5237,69 @@ int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data) return status; } +/** + * ice_read_pca9575_reg_e810t + * @hw: pointer to the hw struct + * @offset: GPIO controller register offset + * @data: pointer to data to be read from the GPIO controller + * + * Read the register from the GPIO controller + */ +int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data) +{ + struct ice_aqc_link_topo_addr link_topo; + __le16 addr; + u16 handle; + int err; + + memset(&link_topo, 0, sizeof(link_topo)); + + err = ice_get_pca9575_handle(hw, &handle); + if (err) + return err; + + link_topo.handle = CPU_TO_LE16(handle); + link_topo.topo_params.node_type_ctx = + (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << + ICE_AQC_LINK_TOPO_NODE_CTX_S); + + addr = CPU_TO_LE16((u16)offset); + + return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL); +} + +/** + * ice_write_pca9575_reg_e810t + * @hw: pointer to the hw struct + * @offset: GPIO controller register offset + * @data: data to be written to the GPIO controller + * + * Write the data to the GPIO controller register + */ +int +ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data) +{ + struct ice_aqc_link_topo_addr link_topo; + __le16 addr; + int status; + u16 handle; + + memset(&link_topo, 0, sizeof(link_topo)); + + status = ice_get_pca9575_handle(hw, &handle); + if (status) + return status; + + link_topo.handle = CPU_TO_LE16(handle); + link_topo.topo_params.node_type_ctx = + (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << + ICE_AQC_LINK_TOPO_NODE_CTX_S); + + addr = CPU_TO_LE16((u16)offset); + + return ice_aq_write_i2c(hw, link_topo, 0, addr, 1, &data, NULL); +} + /** * ice_is_pca9575_present * @hw: pointer to the hw struct @@ -5295,8 +5308,8 @@ int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data) */ bool ice_is_pca9575_present(struct ice_hw *hw) { - int status; u16 handle = 0; + int status; status = ice_get_pca9575_handle(hw, &handle); if (!status && handle) @@ -5936,9 +5949,9 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq) tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; /* Write the desired clock adjustment into the GLTSYN_SHADJ register. - * For an ICE_PTP_ADJ_TIME command, this set of registers represents - * the value to add to the clock time. It supports subtraction by - * interpreting the value as a 2's complement integer. + * For an ICE_PTP_ADJ_TIME command, this set of registers represents the value + * to add to the clock time. It supports subtraction by interpreting + * the value as a 2's complement integer. */ wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); @@ -6078,8 +6091,7 @@ int ice_ptp_clear_phy_offset_ready(struct ice_hw *hw) * the block is the quad to read from. For E810 devices, the block is the * logical port to read from. */ -int -ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) +int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) { switch (hw->phy_model) { case ICE_PHY_ETH56G: @@ -6101,12 +6113,17 @@ ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) * @block: the block to read from * @idx: the timestamp index to reset * - * Clear a timestamp, resetting its valid bit, from the timestamp block. For - * E822 devices, the block is the quad to clear from. For E810 devices, the - * block is the logical port to clear from. + * Clear a timestamp from the timestamp block, discarding its value without + * returning it. This resets the memory status bit for the timestamp index + * allowing it to be reused for another timestamp in the future. + * + * For E822 devices, the block number is the PHY quad to clear from. For E810 + * devices, the block number is the logical port to clear from. + * + * This function must only be called on a timestamp index whose valid bit is + * set according to ice_get_phy_tx_tstamp_ready(). */ -int -ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) +int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) { switch (hw->phy_model) { case ICE_PHY_ETH56G: diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h index 0ce67e7ac6..eb30d5534f 100644 --- a/drivers/net/ice/base/ice_ptp_hw.h +++ b/drivers/net/ice/base/ice_ptp_hw.h @@ -658,6 +658,10 @@ ice_get_base_incval(struct ice_hw *hw, enum ice_src_tmr_mode src_tmr_mode) #define E830_HIGH_TX_MEMORY_BANK(slot, port) \ (E830_PRTTSYN_TXTIME_H(slot) + 0x8 * (port)) +#define ICE_SMA_MIN_BIT_E810T 3 +#define ICE_SMA_MAX_BIT_E810T 7 +#define ICE_PCA9575_P1_OFFSET 8 + /* E810T PCA9575 IO controller registers */ #define ICE_PCA9575_P0_IN 0x0 #define ICE_PCA9575_P1_IN 0x1 @@ -674,9 +678,6 @@ ice_get_base_incval(struct ice_hw *hw, enum ice_src_tmr_mode src_tmr_mode) #define ICE_E810T_P1_SMA2_DIR_EN BIT(6) #define ICE_E810T_P1_SMA2_TX_EN BIT(7) -#define ICE_E810T_SMA_MIN_BIT 3 -#define ICE_E810T_SMA_MAX_BIT 7 -#define ICE_E810T_P1_OFFSET 8 /* 56G PHY quad register base addresses */ #define ICE_PHY0_BASE 0x092000 #define ICE_PHY1_BASE 0x126000 diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h index 92c3811c7e..51591bc6e7 100644 --- a/drivers/net/ice/base/ice_sched.h +++ b/drivers/net/ice/base/ice_sched.h @@ -101,6 +101,10 @@ int ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, struct ice_aqc_txsched_elem_data *buf, u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd); + +int +ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, + enum ice_rl_type rl_type, u32 bw); int ice_sched_init_port(struct ice_port_info *pi); int ice_sched_query_res_alloc(struct ice_hw *hw); void ice_sched_get_psm_clk_freq(struct ice_hw *hw); @@ -235,11 +239,7 @@ void ice_sched_replay_agg(struct ice_hw *hw); int ice_sched_replay_tc_node_bw(struct ice_port_info *pi); int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle); int ice_sched_replay_root_node_bw(struct ice_port_info *pi); -int -ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx); -int -ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, - enum ice_rl_type rl_type, u32 bw); +int ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx); int ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node, enum ice_rl_type rl_type, u16 bw_alloc); diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 04b76840dd..36143f149b 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -12,8 +12,8 @@ #define ICE_ETH_VLAN_TCI_OFFSET 14 #define ICE_MAX_VLAN_ID 0xFFF #define ICE_IPV6_ETHER_ID 0x86DD -#define ICE_IPV4_NVGRE_PROTO_ID 0x002F #define ICE_PPP_IPV6_PROTO_ID 0x0057 +#define ICE_IPV4_NVGRE_PROTO_ID 0x002F #define ICE_TCP_PROTO_ID 0x06 #define ICE_GTPU_PROFILE 24 #define ICE_MPLS_ETHER_ID 0x8847 @@ -1141,15 +1141,6 @@ static const u8 dummy_ipv6_gtpu_ipv6_udp_packet[] = { 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; -static const struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv4_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_IPV4_OFOS, 14 }, - { ICE_UDP_OF, 34 }, - { ICE_GTP, 42 }, - { ICE_IPV4_IL, 62 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - static const u8 dummy_ipv4_gtpu_ipv4_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, @@ -1180,8 +1171,17 @@ static const u8 dummy_ipv4_gtpu_ipv4_packet[] = { 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv6_packet_offsets[] = { +static const struct +ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv4_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_IPV4_OFOS, 14 }, + { ICE_UDP_OF, 34 }, + { ICE_GTP, 42 }, + { ICE_IPV4_IL, 62 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV4_OFOS, 14 }, { ICE_UDP_OF, 34 }, @@ -1226,8 +1226,7 @@ static const u8 dummy_ipv4_gtpu_ipv6_packet[] = { 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv4_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv4_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV6_OFOS, 14 }, { ICE_UDP_OF, 54 }, @@ -1272,8 +1271,7 @@ static const u8 dummy_ipv6_gtpu_ipv4_packet[] = { 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv6_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV6_OFOS, 14 }, { ICE_UDP_OF, 54 }, @@ -1660,83 +1658,6 @@ static const u8 dummy_pppoe_ipv4_packet[] = { 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_tcp_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_VLAN_OFOS, 12 }, - { ICE_ETYPE_OL, 16 }, - { ICE_PPPOE, 18 }, - { ICE_IPV4_OFOS, 26 }, - { ICE_TCP_IL, 46 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_pppoe_ipv4_tcp_packet[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ - - 0x88, 0x64, /* ICE_ETYPE_OL 16 */ - - 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ - 0x00, 0x16, - - 0x00, 0x21, /* PPP Link Layer 24 */ - - 0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 26 */ - 0x00, 0x01, 0x00, 0x00, - 0x00, 0x06, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 46 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - -static const -struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_udp_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_VLAN_OFOS, 12 }, - { ICE_ETYPE_OL, 16 }, - { ICE_PPPOE, 18 }, - { ICE_IPV4_OFOS, 26 }, - { ICE_UDP_ILOS, 46 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_pppoe_ipv4_udp_packet[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ - - 0x88, 0x64, /* ICE_ETYPE_OL 16 */ - - 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ - 0x00, 0x16, - - 0x00, 0x21, /* PPP Link Layer 24 */ - - 0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 26 */ - 0x00, 0x01, 0x00, 0x00, - 0x00, 0x11, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 46 */ - 0x00, 0x08, 0x00, 0x00, - - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_VLAN_OFOS, 12 }, @@ -1774,97 +1695,10 @@ static const u8 dummy_pppoe_ipv6_packet[] = { 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_pppoe_ipv6_tcp_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_VLAN_OFOS, 12 }, - { ICE_ETYPE_OL, 16 }, - { ICE_PPPOE, 18 }, - { ICE_IPV6_OFOS, 26 }, - { ICE_TCP_IL, 66 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_pppoe_ipv6_tcp_packet[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ - - 0x88, 0x64, /* ICE_ETYPE_OL 16 */ - - 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ - 0x00, 0x2a, - - 0x00, 0x57, /* PPP Link Layer 24 */ - - 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */ - 0x00, 0x14, 0x06, 0x00, /* Next header is TCP */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 66 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - -static const -struct ice_dummy_pkt_offsets dummy_pppoe_ipv6_udp_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_VLAN_OFOS, 12 }, - { ICE_ETYPE_OL, 16 }, - { ICE_PPPOE, 18 }, - { ICE_IPV6_OFOS, 26 }, - { ICE_UDP_ILOS, 66 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_pppoe_ipv6_udp_packet[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ - - 0x88, 0x64, /* ICE_ETYPE_OL 16 */ - - 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ - 0x00, 0x2a, - - 0x00, 0x57, /* PPP Link Layer 24 */ - - 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */ - 0x00, 0x08, 0x11, 0x00, /* Next header UDP*/ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 66 */ - 0x00, 0x08, 0x00, 0x00, - - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - static const struct ice_dummy_pkt_offsets dummy_ipv4_esp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV4_OFOS, 14 }, - { ICE_ESP, 34 }, + { ICE_ESP, 34 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1888,7 +1722,7 @@ static const u8 dummy_ipv4_esp_pkt[] = { static const struct ice_dummy_pkt_offsets dummy_ipv6_esp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV6_OFOS, 14 }, - { ICE_ESP, 54 }, + { ICE_ESP, 54 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1917,7 +1751,7 @@ static const u8 dummy_ipv6_esp_pkt[] = { static const struct ice_dummy_pkt_offsets dummy_ipv4_ah_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV4_OFOS, 14 }, - { ICE_AH, 34 }, + { ICE_AH, 34 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1942,7 +1776,7 @@ static const u8 dummy_ipv4_ah_pkt[] = { static const struct ice_dummy_pkt_offsets dummy_ipv6_ah_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV6_OFOS, 14 }, - { ICE_AH, 54 }, + { ICE_AH, 54 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -2031,61 +1865,6 @@ static const u8 dummy_ipv6_nat_pkt[] = { }; -static const struct ice_dummy_pkt_offsets dummy_ipv4_l2tpv3_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_IPV4_OFOS, 14 }, - { ICE_L2TPV3, 34 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_ipv4_l2tpv3_pkt[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, - - 0x45, 0x00, 0x00, 0x20, /* ICE_IPV4_IL 14 */ - 0x00, 0x00, 0x40, 0x00, - 0x40, 0x73, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_L2TPV3 34 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - -static const struct ice_dummy_pkt_offsets dummy_ipv6_l2tpv3_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_IPV6_OFOS, 14 }, - { ICE_L2TPV3, 54 }, - { ICE_PROTOCOL_LAST, 0 }, -}; - -static const u8 dummy_ipv6_l2tpv3_pkt[] = { - 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x86, 0xDD, - - 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_IL 14 */ - 0x00, 0x0c, 0x73, 0x40, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - - 0x00, 0x00, 0x00, 0x00, /* ICE_L2TPV3 54 */ - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ -}; - static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_VLAN_EX, 12 }, @@ -2168,6 +1947,225 @@ static const u8 dummy_qinq_pppoe_ipv6_packet[] = { 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; +static const struct ice_dummy_pkt_offsets dummy_ipv4_l2tpv3_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_IPV4_OFOS, 14 }, + { ICE_L2TPV3, 34 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_ipv4_l2tpv3_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x08, 0x00, + + 0x45, 0x00, 0x00, 0x20, /* ICE_IPV4_IL 14 */ + 0x00, 0x00, 0x40, 0x00, + 0x40, 0x73, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_L2TPV3 34 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + +static const struct ice_dummy_pkt_offsets dummy_ipv6_l2tpv3_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_IPV6_OFOS, 14 }, + { ICE_L2TPV3, 54 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_ipv6_l2tpv3_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x86, 0xDD, + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_IL 14 */ + 0x00, 0x0c, 0x73, 0x40, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_L2TPV3 54 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_tcp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 12 }, + { ICE_ETYPE_OL, 16 }, + { ICE_PPPOE, 18 }, + { ICE_IPV4_OFOS, 26 }, + { ICE_TCP_IL, 46 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_pppoe_ipv4_tcp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ + + 0x88, 0x64, /* ICE_ETYPE_OL 16 */ + + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x16, + + 0x00, 0x21, /* PPP Link Layer 24 */ + + 0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 26 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 46 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_udp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 12 }, + { ICE_ETYPE_OL, 16 }, + { ICE_PPPOE, 18 }, + { ICE_IPV4_OFOS, 26 }, + { ICE_UDP_ILOS, 46 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_pppoe_ipv4_udp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ + + 0x88, 0x64, /* ICE_ETYPE_OL 16 */ + + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x16, + + 0x00, 0x21, /* PPP Link Layer 24 */ + + 0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 26 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 46 */ + 0x00, 0x08, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_pppoe_ipv6_tcp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 12 }, + { ICE_ETYPE_OL, 16 }, + { ICE_PPPOE, 18 }, + { ICE_IPV6_OFOS, 26 }, + { ICE_TCP_IL, 66 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_pppoe_ipv6_tcp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ + + 0x88, 0x64, /* ICE_ETYPE_OL 16 */ + + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x2a, + + 0x00, 0x57, /* PPP Link Layer 24 */ + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */ + 0x00, 0x14, 0x06, 0x00, /* Next header is TCP */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 66 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_pppoe_ipv6_udp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 12 }, + { ICE_ETYPE_OL, 16 }, + { ICE_PPPOE, 18 }, + { ICE_IPV6_OFOS, 26 }, + { ICE_UDP_ILOS, 66 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_pppoe_ipv6_udp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, 0x00, 0x00, /* ICE_VLAN_OFOS 12 */ + + 0x88, 0x64, /* ICE_ETYPE_OL 16 */ + + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x2a, + + 0x00, 0x57, /* PPP Link Layer 24 */ + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */ + 0x00, 0x08, 0x11, 0x00, /* Next header UDP*/ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 66 */ + 0x00, 0x08, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ +}; + /* this is a recipe to profile association bitmap */ static ice_declare_bitmap(recipe_to_profile[ICE_MAX_NUM_RECIPES], ICE_MAX_NUM_PROFILES); @@ -2221,6 +2219,7 @@ static struct ice_prof_type_entry ice_prof_type_tbl[ICE_GTPU_PROFILE] = { /** * ice_get_tun_type_for_recipe - get tunnel type for the recipe * @rid: recipe ID that we are populating + * @vlan: flag of vlan protocol */ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid, bool vlan) { @@ -2230,7 +2229,8 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid, bool vlan) u8 pppoe_profile[7] = {34, 35, 36, 37, 38, 39, 40}; u8 non_tun_profile[6] = {4, 5, 6, 7, 8, 9}; enum ice_sw_tunnel_type tun_type; - u16 i, j, k, profile_num = 0; + u16 i, j, profile_num = 0; + u16 k; bool udp_tun_valid = false; bool non_tun_valid = false; bool pppoe_valid = false; @@ -2546,7 +2546,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, LIST_ADD(&rg_entry->l_entry, &recps[rid].rg_list); /* Propagate some data to the recipe database */ - recps[idx].is_root = !!is_root; + recps[idx].is_root = is_root; recps[idx].priority = root_bufs.content.act_ctrl_fwd_priority; ice_zero_bitmap(recps[idx].res_idxs, ICE_MAX_FV_WORDS); if (root_bufs.content.result_indx & ICE_AQ_RECIPE_RESULT_EN) { @@ -2755,7 +2755,7 @@ ice_free_sw_marker_lg(struct ice_hw *hw, u16 marker_lg_id, u32 sw_marker) return ICE_ERR_NO_MEMORY; sw_buf->num_elems = CPU_TO_LE16(num_elems); - if (sw_marker == (sw_marker & 0xFFFF)) + if (sw_marker <= 0xFFFF) sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1); else sw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2); @@ -4962,6 +4962,7 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list, rule_lock = &recp_list->filt_rule_lock; ice_acquire_lock(rule_lock); + list_elem = ice_find_rule_entry(&recp_list->filt_rules, &f_entry->fltr_info); if (!list_elem) { @@ -7129,7 +7130,7 @@ static struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_FLG_DIR, ICE_META_DATA_ID_HW}, }; -/** +/* * ice_find_recp - find a recipe * @hw: pointer to the hardware structure * @lkup_exts: extension sequence to match @@ -7951,6 +7952,18 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo, case ICE_SW_TUN_NVGRE: prof_type = ICE_PROF_TUN_GRE; break; + case ICE_SW_IPV4_TCP: + ice_set_bit(ICE_PROFID_IPV4_TCP, bm); + return; + case ICE_SW_IPV4_UDP: + ice_set_bit(ICE_PROFID_IPV4_UDP, bm); + return; + case ICE_SW_IPV6_TCP: + ice_set_bit(ICE_PROFID_IPV6_TCP, bm); + return; + case ICE_SW_IPV6_UDP: + ice_set_bit(ICE_PROFID_IPV6_UDP, bm); + return; case ICE_SW_TUN_PPPOE: case ICE_SW_TUN_PPPOE_QINQ: prof_type = ICE_PROF_TUN_PPPOE; @@ -8023,18 +8036,6 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo, case ICE_SW_TUN_IPV4_AH: ice_set_bit(ICE_PROFID_IPV4_AH, bm); return; - case ICE_SW_IPV4_TCP: - ice_set_bit(ICE_PROFID_IPV4_TCP, bm); - return; - case ICE_SW_IPV4_UDP: - ice_set_bit(ICE_PROFID_IPV4_UDP, bm); - return; - case ICE_SW_IPV6_TCP: - ice_set_bit(ICE_PROFID_IPV6_TCP, bm); - return; - case ICE_SW_IPV6_UDP: - ice_set_bit(ICE_PROFID_IPV6_UDP, bm); - return; case ICE_SW_TUN_IPV4_GTPU_NO_PAY: ice_set_bit(ICE_PROFID_IPV4_GTPU_TEID, bm); return; @@ -8484,6 +8485,34 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, } } + if (tun_type == ICE_SW_IPV4_TCP) { + *pkt = dummy_tcp_packet; + *pkt_len = sizeof(dummy_tcp_packet); + *offsets = dummy_tcp_packet_offsets; + return; + } + + if (tun_type == ICE_SW_IPV4_UDP) { + *pkt = dummy_udp_packet; + *pkt_len = sizeof(dummy_udp_packet); + *offsets = dummy_udp_packet_offsets; + return; + } + + if (tun_type == ICE_SW_IPV6_TCP) { + *pkt = dummy_tcp_ipv6_packet; + *pkt_len = sizeof(dummy_tcp_ipv6_packet); + *offsets = dummy_tcp_ipv6_packet_offsets; + return; + } + + if (tun_type == ICE_SW_IPV6_UDP) { + *pkt = dummy_udp_ipv6_packet; + *pkt_len = sizeof(dummy_udp_ipv6_packet); + *offsets = dummy_udp_ipv6_packet_offsets; + return; + } + if (tun_type == ICE_SW_TUN_PPPOE_IPV6_QINQ) { *pkt = dummy_qinq_pppoe_ipv6_packet; *pkt_len = sizeof(dummy_qinq_pppoe_ipv6_packet); @@ -8733,34 +8762,6 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, return; } - if (tun_type == ICE_SW_IPV4_TCP) { - *pkt = dummy_tcp_packet; - *pkt_len = sizeof(dummy_tcp_packet); - *offsets = dummy_tcp_packet_offsets; - return; - } - - if (tun_type == ICE_SW_IPV4_UDP) { - *pkt = dummy_udp_packet; - *pkt_len = sizeof(dummy_udp_packet); - *offsets = dummy_udp_packet_offsets; - return; - } - - if (tun_type == ICE_SW_IPV6_TCP) { - *pkt = dummy_tcp_ipv6_packet; - *pkt_len = sizeof(dummy_tcp_ipv6_packet); - *offsets = dummy_tcp_ipv6_packet_offsets; - return; - } - - if (tun_type == ICE_SW_IPV6_UDP) { - *pkt = dummy_udp_ipv6_packet; - *pkt_len = sizeof(dummy_udp_ipv6_packet); - *offsets = dummy_udp_ipv6_packet_offsets; - return; - } - if (tun_type == ICE_ALL_TUNNELS) { *pkt = dummy_gre_udp_packet; *pkt_len = sizeof(dummy_gre_udp_packet); @@ -9564,7 +9565,7 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_ice_add_adv_rule; } - /* set the rule LOOKUP type based on caller specified 'Rx' + /* Set the rule LOOKUP type based on caller specified 'Rx' * instead of hardcoding it to be either LOOKUP_TX/RX * * for 'Rx' set the source to be the port number @@ -9640,6 +9641,7 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, } else { adv_fltr->lkups = NULL; } + if (!adv_fltr->lkups && !prof_rule) { status = ICE_ERR_NO_MEMORY; goto err_ice_add_adv_rule; @@ -9920,7 +9922,7 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw, * * This function is used to remove all the rules for a given VSI and as soon * as removing a rule fails, it will return immediately with the error code, - * else it will return success + * else it will return 0. */ int ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle) { diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 41004a38b1..6bec3cb0b9 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,7 @@ #define ICE_FLTR_RX BIT(0) #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_RX_LB BIT(2) -#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) +#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) /* Switch Profile IDs for Profile related switch rules */ #define ICE_PROFID_IPV4_TCP 4 @@ -254,6 +254,7 @@ union lg_act_entry { struct entry_generic_act generic_act; struct entry_statistics statistics; }; + struct ice_prof_type_entry { u16 prof_id; enum ice_sw_tunnel_type type; @@ -289,7 +290,8 @@ struct ice_rule_query_data { u16 vsi_handle; }; -/* This structure allows to pass info about lb_en and lan_en +/* + * This structure allows to pass info about lb_en and lan_en * flags to ice_add_adv_rule. Values in act would be used * only if act_valid was set to true, otherwise dflt * values would be used. @@ -507,8 +509,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries, bool res_shared, u16 *desc_id, struct ice_sq_cd *cd); int ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list); -int -ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list); +int ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list); void ice_rem_all_sw_rules_info(struct ice_hw *hw); int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst); int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 14c5b2fa01..25dd91db88 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -1323,7 +1323,6 @@ struct ice_hw { void *buf, u16 buf_size); void *aq_send_cmd_param; u8 dcf_enabled; /* Device Config Function */ - u8 api_branch; /* API branch version */ u8 api_maj_ver; /* API major version */ u8 api_min_ver; /* API minor version */ @@ -1395,6 +1394,7 @@ struct ice_hw { /* tunneling info */ struct ice_lock tnl_lock; struct ice_tunnel_table tnl; + /* dvm boost update information */ struct ice_dvm_table dvm_upd; @@ -1677,7 +1677,6 @@ struct ice_aq_get_set_rss_lut_params { /* AQ API version for report default configuration */ #define ICE_FW_API_REPORT_DFLT_CFG_MAJ 1 #define ICE_FW_API_REPORT_DFLT_CFG_MIN 7 - #define ICE_FW_API_REPORT_DFLT_CFG_PATCH 3 /* FW branch number for hardware families */ diff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c index b8240946b4..0d5a510384 100644 --- a/drivers/net/ice/base/ice_xlt_kb.c +++ b/drivers/net/ice/base/ice_xlt_kb.c @@ -24,7 +24,7 @@ static void _xlt_kb_entry_dump(struct ice_hw *hw, } /** - * ice_imem_dump - dump a xlt key build info + * ice_xlt_kb_dump - dump a xlt key build info * @hw: pointer to the hardware structure * @kb: key build to dump */ @@ -180,7 +180,7 @@ struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw) } /** - * ice_xlt_kb_get_fd - create rss xlt key build + * ice_xlt_kb_get_rss - create rss xlt key build * @hw: pointer to the hardware structure */ struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw) -- 2.43.0