From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AAEF6A052A; Wed, 27 Jan 2021 11:32:35 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3B60D140CE6; Wed, 27 Jan 2021 11:32:35 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 0053E140CD9 for ; Wed, 27 Jan 2021 11:32:33 +0100 (CET) IronPort-SDR: 4FnrGQEC3HbWMBmMMk13XSquKmNHgdJaFVS3l8wNGRkgYIR/wb2+cF/IirV6+jA3blaQiCwqBd JC7+ztARBt1Q== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="244125932" X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="244125932" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2021 02:32:32 -0800 IronPort-SDR: wCj1xmkL8f+GZpYo8HDbgyPtUm+wvTXTqgMT3Isne7X7Wf8wbBMJsaNAIfYhGmg74j6cixHxy8 HTt/Kj4NLkQA== X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="430053731" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.208.215]) ([10.213.208.215]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2021 02:32:30 -0800 To: Maxime Coquelin , =?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?= Cc: dev@dpdk.org, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net References: <68ecd941-9c56-4de7-fae2-2ad15bdfd81a@alibaba-inc.com> <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> <1603381885-88819-4-git-send-email-huawei.xhw@alibaba-inc.com> <18871462-4d25-302a-2716-99ebec65c3ac@alibaba-inc.com> <40e0702d-7847-9dc3-1904-03a7b8e92c2e@alibaba-inc.com> <3c83a06d-c757-e470-441b-a8b7f496a953@redhat.com> <9b614cce-8e41-9ed6-a648-fbbe3fc14807@alibaba-inc.com> <71352868-a699-d876-25c3-b36df4f8649f@redhat.com> From: Ferruh Yigit Message-ID: <22010641-89a9-15f5-6079-591cfef7dabb@intel.com> Date: Wed, 27 Jan 2021 10:32:27 +0000 MIME-Version: 1.0 In-Reply-To: <71352868-a699-d876-25c3-b36df4f8649f@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v5 3/3] PCI: don't use vfio ioctl call to access PIO resource X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/26/2021 10:44 AM, Maxime Coquelin wrote: > > > On 1/22/21 8:25 AM, 谢华伟(此时此刻） wrote: >> >> On 2021/1/21 23:38, Maxime Coquelin wrote: >>>> Do you mean we apply or abandon patch 3? I am both OK. The first >>>> priority to me is to enable MMIO bar support. >>> OK, so yes, I think we should abandon patch 2 and patch 3. >>> For patch 1, it looks valid to me, but I'll let Ferruh decide. >>> >>> For your device, if my understanding is correct, what we need to do is >>> to support MMIO for legacy devices. Correct? >> yes. >>> If so, the change should be in virtio_pci.c. In vtpci_init(), after >>> modern detection has failed, we should check the the BAR is PIO or MMIO >>> based on the flag. the result can be saved in struct virtio_pci_dev. >>> >>> >>> We would introduce new wrappers like vtpci_legacy_read, >>> vtpci_legacy_write that would either call rte_pci_ioport_read, >>> rte_pci_ioport_read in case of PIO, or rte_read32, rte_write32 in case >>> of MMIO. >> >> There are two choices. >> >> 1, apply patch 2. >> >>     IO/MMIO port are mapped and accessed using the same API. Kernel is >> doing in the same way like the following. >> >>             io_addr = pci_iomap >> >>                 get PIO directly or ioremap >> >>             iowrite16/32(val, io_addr + offset) >> >> I think applying patch 2 is a correct choice. It is a fix. Driver had >> better not know if bar is PIO or MMIO.  ioport in ioport_xx API means >> IO, not PIO. >> >> Btw, it only affects virtio PMD,  not that intrusive. >> >>  2, virtio specific change to enable MMIO support. >> >> Comparing with choice 1, i feels it is not that clean and pretty. > > OK, that makes sense. I am OK with keeping patch 2, but would like > Ferruh's ACK. > I was waiting for clarification if this can be solved in virtio, which seems clarified and decided to go with this patch, I am OK to proceed with patch 1 & 2. But first patch changes how PIO address get, it changes the Linux interface used to get the PIO. And as far as I can see second patch requires this new interface to be able to access the MEM resources. I have a concern that this interface change may cause issues with various distros, kernel versions etc.. And prefer it goes through a full -rc1 validation cycle. Huawei, I am aware the patch is around for a while but to play safe, I suggest considering it for early next release, so it can be tested enough, instead of getting if for -rc2/3 in this release. Thanks, ferruh > Could you please post v6? > > Thanks, > Maxime > >>> >>> It is not too late for this release, as the change will not be that >>> intrusive. But if you prepare such patch, please base it on top of my >>> virtio rework series; To make it easier to you, I added it to the dpdk- >>> next-virtio tree: >>> https://git.dpdk.org/next/dpdk-next-virtio/log/?h=virtio_pmd_rework_v2 >>> >>> Thanks, >>> Maxime >>> >> >