From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 67EB9A0C52; Wed, 24 Nov 2021 13:36:56 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5B7F94120A; Wed, 24 Nov 2021 13:36:56 +0100 (CET) Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by mails.dpdk.org (Postfix) with ESMTP id 89B03411E6; Wed, 24 Nov 2021 13:36:54 +0100 (CET) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id ABDD55C018A; Wed, 24 Nov 2021 07:36:51 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Wed, 24 Nov 2021 07:36:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= 1ytHwEfygscG4j+P3idus/FcYbOZt2PxYnfgq8BBP5o=; b=Lt7oEN+mElDE6ud2 42r9vvU6tCmeimX7q1C3aCskXE4Ax8Fc7mlHrU6dVAJZpx8kM0UOyqNmSUF1KQel G4muJefkEUDkLEGHvZMmmHE+1iYy8lj+DmhLljqyHl1mc50gB9j9Oz/36f0trftr etSpv6oA4WLA6JK1RXmd4tC32drj3C1Uxctqy3dv7zWQJeBB0eKRV143GRObTFna 9Xefhti2kUUCZvULzzHZDSPYQ2eGbI3hGxK/5myoPWIwqLg/OJxytRlBnMrbbnK6 +p2UcXN097h93cmvqicmsJy+1JyN15Rub8c3n+wlie6DvUE7D5DXTb0akrO1xght qc4w3Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=1ytHwEfygscG4j+P3idus/FcYbOZt2PxYnfgq8BBP 5o=; b=FfKtdrO0lZGxsOU86F7L7kSS9rIx3qytw5yj0oAr+0w0oA0gx0AdhPTJX HSlITuqA4clcAXDkQ5Z/LjCrrU3t4by2aj2byMzIaeMlzm34EGlyBu5epHq6V5x6 a9BjimS9eLtuXA0h0H8+gNJ1fiHKfGZgGA739txf4PMLRWbCVtF68Wb0Vj/Im6x+ 9JoRjUuWJ61r2TJCWkhNqdXP6QZIAJ/pCtKSTtjGCqn8MIkiGCCRUI+CNUfiMAIK 9Aj0LI4fkd/PDWjKDFqaJf4xQP8NPzRTQ/ff3rFZj2EQXBSnRZEQYo+rRaXcD5tc uAGFyRE5NV+7PPC7i6C604khAOJnw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvuddrgeekgdegfecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpeffvdffjeeuteelfeeileduudeugfetjeelveefkeejfeeigeehteff vdekfeegudenucffohhmrghinhepughpughkrdhorhhgnecuvehluhhsthgvrhfuihiivg eptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhhonhdr nhgvth X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 24 Nov 2021 07:36:50 -0500 (EST) From: Thomas Monjalon To: techboard@dpdk.org Cc: Bruce Richardson , Aman Kumar , David Marchand , "Song, Keesang" , dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH] config/x86: add support for AMD platform Date: Wed, 24 Nov 2021 13:36:48 +0100 Message-ID: <2321772.7Oz6CMQZNc@thomas> In-Reply-To: <5216156.SXqKmVLy82@thomas> References: <20211102145253.413467-1-aman.kumar@vvdntech.in> <5216156.SXqKmVLy82@thomas> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Ping techboard for comments 18/11/2021 15:05, Thomas Monjalon: > 18/11/2021 14:52, Bruce Richardson: > > On Thu, Nov 18, 2021 at 01:25:38PM +0100, Thomas Monjalon wrote: > > > I request a techboard decision for this patch. > > > > > > > > > 02/11/2021 20:04, Thomas Monjalon: > > > > 02/11/2021 19:45, David Marchand: > > > > > On Tue, Nov 2, 2021 at 3:53 PM Aman Kumar wrote: > > > > > > > > > > > > -Dcpu_instruction_set=znverX meson option can be used > > > > > > to build dpdk for AMD platforms. Supported options are > > > > > > znver1, znver2 and znver3. > > > > > > > > > > > > Signed-off-by: Aman Kumar > > > > > > --- > > > > > > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > > > > > > dpdk_conf.set('RTE_MAX_LCORE', 128) > > > > > > dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) > > > > > > + > > > > > > +# AMD platform support > > > > > > +if get_option('cpu_instruction_set') == 'znver1' > > > > > > + dpdk_conf.set('RTE_MAX_LCORE', 256) > > > > > > +elif get_option('cpu_instruction_set') == 'znver2' > > > > > > + dpdk_conf.set('RTE_MAX_LCORE', 512) > > > > > > +elif get_option('cpu_instruction_set') == 'znver3' > > > > > > + dpdk_conf.set('RTE_MAX_LCORE', 512) > > > > > > +endif > > > > > > > > > > I already replied to a similar patch earlier in this release. > > > > > https://inbox.dpdk.org/dev/CAJFAV8z-5amvEnr3mazkTqH-7SZX_C6EqCua6UdMXXHgrcmT6g@mail.gmail.com/ > > > > > > > > > > So repeating the same: do you actually _need_ more than 128 lcores in > > > > > a single DPDK application? > > > > > > We did not receive an answer to this question. > > > > > > > Yes I forgot this previous discussion concluding that we should not increase > > > > more than 128 threads. > > > > > > We had a discussion yesterday in techboard meeting. > > > The consensus is that we didn't hear for real need of more than 128 threads, > > > except for configuration usability convenience. > > > > > > Now looking again at the code, this is how it is defined: > > > > > > option('max_lcores', type: 'string', value: 'default', description: > > > 'Set maximum number of cores/threads supported by EAL; > > > "default" is different per-arch, "detect" detects the number of cores on the build machine.') > > > config/x86/meson.build: dpdk_conf.set('RTE_MAX_LCORE', 128) > > > config/ppc/meson.build: dpdk_conf.set('RTE_MAX_LCORE', 128) > > > config/arm/meson.build: it goes from 4 to 1280! > > > > > > So I feel it is not fair to reject this AMD patch if we allow Arm to go beyond. > > > Techboard, let's have a quick decision please for 21.11-rc4. > > > > > I would support increasing the default value for x86 in this release. > > This patch is not increasing the default for all x86, > only for some CPUs as given at compilation time. > I think it is the same logic as Arm CPU-specific compilation. > > > I believe Dave H. had some patches to decrease the memory footprint > > overhead of such a change. I don't believe that they were merged, and while > > it's a bit late for 21.11 now, those should be considered for 22.03 release > > and then maybe for backport.