From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ED214A0524; Thu, 4 Feb 2021 11:28:47 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CBA4D2406CC; Thu, 4 Feb 2021 11:28:47 +0100 (CET) Received: from wout4-smtp.messagingengine.com (wout4-smtp.messagingengine.com [64.147.123.20]) by mails.dpdk.org (Postfix) with ESMTP id 3EED42406CB for ; Thu, 4 Feb 2021 11:28:46 +0100 (CET) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.west.internal (Postfix) with ESMTP id 4F676CAF; Thu, 4 Feb 2021 05:28:43 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Thu, 04 Feb 2021 05:28:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm3; bh= vKo4+NlQmeGc4MvWpCcYV7tID3I2yyuNTqTb45uOmwE=; b=K9EJIaMTM8TSySLe nhBXXD5e9geP262nLyahiP/+gyPGDYVMpcP+9dUSQfuE06ViByIYNTINgpYjUPAE P5264t6d2W2qPOwQ/Pz8BArDEU35m3UP1HeydO0spBGG8NKYsNrh98I+zYWxIIpr S6SUTQgEk2EnPJJ5mpdGYj1JMM4z1jdyi7uzDrjFhwwni9ZL6cr/mq8Qu3AYM03y pVsYllpldHGCqym62NXoWDY6ae52hOrDm9uJBgnVs9GLMmYWkeKiRNEegp3WoxYD 3OCRrSSiN/pGrd7re76Gc4ij20Z6a9QOaR7BfcomhZvKSgv1inkyA0mkXChyDZSa MClR8g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm2; bh=vKo4+NlQmeGc4MvWpCcYV7tID3I2yyuNTqTb45uOm wE=; b=XpGz56jrg44nqkS87apHBOlsJzYmVk637WRBIBe/mpFRa+7miFCMOUFrY 9llc0BNBjLVBzo+XFj92vAEiCpt2qntWxaqVzFNDYA8NeZqSRdRZtH2h1md5lYQO 07xPjDWevqd8yfcZD0n1XT0JUiON4rpuLY4DAW9s1uPPIFJg8qQiiEktuYoO3fEJ AcUShXBYGaeTdqTatLm63UAPFZr4Pqh3NVvBAFREdN4kwprqapMhp5/wCMYkhtn4 IM9O22FEK7PX7YQ2/jQxhqzOUAUiMRf3Qe7QWiooogr3T1pGIOIiNodFGXpT8eib Zf1dqOXJhfulyjxkXD3I4XRUHNmPQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrgeeggddtiecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpeejudevudfguefhvdelgedvfeehveehjeetleefhfekgeeljefgueef ieegkeegjeenucffohhmrghinheprghmugdrtghomhdpuggvlhhlrdgtohhmnecukfhppe ejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgr mhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 590651080059; Thu, 4 Feb 2021 05:28:42 -0500 (EST) From: Thomas Monjalon To: Jerin Jacob Cc: dpdk-dev , Bruce Richardson Date: Thu, 04 Feb 2021 11:28:40 +0100 Message-ID: <2455385.Mn0tqrlHz1@thomas> In-Reply-To: References: <20210203211818.3047146-1-thomas@monjalon.net> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] config: increase default maximum number of NUMA nodes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 04/02/2021 07:19, Jerin Jacob: > On Thu, Feb 4, 2021 at 2:49 AM Thomas Monjalon wrote: > > > > AMD CPU can present a high number of NUMA nodes. > > The default should be 32 for better compatibility. > > The typical configuration is 4 nodes[1] for AMD. Just wondering, Is it > an exception case? if so, Do we need to consume more memory for normal > cases? > > [1] > https://developer.amd.com/wp-content/resources/56308-NUMA%20Topology%20for%20AMD%20EPYC%E2%84%A2%20Naples%20Family%20Processors.PDF As you can read in https://www.dell.com/support/kbdoc/fr-fr/000137696/amd-rome-is-it-for-real-architecture-and-initial-hpc-performance there is an option "CCX as NUMA Domain. This option exposes each CCX as a NUMA node. On a system with dual-socket CPUs with 16 CCXs per CPU, this setting will expose 32 NUMA domains." and "Enabling this option is expected to help virtualized environments." I would not say it is exceptional. And in my understanding, the memory cost is not so high for DPDK. Do you see some large arrays depending on RTE_MAX_NUMA_NODES?