From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B247BA0548; Fri, 9 Jul 2021 22:18:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 69671410FD; Fri, 9 Jul 2021 22:18:31 +0200 (CEST) Received: from new2-smtp.messagingengine.com (new2-smtp.messagingengine.com [66.111.4.224]) by mails.dpdk.org (Postfix) with ESMTP id 8858B40143 for ; Fri, 9 Jul 2021 22:18:30 +0200 (CEST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailnew.nyi.internal (Postfix) with ESMTP id BA14C58046B; Fri, 9 Jul 2021 16:18:29 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Fri, 09 Jul 2021 16:18:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= azPZcypc7Ovp04uVdCoeGi8SnwGXatxgWEhkVXf2k+U=; b=nnQwPGRUrf0YREyw dZVMymHnqpdLpNAnpuhRZj5fUFnkv8MxNb3zWvuaNGgYuYKzWnWYzgCsJ2a/PeJn MaleaODc9yOnLj64LxbuiRHDxwjy2kYbLv5Ww3RRNVDJVxuvDEmvlMOwVuMMAIOT FXiW2X5YUeK+RRkregfuzr2qKXcU48/2nvVGfhqeDakU58dMfTYHWkcldCBQx1CM GEVRrLvrtFMFvaeSCVK57jsuEH5yfzuyWIM3rR2QGjpg9iF6xMVRo6ie3V9NFITG mWL4Tibe7+QQ5mjLUs8cPXKvQl1n9ori36r+aJRhzOV7VSX/n9S3/DROp3oOkQl6 c8yY6Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=azPZcypc7Ovp04uVdCoeGi8SnwGXatxgWEhkVXf2k +U=; b=o4n8detcKe6ok8DbP3aLShHnrr2nUghkOUU1CtfLu4JZU6D8SgMVyqUiP W2Tta7R7ycudjVvf6t0SfX+YCifFiO+yKJUat2vuvbEjv58lLJAvCcY7Wltk/YvF xS8Lwwi3hx5b+rcZagpD69XAWek4/FVlIm+F8H+cC2CSQg5gpRlyf3+Ia/F8wh09 SsMm5vwrIq1s3dyM4zmwCotaDcH4W4jE62/DIOl6SI7et4fEcZPgfV65dtCrP9fD yka6UDMEYfOrsfnFv11lWtPxLsSdJmQzTFKxxE0Yl4jgV8ZyXI+Ag5ElNfr4TdxO 1J4ixq9u5QNJIfDPlSveDvwEnH2/w== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrtdeigddugeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtufertddttddvnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepudeggfdvfeduffdtfeeglefghfeukefgfffhueejtdetuedtjeeu ieeivdffgeehnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 9 Jul 2021 16:18:26 -0400 (EDT) From: Thomas Monjalon To: Chengwen Feng Cc: ferruh.yigit@intel.com, ruifeng.wang@arm.com, dev@dpdk.org, bruce.richardson@intel.com, vladimir.medvedkin@intel.com, viktorin@rehivetech.com, jerinj@marvell.com, Honnappa.Nagarahalli@arm.com, jerinjacobk@gmail.com, juraj.linkes@pantheon.tech, david.marchand@redhat.com Date: Fri, 09 Jul 2021 22:18:24 +0200 Message-ID: <2514919.6gcjSZaa85@thomas> In-Reply-To: <1624849071-56826-2-git-send-email-fengchengwen@huawei.com> References: <1624849071-56826-1-git-send-email-fengchengwen@huawei.com> <1624849071-56826-2-git-send-email-fengchengwen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH 1/2] build: fix SVE compile error with gcc8.3 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 28/06/2021 04:57, Chengwen Feng: > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -488,3 +488,9 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != '' > compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL', > 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] > endif > + > +# Check whether SVE ACLE is supported and set the corresponding flag which will used with SVE ACLE code. > +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and > + cc.check_header('arm_sve.h')) > + dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) > +endif Simpler and better sorted: --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -524,6 +524,9 @@ endif if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' compile_time_cpuflags += ['RTE_CPUFLAG_SVE'] + if (cc.check_header('arm_sve.h')) + dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) + endif endif