From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by dpdk.org (Postfix) with ESMTP id F1CF3AAC6 for ; Wed, 18 Apr 2018 00:23:23 +0200 (CEST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 8BAD321BF5; Tue, 17 Apr 2018 18:15:28 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Tue, 17 Apr 2018 18:15:28 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=mesmtp; bh=iWSJEBo/e06SAPLojihbezfn2j s/2Vksdkbl3bXAdLY=; b=pfXvCLPqa36GYMCpeT9Jy8H6yu/MxFVP5Yf9Yu/2UJ rmdVw5jlhPdevsOnJwGq7EbYYWxdLHUHBHSkUxNp+XLOJJLVHfXpgKeU/IuoELrz ETjq1UJqPJ8qHHKYfa20x4B2TXJpFrc/A259y5CraQNtFzq+CjzkCcCCB05Dy+CP Q= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; bh=iWSJEB o/e06SAPLojihbezfn2js/2Vksdkbl3bXAdLY=; b=UwxLaWP6R43nOdEiyt4QM4 wNq8XbH7CE20DSKG2kkqy7A7fTkKVD6L64BWSwuZk8BwNF+mTvCIbFdvljxLwlPy nS6QWivyNELxbAECxtQp6JBHb6htGzJpaRxGUCb0B5fsA2lB/ZM1v/ambfEqTVuR xVwf79mzSky3LASkEF3w7mskeElTfvhBSdtn3zjCW2aBccW9vwsLy101H5sdNjZU Kq1vb12u4rFmY/w1yxAU8zGB2fyhthKURBiwHBIxvJxkXgJBcTAgzAr8fvGhzLjT MuQ33NhGHGovUj7zWFt56SrrEu1VhCOIqKr75Vth4eWDDBnSPMmOqG08uD4YEWwQ == X-ME-Sender: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id A84B1E443C; Tue, 17 Apr 2018 18:15:27 -0400 (EDT) From: Thomas Monjalon To: Olivier Matz Cc: dev@dpdk.org, Jerin Jacob , "Ananyev, Konstantin" , "Richardson, Bruce" Date: Wed, 18 Apr 2018 00:15:26 +0200 Message-ID: <2566410.P8rg2qFdWC@xps> In-Reply-To: <20180406012624.GA12155@jerin> References: <20170630142609.6180-1-olivier.matz@6wind.com> <2601191342CEEE43887BDE71AB977258A0AB9930@irsmsx105.ger.corp.intel.com> <20180406012624.GA12155@jerin> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] ring: relax alignment constraint on ring structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Apr 2018 22:23:24 -0000 > > > > > > > > > > The initial objective of > > > > > > > > > > commit d9f0d3a1ffd4 ("ring: remove split cacheline build setting") > > > > > > > > > > was to add an empty cache line betwee, the producer and consumer > > > > > > > > > > data (on platform with cache line size = 64B), preventing from > > > > > > > > > > having them on adjacent cache lines. > > > > > > > > > > > > > > > > > > > > Following discussion on the mailing list, it appears that this > > > > > > > > > > also imposes an alignment constraint that is not required. > > > > > > > > > > > > > > > > > > > > This patch removes the extra alignment constraint and adds the > > > > > > > > > > empty cache lines using padding fields in the structure. The > > > > > > > > > > size of rte_ring structure and the offset of the fields remain > > > > > > > > > > the same on platforms with cache line size = 64B: > > > > > > > > > > > > > > > > > > > > rte_ring = 384 > > > > > > > > > > rte_ring.name = 0 > > > > > > > > > > rte_ring.flags = 32 > > > > > > > > > > rte_ring.memzone = 40 > > > > > > > > > > rte_ring.size = 48 > > > > > > > > > > rte_ring.mask = 52 > > > > > > > > > > rte_ring.prod = 128 > > > > > > > > > > rte_ring.cons = 256 > > > > > > > > > > > > > > > > > > > > But it has an impact on platform where cache line size is 128B: > > > > > > > > > > > > > > > > > > > > rte_ring = 384 -> 768 > > > > > > > > > > rte_ring.name = 0 > > > > > > > > > > rte_ring.flags = 32 > > > > > > > > > > rte_ring.memzone = 40 > > > > > > > > > > rte_ring.size = 48 > > > > > > > > > > rte_ring.mask = 52 > > > > > > > > > > rte_ring.prod = 128 -> 256 > > > > > > > > > > rte_ring.cons = 256 -> 512 > > > > > > > > > > > > > > > > > > Are we leaving TWO cacheline to make sure, HW prefetch don't load > > > > > > > > > the adjust cacheline(consumer)? > > > > > > > > > > > > > > > > > > If so, Will it have impact on those machine where it is 128B Cache line > > > > > > > > > and the HW prefetcher is not loading the next caching explicitly. Right? > > > > > > > > > > > > > > > > The impact on machines that have a 128B cache line is that an unused > > > > > > > > cache line will be added between the producer and consumer data. I > > > > > > > > expect that the impact is positive in case there is a hw prefetcher, and > > > > > > > > null in case there is no such prefetcher. > > > > > > > > > > > > > > It is not NULL, Right? You are loosing 256B for each ring. > > > > > > > > > > > > Is it really that important? > > > > > > > > > > Pipeline or eventdev SW cases there could more rings in the system. > > > > > I don't see any downside of having config option which is enabled > > > > > default. > > > > > > > > > > In my view, such config options are good, as in embedded usecases, customers > > > > > can really fine tune the target for the need. In server usecases, let the default > > > > > of option be enabled, no harm. > > > > > > > > But that would mean we have to maintain two layouts for the rte_ring structure. > > > > > > Is there any downside of having two configurable layout? meaning, we are not > > > transferring rte_ring structure over network etc(ie no interoperability > > > issue). Does it really matter? May I am missing something here. > > > > My concern about potential compatibility problems we are introducing - > > library build with 'y', while app wit 'n', or visa-versa. > > Got it. > > > I wonder are there really a lot of users who would be interested in such savings? > > Could it happen that this new option would sit here unused and untested? > > OK. Fair enough. I have no objections for Olivier patch. Applied, thanks