From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 693BC2C24 for ; Fri, 15 Mar 2019 13:21:08 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Mar 2019 05:21:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,482,1544515200"; d="scan'208";a="151993440" Received: from irsmsx152.ger.corp.intel.com ([163.33.192.66]) by fmsmga002.fm.intel.com with ESMTP; 15 Mar 2019 05:21:05 -0700 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.210]) by IRSMSX152.ger.corp.intel.com ([169.254.6.139]) with mapi id 14.03.0415.000; Fri, 15 Mar 2019 12:21:04 +0000 From: "Ananyev, Konstantin" To: Gavin Hu , "dev@dpdk.org" CC: "nd@arm.com" , "thomas@monjalon.net" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "nipun.gupta@nxp.com" , "Honnappa.Nagarahalli@arm.com" , "i.maximets@samsung.com" , "chaozhu@linux.vnet.ibm.com" Thread-Topic: [dpdk-dev] [PATCH v8 0/3] generic spinlock optimization and test case enhancements Thread-Index: AQHU1YSUZZgs84gy9EOIb6zj0fYfiKYMp58w Date: Fri, 15 Mar 2019 12:21:03 +0000 Message-ID: <2601191342CEEE43887BDE71AB977258013655BF58@irsmsx105.ger.corp.intel.com> References: <20181220104246.5590-1-gavin.hu@arm.com> <1552031797-146710-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1552031797-146710-1-git-send-email-gavin.hu@arm.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjU4MTk0NWItNzcwNS00YWU5LWEwZmUtNTAwYThjNTA2MzcwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiOStucXdzOU9ib3BoZldcL01YdWtFUW9HUlRMaDdnbTVrOWFEK0EydmpxblN3V2dKV2o2TVp1bkFQcDlzRVBDR3UifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v8 0/3] generic spinlock optimization and test case enhancements X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Mar 2019 12:21:09 -0000 >=20 > V8: Remove internal ChangeId >=20 > V7: Update the 1/3 patch headline and commit message >=20 > V6: Rebase and drop the first patch as a similar fix was already merged. >=20 > V5: Remove ChangeId(sorry for that) >=20 > V4: > 1. Drop one patch for the test case to get time precisely as the overhead > of getting time is amortized already in another patch. > 2. Drop the ticket lock patch from this series as there are no dependency > between them, the ticket lock patch was submitted separately: > http://patchwork.dpdk.org/patch/49770/ > 3. Define volatile variable in patch #3 to be more realistic for spinlock > protection(avoid optimization be compiler). > 4. Fix typos. >=20 > V3: > 1. Implemented the ticket lock to improve the fairness and predictability= . > The locks are obtained in the order of requested. >=20 > V2: > 1. FORCE_INTRINCIS is still an option for ppc/x86, although not is use > by default, so don't remove it from generic file. > 2. Fix the clang compiler error on x86 when the above FORCE_INTRINSICS > is enabled. >=20 > V1: > 1. Remove the 1us delay outside of the locked region to really benchmark > the spinlock acquire/release performance, not the delay API. > 2. Use the precise version of getting timestamps for more precise > benchmarking results. > 3. Amortize the overhead of getting the timestamp by 10000 loops. > 4. Move the arm specific implementation to arm folder to remove the > hardcoded implementation. > 5. Use atomic primitives, which translate to one-way barriers, instead of > two-way sync primitives, to optimize for performance. >=20 > Gavin Hu (3): > test/spinlock: remove 1us delay for correct benchmarking > test/spinlock: amortize the cost of getting time > spinlock: reimplement with atomic one-way barrier builtins >=20 > app/test/test_spinlock.c | 31 +++++++++++-----= ------ > .../common/include/generic/rte_spinlock.h | 18 +++++++++---- > 2 files changed, 29 insertions(+), 20 deletions(-) >=20 > -- Acked-by: Konstantin Ananyev > 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id B1788A0096 for ; Fri, 15 Mar 2019 13:21:12 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 80DBA2C28; Fri, 15 Mar 2019 13:21:10 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 693BC2C24 for ; Fri, 15 Mar 2019 13:21:08 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Mar 2019 05:21:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,482,1544515200"; d="scan'208";a="151993440" Received: from irsmsx152.ger.corp.intel.com ([163.33.192.66]) by fmsmga002.fm.intel.com with ESMTP; 15 Mar 2019 05:21:05 -0700 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.210]) by IRSMSX152.ger.corp.intel.com ([169.254.6.139]) with mapi id 14.03.0415.000; Fri, 15 Mar 2019 12:21:04 +0000 From: "Ananyev, Konstantin" To: Gavin Hu , "dev@dpdk.org" CC: "nd@arm.com" , "thomas@monjalon.net" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "nipun.gupta@nxp.com" , "Honnappa.Nagarahalli@arm.com" , "i.maximets@samsung.com" , "chaozhu@linux.vnet.ibm.com" Thread-Topic: [dpdk-dev] [PATCH v8 0/3] generic spinlock optimization and test case enhancements Thread-Index: AQHU1YSUZZgs84gy9EOIb6zj0fYfiKYMp58w Date: Fri, 15 Mar 2019 12:21:03 +0000 Message-ID: <2601191342CEEE43887BDE71AB977258013655BF58@irsmsx105.ger.corp.intel.com> References: <20181220104246.5590-1-gavin.hu@arm.com> <1552031797-146710-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1552031797-146710-1-git-send-email-gavin.hu@arm.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjU4MTk0NWItNzcwNS00YWU5LWEwZmUtNTAwYThjNTA2MzcwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiOStucXdzOU9ib3BoZldcL01YdWtFUW9HUlRMaDdnbTVrOWFEK0EydmpxblN3V2dKV2o2TVp1bkFQcDlzRVBDR3UifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v8 0/3] generic spinlock optimization and test case enhancements X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190315122103.vZCbzjIj21J6EVPV_mp6fVsnIcUMM0BxHeh0jmRF5aM@z> >=20 > V8: Remove internal ChangeId >=20 > V7: Update the 1/3 patch headline and commit message >=20 > V6: Rebase and drop the first patch as a similar fix was already merged. >=20 > V5: Remove ChangeId(sorry for that) >=20 > V4: > 1. Drop one patch for the test case to get time precisely as the overhead > of getting time is amortized already in another patch. > 2. Drop the ticket lock patch from this series as there are no dependency > between them, the ticket lock patch was submitted separately: > http://patchwork.dpdk.org/patch/49770/ > 3. Define volatile variable in patch #3 to be more realistic for spinlock > protection(avoid optimization be compiler). > 4. Fix typos. >=20 > V3: > 1. Implemented the ticket lock to improve the fairness and predictability= . > The locks are obtained in the order of requested. >=20 > V2: > 1. FORCE_INTRINCIS is still an option for ppc/x86, although not is use > by default, so don't remove it from generic file. > 2. Fix the clang compiler error on x86 when the above FORCE_INTRINSICS > is enabled. >=20 > V1: > 1. Remove the 1us delay outside of the locked region to really benchmark > the spinlock acquire/release performance, not the delay API. > 2. Use the precise version of getting timestamps for more precise > benchmarking results. > 3. Amortize the overhead of getting the timestamp by 10000 loops. > 4. Move the arm specific implementation to arm folder to remove the > hardcoded implementation. > 5. Use atomic primitives, which translate to one-way barriers, instead of > two-way sync primitives, to optimize for performance. >=20 > Gavin Hu (3): > test/spinlock: remove 1us delay for correct benchmarking > test/spinlock: amortize the cost of getting time > spinlock: reimplement with atomic one-way barrier builtins >=20 > app/test/test_spinlock.c | 31 +++++++++++-----= ------ > .../common/include/generic/rte_spinlock.h | 18 +++++++++---- > 2 files changed, 29 insertions(+), 20 deletions(-) >=20 > -- Acked-by: Konstantin Ananyev > 2.7.4