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From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Vlad Zolotarov <vladz@cloudius-systems.com>, "dev@dpdk.org" <dev@dpdk.org>
Thread-Topic: [dpdk-dev] [PATCH v6 1/3] ixgbe: Cleanups
Thread-Index: AQHQWpxWDScOf6va9UqZ6fONHS58zp0UlhNg
Date: Mon, 9 Mar 2015 20:15:21 +0000
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Subject: Re: [dpdk-dev] [PATCH v6 1/3] ixgbe: Cleanups
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> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Vlad Zolotarov
> Sent: Monday, March 09, 2015 7:07 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v6 1/3] ixgbe: Cleanups
>=20
> - Removed the not needed casting.
> - ixgbe_dev_rx_init(): shorten the lines by defining a local alias var=
iable to access
> &dev->data->dev_conf.rxmode.
>=20
> Signed-off-by: Vlad Zolotarov <vladz@cloudius-systems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
> New in v6:
> - Fixed of a compilation error caused by a patches recomposition durin=
g series separation.
> ---
> lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 29 +++++++++++++----------------
> 1 file changed, 13 insertions(+), 16 deletions(-)
>=20
> diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixg=
be_rxtx.c
> index 99c4bde..e015981 100644
> --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
> +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c
> @@ -1032,8 +1032,7 @@ ixgbe_rx_alloc_bufs(struct igb_rx_queue *rxq)
> int diag, i;
>=20
> /* allocate buffers in bulk directly into the S/W ring */
> - alloc_idx =3D (uint16_t)(rxq->rx_free_trigger -
> - (rxq->rx_free_thresh - 1));
> + alloc_idx =3D rxq->rx_free_trigger - (rxq->rx_free_thresh - 1);
> rxep =3D &rxq->sw_ring[alloc_idx];
> diag =3D rte_mempool_get_bulk(rxq->mb_pool, (void *)rxep,
> rxq->rx_free_thresh);
> @@ -1061,10 +1060,9 @@ ixgbe_rx_alloc_bufs(struct igb_rx_queue *rxq)
> IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rxq->rx_free_trigger);
>=20
> /* update state of internal queue structure */
> - rxq->rx_free_trigger =3D (uint16_t)(rxq->rx_free_trigger +
> - rxq->rx_free_thresh);
> + rxq->rx_free_trigger =3D rxq->rx_free_trigger + rxq->rx_free_thresh;
> if (rxq->rx_free_trigger >=3D rxq->nb_rx_desc)
> - rxq->rx_free_trigger =3D (uint16_t)(rxq->rx_free_thresh - 1);
> + rxq->rx_free_trigger =3D rxq->rx_free_thresh - 1;
>=20
> /* no errors */
> return 0;
> @@ -3564,6 +3562,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> uint32_t rxcsum;
> uint16_t buf_size;
> uint16_t i;
> + struct rte_eth_rxmode *rx_conf =3D &dev->data->dev_conf.rxmode;
>=20
> PMD_INIT_FUNC_TRACE();
> hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> @@ -3586,7 +3585,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> * Configure CRC stripping, if any.
> */
> hlreg0 =3D IXGBE_READ_REG(hw, IXGBE_HLREG0);
> - if (dev->data->dev_conf.rxmode.hw_strip_crc)
> + if (rx_conf->hw_strip_crc)
> hlreg0 |=3D IXGBE_HLREG0_RXCRCSTRP;
> else
> hlreg0 &=3D ~IXGBE_HLREG0_RXCRCSTRP;
> @@ -3594,11 +3593,11 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> /*
> * Configure jumbo frame support, if any.
> */
> - if (dev->data->dev_conf.rxmode.jumbo_frame =3D=3D 1) {
> + if (rx_conf->jumbo_frame =3D=3D 1) {
> hlreg0 |=3D IXGBE_HLREG0_JUMBOEN;
> maxfrs =3D IXGBE_READ_REG(hw, IXGBE_MAXFRS);
> maxfrs &=3D 0x0000FFFF;
> - maxfrs |=3D (dev->data->dev_conf.rxmode.max_rx_pkt_len << 16);
> + maxfrs |=3D (rx_conf->max_rx_pkt_len << 16);
> IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, maxfrs);
> } else
> hlreg0 &=3D ~IXGBE_HLREG0_JUMBOEN;
> @@ -3622,9 +3621,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> * Reset crc_len in case it was changed after queue setup by a
> * call to configure.
> */
> - rxq->crc_len =3D (uint8_t)
> - ((dev->data->dev_conf.rxmode.hw_strip_crc) ? 0 :
> - ETHER_CRC_LEN);
> + rxq->crc_len =3D rx_conf->hw_strip_crc ? 0 : ETHER_CRC_LEN;
>=20
> /* Setup the Base and Length of the Rx Descriptor Rings */
> bus_addr =3D rxq->rx_ring_phys_addr;
> @@ -3642,7 +3639,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> /*
> * Configure Header Split
> */
> - if (dev->data->dev_conf.rxmode.header_split) {
> + if (rx_conf->header_split) {
> if (hw->mac.type =3D=3D ixgbe_mac_82599EB) {
> /* Must setup the PSRTYPE register */
> uint32_t psrtype;
> @@ -3652,7 +3649,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> IXGBE_PSRTYPE_IPV6HDR;
> IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(rxq->reg_idx), psrtype);
> }
> - srrctl =3D ((dev->data->dev_conf.rxmode.split_hdr_size <<
> + srrctl =3D ((rx_conf->split_hdr_size <<
> IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
> IXGBE_SRRCTL_BSIZEHDR_MASK);
> srrctl |=3D IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
> @@ -3686,7 +3683,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> dev->data->scattered_rx =3D 1;
> }
>=20
> - if (dev->data->dev_conf.rxmode.enable_scatter)
> + if (rx_conf->enable_scatter)
> dev->data->scattered_rx =3D 1;
>=20
> set_rx_function(dev);
> @@ -3703,7 +3700,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> */
> rxcsum =3D IXGBE_READ_REG(hw, IXGBE_RXCSUM);
> rxcsum |=3D IXGBE_RXCSUM_PCSD;
> - if (dev->data->dev_conf.rxmode.hw_ip_checksum)
> + if (rx_conf->hw_ip_checksum)
> rxcsum |=3D IXGBE_RXCSUM_IPPCSE;
> else
> rxcsum &=3D ~IXGBE_RXCSUM_IPPCSE;
> @@ -3713,7 +3710,7 @@ ixgbe_dev_rx_init(struct rte_eth_dev *dev)
> if (hw->mac.type =3D=3D ixgbe_mac_82599EB ||
> hw->mac.type =3D=3D ixgbe_mac_X540) {
> rdrxctl =3D IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
> - if (dev->data->dev_conf.rxmode.hw_strip_crc)
> + if (rx_conf->hw_strip_crc)
> rdrxctl |=3D IXGBE_RDRXCTL_CRCSTRIP;
> else
> rdrxctl &=3D ~IXGBE_RDRXCTL_CRCSTRIP;
> --
> 2.1.0